coreboot-gerrit May 2018

coreboot-gerrit@coreboot.org

1 participants
3692 discussions

Change in coreboot[master]: mb/google/poppy/variants/nocturne: configure the FPMCU interface
by build bot (Jenkins) (Code Review) 30 May '18

30 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26684 ) Change subject: mb/google/poppy/variants/nocturne: configure the FPMCU interface ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/73631/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27746/ : SUCCESS -- To view, visit https://review.coreboot.org/26684 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib417dcf84cda8e354060785cd16a7b6b812148d5 Gerrit-Change-Number: 26684 Gerrit-PatchSet: 2 Gerrit-Owner: Vincent Palatin <vpalatin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Vincent Palatin <vpalatin(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 May 2018 13:02:46 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: util/crossgcc: update to gcc 8.1.0 and binutils 2.30
by build bot (Jenkins) (Code Review) 30 May '18

30 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25997 ) Change subject: util/crossgcc: update to gcc 8.1.0 and binutils 2.30 ...................................................................... Patch Set 13: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-toolchain/419/ : FAILURE https://qa.coreboot.org/job/coreboot-gerrit/73632/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27748/ : SUCCESS -- To view, visit https://review.coreboot.org/25997 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1e8074954d5d7a4eff590abb7439e9be7d3762aa Gerrit-Change-Number: 25997 Gerrit-PatchSet: 13 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Comment-Date: Wed, 30 May 2018 12:58:55 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: {cpu, drivers, nb, soc}/intel: Use CACHE_ROM_BASE where appropriate
by build bot (Jenkins) (Code Review) 30 May '18

30 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26574 ) Change subject: {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/73620/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27731/ : SUCCESS -- To view, visit https://review.coreboot.org/26574 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibc2392cd2a00fde3e15dda4d44c8b6874d7ac8a3 Gerrit-Change-Number: 26574 Gerrit-PatchSet: 5 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 May 2018 12:27:02 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: device/oprom/x86emu/prim_ops.c: Fix coding style
by build bot (Jenkins) (Code Review) 30 May '18

30 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26353 ) Change subject: device/oprom/x86emu/prim_ops.c: Fix coding style ...................................................................... Patch Set 12: (46 comments) https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c File src/device/oprom/x86emu/prim_ops.c: https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 195: if (set_carry) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 207: if (set_carry) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 297: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 316: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 765: if ((cnt = s % 9) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 812: if ((cnt = s % 17) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 817: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 836: if ((cnt = s % 33) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 883: if ((cnt = s % 9) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 888: /* note hackery here. Access_flag(..) evaluates to either line over 80 characters https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 947: if ((cnt = s % 17) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 956: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 979: if ((cnt = s % 33) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 988: if (cnt != 1) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1028: if ((cnt = s % 8) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1061: if ((cnt = s % 16) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1086: if ((cnt = s % 32) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1126: if ((cnt = s % 8) != 0) { /* not a typo, do nada if cnt==0 */ do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1157: if ((cnt = s % 16) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1180: if ((cnt = s % 32) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1290: CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^ line over 80 characters https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1325: if (cnt == 1) { braces {} are not necessary for any arm of this statement https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1360: if (cnt == 1) { braces {} are not necessary for any arm of this statement https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1394: if (cnt == 1) { braces {} are not necessary for any arm of this statement https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1426: if (sf) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1464: if (sf) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1502: if (sf) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1578: CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^ line over 80 characters https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1613: if (cnt == 1) { braces {} are not necessary for any arm of this statement https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1647: if (cnt == 1) { braces {} are not necessary for any arm of this statement https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1672: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for any arm of this statement https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1696: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for any arm of this statement https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1720: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for any arm of this statement https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1938: if ((d_sign = d & 0x80000000) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1938: if ((d_sign = d & 0x80000000) != 0) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1943: if ((s_sign = s & 0x80000000) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 1943: if ((s_sign = s & 0x80000000) != 0) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 2321: if (ACCESS_FLAG(F_DF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 2366: if (ACCESS_FLAG(F_DF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 2379: if (M.x86.mode & SYSMODE_32BIT_REP) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 2475: /* Regardless if we have real data from the hardware, the emulator line over 80 characters https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 2476: * will only support upto feature 1, which we set in register EAX. line over 80 characters https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 2486: /* If we don't have x86 compatible hardware, we return values from an line over 80 characters https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 2487: * Intel 486dx4; which was one of the first processors to have CPUID. line over 80 characters https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 2493: /* In the case that we have hardware CPUID instruction, we make sure line over 80 characters https://review.coreboot.org/#/c/26353/12/src/device/oprom/x86emu/prim_ops.c… PS12, Line 2500: * return all zeros when queried for invalid or unsupported feature line over 80 characters -- To view, visit https://review.coreboot.org/26353 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I010f3e02813d38293a7ab7fc84f60b8c2ec098a7 Gerrit-Change-Number: 26353 Gerrit-PatchSet: 12 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 30 May 2018 12:23:23 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

1 0

Change in coreboot[master]: device/oprom/x86emu/prim_ops.c: Fix coding style
by build bot (Jenkins) (Code Review) 30 May '18

30 May '18

1 0

Change in coreboot[master]: src/console: Fix coding style
by build bot (Jenkins) (Code Review) 30 May '18

30 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26303 ) Change subject: src/console: Fix coding style ...................................................................... Patch Set 2: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/73622/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/27735/ : SUCCESS -- To view, visit https://review.coreboot.org/26303 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I57724262ade87e7907d31ea66e4f1b9c382ef3db Gerrit-Change-Number: 26303 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 30 May 2018 12:15:03 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: cpu/x86/mtrr: Prepare for ROM_SIZE > 16MiB
by build bot (Jenkins) (Code Review) 30 May '18

30 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26567 ) Change subject: cpu/x86/mtrr: Prepare for ROM_SIZE > 16MiB ...................................................................... Patch Set 6: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/73621/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27732/ : SUCCESS -- To view, visit https://review.coreboot.org/26567 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5dfa2744190a34c56c86e108a8c50dca9d428268 Gerrit-Change-Number: 26567 Gerrit-PatchSet: 6 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 May 2018 12:12:30 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in coreboot[master]: soc/{amd, intel}: Use CACHE_ROM_(BASE|SIZE)
by build bot (Jenkins) (Code Review) 30 May '18

30 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26575 ) Change subject: soc/{amd,intel}: Use CACHE_ROM_(BASE|SIZE) ...................................................................... Patch Set 5: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/73619/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27730/ : SUCCESS -- To view, visit https://review.coreboot.org/26575 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I66d36b84ce49c1cb98cb36a4731977baaedf3225 Gerrit-Change-Number: 26575 Gerrit-PatchSet: 5 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 May 2018 12:08:24 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in coreboot[master]: device/oprom/x86emu/prim_ops.c: Fix coding style
by build bot (Jenkins) (Code Review) 30 May '18

30 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26353 ) Change subject: device/oprom/x86emu/prim_ops.c: Fix coding style ...................................................................... Patch Set 11: (56 comments) https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c File src/device/oprom/x86emu/prim_ops.c: https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 195: if (set_carry) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 207: if (set_carry) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 297: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 316: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 765: if ((cnt = s % 9) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 812: if ((cnt = s % 17) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 817: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 836: if ((cnt = s % 33) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 883: if ((cnt = s % 9) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 888: /* note hackery here. Access_flag(..) evaluates to either line over 80 characters https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 947: if ((cnt = s % 17) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 956: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 979: if ((cnt = s % 33) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 988: if (cnt != 1) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1028: if ((cnt = s % 8) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1061: if ((cnt = s % 16) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1086: if ((cnt = s % 32) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1126: if ((cnt = s % 8) != 0) { /* not a typo, do nada if cnt==0 */ do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1157: if ((cnt = s % 16) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1180: if ((cnt = s % 32) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1290: CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^ line over 80 characters https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1325: if (cnt == 1) { braces {} are not necessary for any arm of this statement https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1360: if (cnt == 1) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1362: } else { space required after that close brace '}' https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1362: } else { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1394: if (cnt == 1) { braces {} are not necessary for any arm of this statement https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1426: if (sf) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1464: if (sf) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1502: if (sf) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1578: CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^ line over 80 characters https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1613: if (cnt == 1) { braces {} are not necessary for any arm of this statement https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1647: if (cnt == 1) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1649: } else { space required after that close brace '}' https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1649: } else { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1672: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1674: } else { space required after that close brace '}' https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1674: } else { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1696: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1698: } else { space required after that close brace '}' https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1698: } else { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1720: if (ACCESS_FLAG(F_CF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1722: } else { space required after that close brace '}' https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1722: } else { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1938: if ((d_sign = d & 0x80000000) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1938: if ((d_sign = d & 0x80000000) != 0) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1943: if ((s_sign = s & 0x80000000) != 0) { do not use assignment in if condition https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 1943: if ((s_sign = s & 0x80000000) != 0) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 2321: if (ACCESS_FLAG(F_DF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 2366: if (ACCESS_FLAG(F_DF)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 2379: if (M.x86.mode & SYSMODE_32BIT_REP) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 2475: /* Regardless if we have real data from the hardware, the emulator line over 80 characters https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 2476: * will only support upto feature 1, which we set in register EAX. line over 80 characters https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 2486: /* If we don't have x86 compatible hardware, we return values from an line over 80 characters https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 2487: * Intel 486dx4; which was one of the first processors to have CPUID. line over 80 characters https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 2493: /* In the case that we have hardware CPUID instruction, we make sure line over 80 characters https://review.coreboot.org/#/c/26353/11/src/device/oprom/x86emu/prim_ops.c… PS11, Line 2500: * return all zeros when queried for invalid or unsupported feature line over 80 characters -- To view, visit https://review.coreboot.org/26353 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I010f3e02813d38293a7ab7fc84f60b8c2ec098a7 Gerrit-Change-Number: 26353 Gerrit-PatchSet: 11 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 30 May 2018 12:06:39 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

1 0

Change in coreboot[master]: cpu/intel/model_2065x: Use parallel MP init
by build bot (Jenkins) (Code Review) 30 May '18

30 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26297 ) Change subject: cpu/intel/model_2065x: Use parallel MP init ...................................................................... Patch Set 4: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/73617/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/27728/ : SUCCESS -- To view, visit https://review.coreboot.org/26297 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I56b352f9d76ee58f5c82cd431a4e0fa206f848a0 Gerrit-Change-Number: 26297 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 May 2018 12:04:42 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit May 2018