coreboot-gerrit April 2018

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Change in coreboot[master]: [WIP]soc/intel/cannonlake: Enable early mmc CMD0, CMD1
by build bot (Jenkins) (Code Review) 04 Apr '18

04 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25515 ) Change subject: [WIP]soc/intel/cannonlake: Enable early mmc CMD0, CMD1 ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23730/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/69409/ : SUCCESS -- To view, visit https://review.coreboot.org/25515 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I854cf5d323062fde1c07dd0816af127efebaa195 Gerrit-Change-Number: 25515 Gerrit-PatchSet: 1 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 04 Apr 2018 00:33:33 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: [WIP]soc/intel/cannonlake: Enable early mmc CMD0, CMD1
by Bora Guvendik (Code Review) 04 Apr '18

04 Apr '18

Bora Guvendik has uploaded this change for review. ( https://review.coreboot.org/25515 Change subject: [WIP]soc/intel/cannonlake: Enable early mmc CMD0, CMD1 ...................................................................... [WIP]soc/intel/cannonlake: Enable early mmc CMD0, CMD1 In order to improve boot time via emmc, enable Intel common code that sends CMD0 and CMD1 early in firmware. Change-Id: I854cf5d323062fde1c07dd0816af127efebaa195 Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc A src/soc/intel/cannonlake/early_mmc.c M src/soc/intel/cannonlake/include/soc/iomap.h M src/soc/intel/cannonlake/romstage/romstage.c 5 files changed, 69 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/25515/1 diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index fc73210..50c86ff 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -42,6 +42,7 @@ select SOC_AHCI_PORT_IMPLEMENTED_INVERT select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE + select SOC_INTEL_COMMON_EARLY_MMC_WAKE select SOC_INTEL_COMMON_BLOCK select SOC_INTEL_COMMON_BLOCK_ACPI select SOC_INTEL_COMMON_BLOCK_CPU diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 47f06aa..383705c 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -31,6 +31,7 @@ romstage-y += reset.c romstage-y += spi.c romstage-$(CONFIG_UART_DEBUG) += uart.c +romstage-y += early_mmc.c ramstage-y += acpi.c ramstage-y += chip.c diff --git a/src/soc/intel/cannonlake/early_mmc.c b/src/soc/intel/cannonlake/early_mmc.c new file mode 100644 index 0000000..1112210 --- /dev/null +++ b/src/soc/intel/cannonlake/early_mmc.c @@ -0,0 +1,59 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Intel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <intelblocks/early_mmc.h> +#include <intelblocks/gpio.h> + + +static const struct pad_config mmc_early_gpios[] = { + PAD_CFG_NF(GPP_F11, NONE, DEEP, NF1), /* EMMC_CMD */ + PAD_CFG_NF(GPP_F12, NONE, DEEP, NF1), /* EMMC_DAT0 */ + PAD_CFG_NF(GPP_F13, NONE, DEEP, NF1), /* EMMC_DAT1 */ + PAD_CFG_NF(GPP_F14, NONE, DEEP, NF1), /* EMMC_DAT2 */ + PAD_CFG_NF(GPP_F15, NONE, DEEP, NF1), /* EMMC_DAT3 */ + PAD_CFG_NF(GPP_F16, NONE, DEEP, NF1), /* EMMC_DAT4 */ + PAD_CFG_NF(GPP_F17, NONE, DEEP, NF1), /* EMMC_DAT5 */ + PAD_CFG_NF(GPP_F18, NONE, DEEP, NF1), /* EMMC_DAT6 */ + PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1), /* EMMC_DAT7 */ + PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1), /* EMMC_RCLK */ + PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1), /* EMMC_CLK */ + PAD_CFG_NF(GPP_F22, NONE, DEEP, NF1), /* EMMC_RST_ODL */ +}; + +int soc_set_mmc_gpios(void) +{ + gpio_configure_pads(&mmc_early_gpios[0], ARRAY_SIZE(mmc_early_gpios)); + + return 0; +} + +void soc_get_mmc_frequencies(uint32_t* f_min, uint32_t* f_max) +{ + *f_min = 400000; + *f_max = 25000000; +} + +int soc_set_mmc_dll(struct mmc_dll_params* params) +{ + params->emmc_tx_data_cntl1 = 0x0B0B; + params->emmc_tx_data_cntl2 = 0x1C292929; + params->emmc_rx_cmd_data_cntl1 = 0x1C101616; + params->emmc_rx_cmd_data_cntl2 = 0x21806; + params->emmc_rx_strobe_cntl = 0x1616; + params->emmc_tx_cmd_cntl = 0x505; + + return 0; +} diff --git a/src/soc/intel/cannonlake/include/soc/iomap.h b/src/soc/intel/cannonlake/include/soc/iomap.h index 2a3608c..c2044a0 100644 --- a/src/soc/intel/cannonlake/include/soc/iomap.h +++ b/src/soc/intel/cannonlake/include/soc/iomap.h @@ -86,4 +86,6 @@ #define P2SB_BAR CONFIG_PCR_BASE_ADDRESS #define P2SB_SIZE (16 * MiB) +#define PRERAM_MMC_BASE_ADDRESS 0xFE400000 + #endif diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 759c2c9..3784b66 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -22,6 +22,7 @@ #include <console/console.h> #include <fsp/util.h> #include <intelblocks/cse.h> +#include <intelblocks/early_mmc.h> #include <intelblocks/pmclib.h> #include <memory_info.h> #include <soc/intel/common/smbios.h> @@ -128,6 +129,11 @@ if (postcar_frame_init(&pcf, 1 * KiB)) die("Unable to initialize postcar frame.\n"); + if (IS_ENABLED(CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE)) { + if (early_mmc_wake_hw() < 0) + printk(BIOS_DEBUG, "Early mmc initilization failed \n"); + } + /* * We need to make sure ramstage will be run cached. At this * point exact location of ramstage in cbmem is not known. -- To view, visit https://review.coreboot.org/25515 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I854cf5d323062fde1c07dd0816af127efebaa195 Gerrit-Change-Number: 25515 Gerrit-PatchSet: 1 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com>

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Change in coreboot[master]: coreboot_tables: pass the early_mmc_wake_hw status to payload
by build bot (Jenkins) (Code Review) 04 Apr '18

04 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25464 ) Change subject: coreboot_tables: pass the early_mmc_wake_hw status to payload ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23729/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/69408/ : SUCCESS -- To view, visit https://review.coreboot.org/25464 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia4c57d05433c3966118c3642913d7017958cce55 Gerrit-Change-Number: 25464 Gerrit-PatchSet: 3 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 03 Apr 2018 22:31:08 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: intel/common/block/scs: Add ability to send early CMD0, CMD1
by build bot (Jenkins) (Code Review) 04 Apr '18

04 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25068 ) Change subject: intel/common/block/scs: Add ability to send early CMD0, CMD1 ...................................................................... Patch Set 5: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23728/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/69407/ : SUCCESS -- To view, visit https://review.coreboot.org/25068 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3488b077bf5100a1e0f2c879fb1436105607d25e Gerrit-Change-Number: 25068 Gerrit-PatchSet: 5 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Tue, 03 Apr 2018 22:28:11 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: commonlib/storage: Make pci sdhci code compile in romstage
by build bot (Jenkins) (Code Review) 04 Apr '18

04 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25067 ) Change subject: commonlib/storage: Make pci sdhci code compile in romstage ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23727/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/69406/ : SUCCESS -- To view, visit https://review.coreboot.org/25067 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If9438d0b707c6ffaa61db80bd1d385112bc91cfc Gerrit-Change-Number: 25067 Gerrit-PatchSet: 3 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Tue, 03 Apr 2018 22:23:53 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/apollolake: Enable early mmc CMD0, CMD1 for GLK
by build bot (Jenkins) (Code Review) 04 Apr '18

04 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25514 ) Change subject: soc/intel/apollolake: Enable early mmc CMD0, CMD1 for GLK ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23726/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/69405/ : SUCCESS -- To view, visit https://review.coreboot.org/25514 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib4e791607059d12b3f5692f6404cb9eb39d79f6d Gerrit-Change-Number: 25514 Gerrit-PatchSet: 2 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 03 Apr 2018 22:22:11 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: commonlib/storage: Make sd_mmc_go_idle an api
by build bot (Jenkins) (Code Review) 04 Apr '18

04 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25066 ) Change subject: commonlib/storage: Make sd_mmc_go_idle an api ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23725/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/69404/ : SUCCESS -- To view, visit https://review.coreboot.org/25066 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I064a9bded347be5d500047df92d1c448c3392016 Gerrit-Change-Number: 25066 Gerrit-PatchSet: 3 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Tue, 03 Apr 2018 22:19:53 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: coreboot_tables: pass the early_mmc_wake_hw status to payload
by build bot (Jenkins) (Code Review) 04 Apr '18

04 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25464 ) Change subject: coreboot_tables: pass the early_mmc_wake_hw status to payload ...................................................................... Patch Set 2: Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/69402/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/23723/ : SUCCESS -- To view, visit https://review.coreboot.org/25464 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia4c57d05433c3966118c3642913d7017958cce55 Gerrit-Change-Number: 25464 Gerrit-PatchSet: 2 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 03 Apr 2018 22:03:08 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: intel/common/block/scs: Add ability to send early CMD0, CMD1
by build bot (Jenkins) (Code Review) 03 Apr '18

03 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25068 ) Change subject: intel/common/block/scs: Add ability to send early CMD0, CMD1 ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23721/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/69400/ : SUCCESS -- To view, visit https://review.coreboot.org/25068 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3488b077bf5100a1e0f2c879fb1436105607d25e Gerrit-Change-Number: 25068 Gerrit-PatchSet: 4 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Tue, 03 Apr 2018 21:54:51 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/apollolake: Enable early mmc CMD0, CMD1 for GLK
by build bot (Jenkins) (Code Review) 03 Apr '18

03 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25514 ) Change subject: soc/intel/apollolake: Enable early mmc CMD0, CMD1 for GLK ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23724/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/69403/ : SUCCESS -- To view, visit https://review.coreboot.org/25514 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib4e791607059d12b3f5692f6404cb9eb39d79f6d Gerrit-Change-Number: 25514 Gerrit-PatchSet: 1 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 03 Apr 2018 21:53:00 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit April 2018