Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/25664
to look at the new patch set (#3).
Change subject: nb/intel/sandybridge: support more XMP timings
......................................................................
nb/intel/sandybridge: support more XMP timings
Tested with a pair of GSkill F3-1866C9-8GSR.
This makes sure in particular that we honor the CMD rate requested by
the XMP profile. This memory kit needs a CMD rate of 2 to be stable at
DDR3-1600 and up, even though it passes training at 1.
Also respect requested CWL to match vendor firmware and for a potential
increase in performance. The tested kit requests a tighter value than
the per-frequency table provides and has shown to be stable using that
setting.
Change-Id: I634bed764d76345c27f02a2fae5abb2d81b38fd9
Signed-off-by: Dan Elkouby <streetwalkermc(a)gmail.com>
---
M src/northbridge/intel/sandybridge/raminit_common.c
M src/northbridge/intel/sandybridge/raminit_common.h
M src/northbridge/intel/sandybridge/raminit_ivy.c
M src/northbridge/intel/sandybridge/raminit_sandy.c
4 files changed, 17 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/25664/3
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Gerrit-Change-Id: I634bed764d76345c27f02a2fae5abb2d81b38fd9
Gerrit-Change-Number: 25664
Gerrit-PatchSet: 3
Gerrit-Owner: Dan Elkouby <streetwalkermc(a)gmail.com>
Gerrit-Reviewer: Dan Elkouby <streetwalkermc(a)gmail.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org>
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/25663 )
Change subject: device/dram/ddr3: improve XMP support
......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/25663/2/src/device/dram/ddr3.c
File src/device/dram/ddr3.c:
https://review.coreboot.org/#/c/25663/2/src/device/dram/ddr3.c@584
PS2, Line 584: print_ns(" tCMDmin : ", dimm->tCMD);
> Should I add a function along the lines of print_tck for this?
printk(BIOS_INFO, ... should be sufficient
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Gerrit-Change-Id: Ie4f545ed1df92c146be02f56fea0ca9037478649
Gerrit-Change-Number: 25663
Gerrit-PatchSet: 2
Gerrit-Owner: Dan Elkouby <streetwalkermc(a)gmail.com>
Gerrit-Reviewer: Dan Elkouby <streetwalkermc(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Comment-Date: Sat, 14 Apr 2018 11:10:08 +0000
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Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/25664 )
Change subject: nb/intel/sandybridge: support more XMP timings
......................................................................
Patch Set 2: Code-Review+1
(2 comments)
https://review.coreboot.org/#/c/25664/1/src/northbridge/intel/sandybridge/r…
File src/northbridge/intel/sandybridge/raminit_common.c:
https://review.coreboot.org/#/c/25664/1/src/northbridge/intel/sandybridge/r…
PS1, Line 2362: /* XMP gives the CMD rate in clock ticks, not ns */
> The value here is offset by 1: 0 for a CMD rate of 1, 1 for a CMD rate of 2. […]
Ah, right
https://review.coreboot.org/#/c/25664/2/src/northbridge/intel/sandybridge/r…
File src/northbridge/intel/sandybridge/raminit_common.c:
https://review.coreboot.org/#/c/25664/2/src/northbridge/intel/sandybridge/r…
PS2, Line 2355: * TODO: How to detect "1T" DIMMs ?
update the comment ?
"Works only for dual XMP 1T DIMMs"
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Gerrit-Comment-Date: Sat, 14 Apr 2018 11:07:16 +0000
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Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/25663 )
Change subject: device/dram/ddr3: improve XMP support
......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/25663/2/src/device/dram/ddr3.c
File src/device/dram/ddr3.c:
https://review.coreboot.org/#/c/25663/2/src/device/dram/ddr3.c@584
PS2, Line 584: print_ns(" tCMDmin : ", dimm->tCMD);
It's not in units of ns, but tCK/ns
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Gerrit-Comment-Date: Sat, 14 Apr 2018 10:55:28 +0000
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/25663
to look at the new patch set (#2).
Change subject: device/dram/ddr3: improve XMP support
......................................................................
device/dram/ddr3: improve XMP support
- Fix offsets for supported CAS latencies
- Add support for reading CWL and CMD rate from the profile
Change-Id: Ie4f545ed1df92c146be02f56fea0ca9037478649
Signed-off-by: Dan Elkouby <streetwalkermc(a)gmail.com>
---
M src/device/dram/ddr3.c
M src/include/device/dram/ddr3.h
2 files changed, 17 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/25663/2
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Gerrit-Project: coreboot
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ie4f545ed1df92c146be02f56fea0ca9037478649
Gerrit-Change-Number: 25663
Gerrit-PatchSet: 2
Gerrit-Owner: Dan Elkouby <streetwalkermc(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/25664
to look at the new patch set (#2).
Change subject: nb/intel/sandybridge: support more XMP timings
......................................................................
nb/intel/sandybridge: support more XMP timings
Tested with a pair of GSkill F3-1866C9-8GSR.
This makes sure in particular that we honor the CMD rate requested by
the XMP profile. This memory kit needs a CMD rate of 2 to be stable at
DDR3-1600 and up, even though it passes training at 1.
Also respect requested CWL to match vendor firmware and for a potential
increase in performance. The tested kit requests a tighter value than
the per-frequency table provides and has shown to be stable using that
setting.
Change-Id: I634bed764d76345c27f02a2fae5abb2d81b38fd9
Signed-off-by: Dan Elkouby <streetwalkermc(a)gmail.com>
---
M src/northbridge/intel/sandybridge/raminit_common.c
M src/northbridge/intel/sandybridge/raminit_common.h
M src/northbridge/intel/sandybridge/raminit_ivy.c
M src/northbridge/intel/sandybridge/raminit_sandy.c
4 files changed, 15 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/25664/2
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
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Gerrit-Change-Id: I634bed764d76345c27f02a2fae5abb2d81b38fd9
Gerrit-Change-Number: 25664
Gerrit-PatchSet: 2
Gerrit-Owner: Dan Elkouby <streetwalkermc(a)gmail.com>
Gerrit-Reviewer: Dan Elkouby <streetwalkermc(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org>