Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/25702
Change subject: mb//google/cyan/spd/spd.c: Fix module part number transfer
......................................................................
mb//google/cyan/spd/spd.c: Fix module part number transfer
With the increase of dimm->module_part_number size from 19 to 21 (commit
35b273eea3), this code is now advancing outside DDR3 SPD designated space.
The correct size is already defined as LPDDR3_SPD_PART_LEN, use it. Also make
sure to 0 terminate the string.
BUG=b:77943312
TEST=Build cyan.
Change-Id: Iba0ef4149acfc09b7672fce079df06bf1a01dff6
Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com>
---
M src/mainboard/google/cyan/spd/spd.c
1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/25702/1
diff --git a/src/mainboard/google/cyan/spd/spd.c b/src/mainboard/google/cyan/spd/spd.c
index a3db2ed..3b93db1 100644
--- a/src/mainboard/google/cyan/spd/spd.c
+++ b/src/mainboard/google/cyan/spd/spd.c
@@ -145,7 +145,8 @@
dimm->dimm_size = capmb / 8 * busw / devw * ranks; /* MiB */
dimm->mod_type = spd[3] & 0xf;
memcpy((char *)&dimm->module_part_number[0], &spd[0x80],
- sizeof(dimm->module_part_number) - 1);
+ LPDDR3_SPD_PART_LEN);
+ dimm->module_part_number[LPDDR3_SPD_PART_LEN] = 0;
dimm->mod_id = *(uint16_t *)&spd[0x94];
switch (busw) {
--
To view, visit https://review.coreboot.org/25702
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iba0ef4149acfc09b7672fce079df06bf1a01dff6
Gerrit-Change-Number: 25702
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>