coreboot-gerrit March 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: amd/stoneyridge: Add PM1 wake status to boot log
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25300 ) Change subject: amd/stoneyridge: Add PM1 wake status to boot log ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/68846/ : SUCCESS -- To view, visit https://review.coreboot.org/25300 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Idc9d12326abb290e4f7a5c60677eb6e057d475b2 Gerrit-Change-Number: 25300 Gerrit-PatchSet: 2 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshall.dawson(a)scarletltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 19:53:27 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: amd/stoneyridge: Add PM1 wake status to boot log
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25300 ) Change subject: amd/stoneyridge: Add PM1 wake status to boot log ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-checkpatch/23224/ : ABORTED https://qa.coreboot.org/job/coreboot-gerrit/68845/ : FAILURE -- To view, visit https://review.coreboot.org/25300 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Idc9d12326abb290e4f7a5c60677eb6e057d475b2 Gerrit-Change-Number: 25300 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshall.dawson(a)scarletltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 19:49:24 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: amd/stoneyridge: Add PM1 wake status to boot log
by Marshall Dawson (Code Review) 20 Mar '18

20 Mar '18

Hello Marshall Dawson, I'd like you to reexamine a change. Please visit https://review.coreboot.org/25300 to look at the new patch set (#2). Change subject: amd/stoneyridge: Add PM1 wake status to boot log ...................................................................... amd/stoneyridge: Add PM1 wake status to boot log Print the wake status bits to the console. The format is kept similar to Intel's to maintain compatilibity with inspection utilities. Add relevant wake events from the register to the ELOG. Clear the register before continuing. TEST=Inspect console and ELOG for Grunt BUG=b:75020968 Change-Id: Idc9d12326abb290e4f7a5c60677eb6e057d475b2 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/stoneyridge/southbridge.c 1 file changed, 71 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/25300/2 -- To view, visit https://review.coreboot.org/25300 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Idc9d12326abb290e4f7a5c60677eb6e057d475b2 Gerrit-Change-Number: 25300 Gerrit-PatchSet: 2 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshall.dawson(a)scarletltd.com>

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Change in coreboot[master]: amd/stoneyridge: Add PM1 wake status to boot log
by Marshall Dawson (Code Review) 20 Mar '18

20 Mar '18

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/25300 Change subject: amd/stoneyridge: Add PM1 wake status to boot log ...................................................................... amd/stoneyridge: Add PM1 wake status to boot log Print the wake status bits to the console. The format is kept similar to Intel's to maintain compatilibity with inspection utilities. Add relevant wake events from the register to the ELOG. Clear the register before continuing. TEST=Inspect console and ELOG for Grunt BUG=b:75020968 Change-Id: Idc9d12326abb290e4f7a5c60677eb6e057d475b2 --- M src/soc/amd/stoneyridge/southbridge.c 1 file changed, 71 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/25300/1 diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index bb3157d..c27b9e3 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -23,6 +23,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <cbmem.h> +#include <elog.h> #include <amdblocks/amd_pci_util.h> #include <soc/southbridge.h> #include <soc/smi.h> @@ -612,9 +613,79 @@ PM_ACPI_TIMER_EN_EN); } +static void print_num_status_bits(int num_bits, uint32_t status, + const char *const bit_names[]) +{ + int i; + + if (!status) + return; + + for (i = num_bits - 1; i >= 0; i--) { + if (status & (1 << i)) { + if (bit_names[i]) + printk(BIOS_DEBUG, "%s ", bit_names[i]); + else + printk(BIOS_DEBUG, "BIT%d ", i); + } + } +} + +static uint16_t reset_pm1_status(void) +{ + uint16_t pm1_sts = inw(ACPI_PM_EVT_BLK); + outw(pm1_sts, ACPI_PM_EVT_BLK); + return pm1_sts; +} + +static uint16_t print_pm1_status(uint16_t pm1_sts) +{ + static const char *const pm1_sts_bits[] = { + [0] = "TMROF", + [4] = "BMSTATUS", + [5] = "GBL", + [8] = "PWRBTN", + [10] = "RTC", + [14] = "PCIEXPWAK", + [15] = "WAK", + }; + + if (!pm1_sts) + return 0; + + printk(BIOS_SPEW, "PM1_STS: "); + print_num_status_bits(ARRAY_SIZE(pm1_sts_bits), pm1_sts, pm1_sts_bits); + printk(BIOS_SPEW, "\n"); + + return pm1_sts; +} + +static void sb_log_pm1_status(uint16_t pm1_sts) +{ + if (!IS_ENABLED(CONFIG_ELOG)) + return; + + if (pm1_sts & PWRBTN_STS) + elog_add_event_wake(ELOG_WAKE_SOURCE_PWRBTN, 0); + + if (pm1_sts & RTC_STS) + elog_add_event_wake(ELOG_WAKE_SOURCE_RTC, 0); + + if (pm1_sts & PCIEXPWAK_STS) + elog_add_event_wake(ELOG_WAKE_SOURCE_PCIE, 0); +} + +static void sb_clear_pm1_status(void) +{ + uint16_t pm1_sts = reset_pm1_status(); + sb_log_pm1_status(pm1_sts); + print_pm1_status(pm1_sts); +} + void southbridge_init(void *chip_info) { sb_init_acpi_ports(); + sb_clear_pm1_status(); } void southbridge_final(void *chip_info) -- To view, visit https://review.coreboot.org/25300 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Idc9d12326abb290e4f7a5c60677eb6e057d475b2 Gerrit-Change-Number: 25300 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshall.dawson(a)scarletltd.com>

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Change in coreboot[master]: [WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25290 ) Change subject: [WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot ...................................................................... Patch Set 6: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/68844/ : SUCCESS -- To view, visit https://review.coreboot.org/25290 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4eef23f637f781b709696951c5bd825530cc1d11 Gerrit-Change-Number: 25290 Gerrit-PatchSet: 6 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 19:42:01 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/cannonlake: Clear EMMC timeout for USB boot
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25290 ) Change subject: soc/intel/cannonlake: Clear EMMC timeout for USB boot ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23223/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68843/ : SUCCESS -- To view, visit https://review.coreboot.org/25290 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4eef23f637f781b709696951c5bd825530cc1d11 Gerrit-Change-Number: 25290 Gerrit-PatchSet: 5 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 19:34:13 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/octopus: Configure GPIO_199 as native
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25294 ) Change subject: mb/google/octopus: Configure GPIO_199 as native ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23222/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68842/ : SUCCESS -- To view, visit https://review.coreboot.org/25294 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I09d5ed8ddf547d190824e2fba01050312077af7c Gerrit-Change-Number: 25294 Gerrit-PatchSet: 3 Gerrit-Owner: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shamile Khan <shamile.khan(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Justin TerAvest <teravest(a)chromium.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 19:11:05 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: [WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25290 ) Change subject: [WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23221/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68841/ : SUCCESS -- To view, visit https://review.coreboot.org/25290 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4eef23f637f781b709696951c5bd825530cc1d11 Gerrit-Change-Number: 25290 Gerrit-PatchSet: 4 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 18:51:49 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: [WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25290 ) Change subject: [WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot ...................................................................... Patch Set 3: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-checkpatch/23220/ : ABORTED https://qa.coreboot.org/job/coreboot-gerrit/68840/ : ABORTED -- To view, visit https://review.coreboot.org/25290 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4eef23f637f781b709696951c5bd825530cc1d11 Gerrit-Change-Number: 25290 Gerrit-PatchSet: 3 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 18:41:53 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/apollolake: Enable ThunderPeak wifi card for glkrvp
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/24932 ) Change subject: soc/intel/apollolake: Enable ThunderPeak wifi card for glkrvp ...................................................................... Patch Set 6: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/68838/ : SUCCESS -- To view, visit https://review.coreboot.org/24932 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic06b5bfecc5061b53f9256476aeb53bca67c0b9c Gerrit-Change-Number: 24932 Gerrit-PatchSet: 6 Gerrit-Owner: Roy Mingi Park <roy.mingi.park(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Roy Mingi Park <roy.mingi.park(a)intel.com> Gerrit-Reviewer: Shamile Khan <shamile.khan(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 17:00:20 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit March 2018