coreboot-gerrit March 2018

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Change in coreboot[master]: Update dimm_info documentation to reference the JEDEC SPD spec.
by build bot (Jenkins) (Code Review) 21 Mar '18

21 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25301 ) Change subject: Update dimm_info documentation to reference the JEDEC SPD spec. ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23237/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68864/ : SUCCESS -- To view, visit https://review.coreboot.org/25301 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1f2a3a70919c34f17472904323ec5accdfc876be Gerrit-Change-Number: 25301 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Comment-Date: Wed, 21 Mar 2018 16:24:40 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/amd: Print dimm_info and TYPE17_DMI_INFO to help debug incorrect ...
by build bot (Jenkins) (Code Review) 21 Mar '18

21 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25303 ) Change subject: soc/amd: Print dimm_info and TYPE17_DMI_INFO to help debug incorrect values ...................................................................... Patch Set 3: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/68862/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/23235/ : SUCCESS -- To view, visit https://review.coreboot.org/25303 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5eac00b9400056357915761287770a400b3f9f8b Gerrit-Change-Number: 25303 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Comment-Date: Wed, 21 Mar 2018 15:54:50 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/amd: Fix generating SMBIOS Type 17
by build bot (Jenkins) (Code Review) 21 Mar '18

21 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25304 ) Change subject: soc/amd: Fix generating SMBIOS Type 17 ...................................................................... Patch Set 3: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/68863/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/23236/ : SUCCESS -- To view, visit https://review.coreboot.org/25304 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I076bc3f965f81a9374c8976da48c7fdce014dc0c Gerrit-Change-Number: 25304 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Comment-Date: Wed, 21 Mar 2018 15:47:22 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: Strip trailing whitespace on DMI 17 part number.
by build bot (Jenkins) (Code Review) 21 Mar '18

21 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25302 ) Change subject: Strip trailing whitespace on DMI 17 part number. ...................................................................... Patch Set 3: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/68861/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/23234/ : SUCCESS -- To view, visit https://review.coreboot.org/25302 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia10ef434a2377e34ae7a8f733c6465c2f8ee8dfa Gerrit-Change-Number: 25302 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 21 Mar 2018 15:47:12 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: Update dimm_info documentation to reference the JEDEC SPD spec.
by build bot (Jenkins) (Code Review) 21 Mar '18

21 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25301 ) Change subject: Update dimm_info documentation to reference the JEDEC SPD spec. ...................................................................... Patch Set 2: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/68860/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/23233/ : SUCCESS -- To view, visit https://review.coreboot.org/25301 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1f2a3a70919c34f17472904323ec5accdfc876be Gerrit-Change-Number: 25301 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Comment-Date: Wed, 21 Mar 2018 15:46:43 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel: Add KBL-S MCH and some KBL PCH support
by build bot (Jenkins) (Code Review) 21 Mar '18

21 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25305 ) Change subject: soc/intel: Add KBL-S MCH and some KBL PCH support ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/68859/ : SUCCESS -- To view, visit https://review.coreboot.org/25305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If03abb215f225d648505e05274e2f08ff02cebdc Gerrit-Change-Number: 25305 Gerrit-PatchSet: 2 Gerrit-Owner: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 21 Mar 2018 14:49:38 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel: Add KBL-S MCH and some KBL PCH support
by build bot (Jenkins) (Code Review) 21 Mar '18

21 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25305 ) Change subject: soc/intel: Add KBL-S MCH and some KBL PCH support ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-checkpatch/23232/ : ABORTED https://qa.coreboot.org/job/coreboot-gerrit/68858/ : ABORTED -- To view, visit https://review.coreboot.org/25305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If03abb215f225d648505e05274e2f08ff02cebdc Gerrit-Change-Number: 25305 Gerrit-PatchSet: 1 Gerrit-Owner: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 21 Mar 2018 14:45:19 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel: Add KBL-S MCH and some KBL PCH support
by Gaggery Tsai (Code Review) 21 Mar '18

21 Mar '18

Gaggery Tsai has uploaded a new patch set (#2). ( https://review.coreboot.org/25305 ) Change subject: soc/intel: Add KBL-S MCH and some KBL PCH support ...................................................................... soc/intel: Add KBL-S MCH and some KBL PCH support This patch adds the support for KBL-S MCH and Z270, H270, B250 and Q250 PCH chips. BUG=None BRANCH=None TEST=Boot with KBL-S CPU and B250/H270 PCHs. Change-Id: If03abb215f225d648505e05274e2f08ff02cebdc Signed-off-by: Gaggery Tsai <gaggery.tsai(a)intel.com> --- M src/include/device/pci_ids.h M src/soc/intel/common/block/lpc/lpc.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/skylake/bootblock/report_platform.c 4 files changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/25305/2 -- To view, visit https://review.coreboot.org/25305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: If03abb215f225d648505e05274e2f08ff02cebdc Gerrit-Change-Number: 25305 Gerrit-PatchSet: 2 Gerrit-Owner: Gaggery Tsai <gaggery.tsai(a)intel.com>

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Change in coreboot[master]: Update dimm_info documentation to reference the JEDEC SPD spec.
by Idwer Vollering (Code Review) 21 Mar '18

21 Mar '18

Idwer Vollering has posted comments on this change. ( https://review.coreboot.org/25301 ) Change subject: Update dimm_info documentation to reference the JEDEC SPD spec. ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/25301/1//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/25301/1//COMMIT_MSG@12 PS1, Line 12: Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> There should be a newline between where you end the detail paragraph(s) and the sign-off line. -- To view, visit https://review.coreboot.org/25301 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1f2a3a70919c34f17472904323ec5accdfc876be Gerrit-Change-Number: 25301 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Comment-Date: Wed, 21 Mar 2018 14:43:18 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel: Add KBL-S MCH and some KBL PCH support
by Gaggery Tsai (Code Review) 21 Mar '18

21 Mar '18

Gaggery Tsai has uploaded this change for review. ( https://review.coreboot.org/25305 Change subject: soc/intel: Add KBL-S MCH and some KBL PCH support ...................................................................... soc/intel: Add KBL-S MCH and some KBL PCH support This patch adds the support for KBL-S MCH and Z270, H270, B250 and Q250 PCH chips. Change-Id: If03abb215f225d648505e05274e2f08ff02cebdc Signed-off-by: Gaggery Tsai <gaggery.tsai(a)intel.com> --- M src/include/device/pci_ids.h M src/soc/intel/common/block/lpc/lpc.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/skylake/bootblock/report_platform.c 4 files changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/25305/1 diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index c184383..e53d1b0 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2669,7 +2669,11 @@ #define PCI_DEVICE_ID_INTEL_SPT_H_C236 0xa150 #define PCI_DEVICE_ID_INTEL_SPT_H_PREMIUM 0xa14e #define PCI_DEVICE_ID_INTEL_SPT_H_QM170 0xa14d +#define PCI_DEVICE_ID_INTEL_KBP_H_H270 0xa2c4 +#define PCI_DEVICE_ID_INTEL_KBP_H_Z270 0xa2c5 #define PCI_DEVICE_ID_INTEL_KBP_H_Q270 0xa2c6 +#define PCI_DEVICE_ID_INTEL_KBP_H_Q250 0xa2c7 +#define PCI_DEVICE_ID_INTEL_KBP_H_B250 0xa2c8 #define PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22 0x9d4b #define PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22 0x9d4e #define PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22 0x9d50 @@ -2883,6 +2887,7 @@ #define PCI_DEVICE_ID_INTEL_SKL_ID_Y 0x190c #define PCI_DEVICE_ID_INTEL_SKL_ID_ULX 0x1924 #define PCI_DEVICE_ID_INTEL_SKL_ID_H 0x1910 +#define PCI_DEVICE_ID_INTEL_KBL_ID_S 0x590f #define PCI_DEVICE_ID_INTEL_SKL_ID_H_EM 0x1918 #define PCI_DEVICE_ID_INTEL_KBL_ID_U 0x5904 #define PCI_DEVICE_ID_INTEL_KBL_ID_Y 0x590c diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index 2efdc8d..079ecde 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -128,6 +128,10 @@ PCI_DEVICE_ID_INTEL_SPT_H_PREMIUM, PCI_DEVICE_ID_INTEL_SPT_H_QM170, PCI_DEVICE_ID_INTEL_KBP_H_Q270, + PCI_DEVICE_ID_INTEL_KBP_H_H270, + PCI_DEVICE_ID_INTEL_KBP_H_Z270, + PCI_DEVICE_ID_INTEL_KBP_H_Q250, + PCI_DEVICE_ID_INTEL_KBP_H_B250, PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22, PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22, PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22, diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 027222b..25b4773 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -293,6 +293,7 @@ PCI_DEVICE_ID_INTEL_SKL_ID_Y, PCI_DEVICE_ID_INTEL_SKL_ID_ULX, PCI_DEVICE_ID_INTEL_SKL_ID_H, + PCI_DEVICE_ID_INTEL_KBL_ID_S, PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, PCI_DEVICE_ID_INTEL_KBL_ID_U, PCI_DEVICE_ID_INTEL_KBL_ID_Y, diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index 6f2e98e..7473c57 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -56,6 +56,7 @@ { PCI_DEVICE_ID_INTEL_KBL_U_R, "Kabylake-R ULT"}, { PCI_DEVICE_ID_INTEL_KBL_ID_Y, "Kabylake-Y" }, { PCI_DEVICE_ID_INTEL_KBL_ID_H, "Kabylake-H" }, + { PCI_DEVICE_ID_INTEL_KBL_ID_S, "Kabylake-S" }, { PCI_DEVICE_ID_INTEL_KBL_ID_DT, "Kabylake DT" }, }; @@ -71,6 +72,10 @@ { PCI_DEVICE_ID_INTEL_SPT_H_C236, "Skylake PCH-H C236" }, { PCI_DEVICE_ID_INTEL_SPT_H_QM170, "Skylake PCH-H QM170" }, { PCI_DEVICE_ID_INTEL_KBP_H_Q270, "Kabylake-H Q270" }, + { PCI_DEVICE_ID_INTEL_KBP_H_H270, "Kabylake-H H270" }, + { PCI_DEVICE_ID_INTEL_KBP_H_Z270, "Kabylake-H Z270" }, + { PCI_DEVICE_ID_INTEL_KBP_H_B250, "Kabylake-H B250" }, + { PCI_DEVICE_ID_INTEL_KBP_H_Q250, "Kabylake-H Q250" }, { PCI_DEVICE_ID_INTEL_KBP_LP_U_PREMIUM, "Kabylake-U Premium" }, { PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM, "Kabylake-Y Premium" }, { PCI_DEVICE_ID_INTEL_KBP_LP_SUPER_SKU, "Kabylake Super Sku" }, -- To view, visit https://review.coreboot.org/25305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: If03abb215f225d648505e05274e2f08ff02cebdc Gerrit-Change-Number: 25305 Gerrit-PatchSet: 1 Gerrit-Owner: Gaggery Tsai <gaggery.tsai(a)intel.com>

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coreboot-gerrit March 2018