coreboot-gerrit February 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: ec/google/chromeec: Remove extra newline characters from printk
by Furquan Shaikh (Code Review) 24 Feb '18

24 Feb '18

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/23858 Change subject: ec/google/chromeec: Remove extra newline characters from printk ...................................................................... ec/google/chromeec: Remove extra newline characters from printk This change removes extra newline characters from print statements for wake masks. Change-Id: I13cde76bfb0f10b1dda8117c27f2891e909f9669 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/ec/google/chromeec/ec.c 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/23858/1 diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index c902c3f..ef7a217 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -272,7 +272,7 @@ static int google_chromeec_set_s3_lazy_wake_mask(uint64_t mask) { - printk(BIOS_DEBUG, "Chrome EC: Set S3 LAZY WAKE mask to 0x%016llx\n\n", + printk(BIOS_DEBUG, "Chrome EC: Set S3 LAZY WAKE mask to 0x%016llx\n", mask); return google_chromeec_set_mask (EC_HOST_EVENT_LAZY_WAKE_MASK_S3, mask); @@ -280,7 +280,7 @@ static int google_chromeec_set_s5_lazy_wake_mask(uint64_t mask) { - printk(BIOS_DEBUG, "Chrome EC: Set S5 LAZY WAKE mask to 0x%016llx\n\n", + printk(BIOS_DEBUG, "Chrome EC: Set S5 LAZY WAKE mask to 0x%016llx\n", mask); return google_chromeec_set_mask (EC_HOST_EVENT_LAZY_WAKE_MASK_S5, mask); @@ -288,7 +288,7 @@ static int google_chromeec_set_s0ix_lazy_wake_mask(uint64_t mask) { - printk(BIOS_DEBUG, "Chrome EC: Set S0iX LAZY WAKE mask to 0x%016llx\n\n", + printk(BIOS_DEBUG, "Chrome EC: Set S0iX LAZY WAKE mask to 0x%016llx\n", mask); return google_chromeec_set_mask (EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, mask); -- To view, visit https://review.coreboot.org/23858 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I13cde76bfb0f10b1dda8117c27f2891e909f9669 Gerrit-Change-Number: 23858 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: soc/intel/skylake: Add support to print ME version
by build bot (Jenkins) (Code Review) 23 Feb '18

23 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23857 ) Change subject: soc/intel/skylake: Add support to print ME version ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67847/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22340/ : SUCCESS -- To view, visit https://review.coreboot.org/23857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I360d5d7420950d5aa255df08be6d7123621b87a8 Gerrit-Change-Number: 23857 Gerrit-PatchSet: 2 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 23 Feb 2018 22:33:27 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/skylake: Add support to print ME version
by Furquan Shaikh (Code Review) 23 Feb '18

23 Feb '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/23857 to look at the new patch set (#2). Change subject: soc/intel/skylake: Add support to print ME version ...................................................................... soc/intel/skylake: Add support to print ME version This change adds a boot state callback to print ME version after DEV_ENABLE is complete. Information is printed only if UART_DEBUG is enabled because talking to ME to get the firmware version adds ~1 second to boot time. Change-Id: I360d5d7420950d5aa255df08be6d7123621b87a8 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/soc/intel/skylake/include/soc/me.h M src/soc/intel/skylake/me.c 2 files changed, 78 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/23857/2 -- To view, visit https://review.coreboot.org/23857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I360d5d7420950d5aa255df08be6d7123621b87a8 Gerrit-Change-Number: 23857 Gerrit-PatchSet: 2 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/skylake: Add support to print ME version
by build bot (Jenkins) (Code Review) 23 Feb '18

23 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23857 ) Change subject: soc/intel/skylake: Add support to print ME version ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67846/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22339/ : SUCCESS -- To view, visit https://review.coreboot.org/23857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I360d5d7420950d5aa255df08be6d7123621b87a8 Gerrit-Change-Number: 23857 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 23 Feb 2018 22:15:58 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/skylake: Add support to print ME version
by Furquan Shaikh (Code Review) 23 Feb '18

23 Feb '18

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/23857 Change subject: soc/intel/skylake: Add support to print ME version ...................................................................... soc/intel/skylake: Add support to print ME version This change adds a boot state callback to print ME version after DEV_ENABLE is complete. Information is printed only if UART_DEBUG is enabled because talking to ME to get the firmware version adds ~1 second to boot time. Change-Id: I360d5d7420950d5aa255df08be6d7123621b87a8 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/soc/intel/skylake/include/soc/me.h M src/soc/intel/skylake/me.c 2 files changed, 78 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/23857/1 diff --git a/src/soc/intel/skylake/include/soc/me.h b/src/soc/intel/skylake/include/soc/me.h index e4b6abf..590bfb7 100644 --- a/src/soc/intel/skylake/include/soc/me.h +++ b/src/soc/intel/skylake/include/soc/me.h @@ -202,9 +202,13 @@ } __packed fields; }; +#define MKHI_GEN_GROUP_ID 0xff + /* Reset Request */ #define MKHI_GLOBAL_RESET 0x0b +#define MKHI_GET_FW_VERSION 0x02 + #define GR_ORIGIN_BIOS_MEM_INIT 0x01 #define GR_ORIGIN_BIOS_POST 0x02 #define GR_ORIGIN_MEBX 0x03 diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c index 2569bcf..c9a0dfa 100644 --- a/src/soc/intel/skylake/me.c +++ b/src/soc/intel/skylake/me.c @@ -14,6 +14,7 @@ */ #include <arch/io.h> +#include <bootstate.h> #include <commonlib/helpers.h> #include <compiler.h> #include <console/console.h> @@ -203,6 +204,79 @@ "M0 kernel load", }; +static void print_me_version(void *unused) +{ + struct mkhi_hdr { + uint8_t group_id; + uint8_t command:7; + uint8_t is_resp:1; + uint8_t rsvd; + uint8_t result; + } __packed; + + struct version { + uint16_t minor; + uint16_t major; + uint16_t build; + uint16_t hotfix; + } __packed; + + struct fw_ver_resp { + struct mkhi_hdr hdr; + struct version code; + struct version rec; + struct version fitc; + } __packed; + + struct mkhi_hdr fw_ver_msg = { + .group_id = MKHI_GEN_GROUP_ID, + .command = MKHI_GET_FW_VERSION, + }; + + struct fw_ver_resp resp; + size_t resp_size = sizeof(resp); + union me_hfs hfs; + + /* + * Print ME version only if UART debugging is enabled. Else, it takes ~1 + * second to talk to ME and get this information. + */ + if (!IS_ENABLED(CONFIG_UART_DEBUG)) + return; + + hfs.data = me_read_config32(PCI_ME_HFSTS1); + /* + * This command can be run only if: + * Working state is normal and + * Operation mode is normal. + */ + if ((hfs.fields.working_state != ME_HFS_CWS_NORMAL) || + (hfs.fields.operation_mode != ME_HFS_MODE_NORMAL)) + goto failed; + + if (!heci_send(&fw_ver_msg, sizeof(fw_ver_msg), BIOS_HOST_ADD, + HECI_MKHI_ADD)) + goto failed; + + if (!heci_receive(&resp, &resp_size)) + goto failed; + + if (resp.hdr.result) + goto failed; + + printk(BIOS_DEBUG, "ME: Version : %d.%d.%d.%d\n", resp.code.major, + resp.code.minor, resp.code.hotfix, resp.code.build); + return; + +failed: + printk(BIOS_DEBUG, "ME: Version : Unavailable\n"); +} +/* + * This can't be put in intel_me_status because by the time control + * reaches there, ME doesn't respond to GET_FW_VERSION command. + */ +BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, print_me_version, NULL); + void intel_me_status(void) { union me_hfs hfs; -- To view, visit https://review.coreboot.org/23857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I360d5d7420950d5aa255df08be6d7123621b87a8 Gerrit-Change-Number: 23857 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: soc/intel/broadwell: Enable VT-d and X2APIC
by build bot (Jenkins) (Code Review) 23 Feb '18

23 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23820 ) Change subject: soc/intel/broadwell: Enable VT-d and X2APIC ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67844/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22337/ : SUCCESS -- To view, visit https://review.coreboot.org/23820 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7afcce0da028a160174db2cf6b4b6735bcd59165 Gerrit-Change-Number: 23820 Gerrit-PatchSet: 5 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Fri, 23 Feb 2018 20:33:34 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/broadwell: Generate ACPI DMAR table
by build bot (Jenkins) (Code Review) 23 Feb '18

23 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23821 ) Change subject: soc/intel/broadwell: Generate ACPI DMAR table ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67845/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22338/ : SUCCESS -- To view, visit https://review.coreboot.org/23821 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Id7c899954f1bae9d2b48532ca5ee271944f0c5f6 Gerrit-Change-Number: 23821 Gerrit-PatchSet: 4 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 23 Feb 2018 20:29:54 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: util/gitconfig: Add timeout test
by build bot (Jenkins) (Code Review) 23 Feb '18

23 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23280 ) Change subject: util/gitconfig: Add timeout test ...................................................................... Patch Set 4: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67843/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22336/ : SUCCESS -- To view, visit https://review.coreboot.org/23280 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Id46f905b9f782e67be97a65d10045c3345dc996b Gerrit-Change-Number: 23280 Gerrit-PatchSet: 4 Gerrit-Owner: Alex Thiessen <alex.thiessen.de+coreboot(a)gmail.com> Gerrit-Reviewer: Alex Thiessen <alex.thiessen.de+coreboot(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 23 Feb 2018 18:30:56 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: mb/google/fizz: Enable PCIe port 11, 12
by build bot (Jenkins) (Code Review) 23 Feb '18

23 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23845 ) Change subject: mb/google/fizz: Enable PCIe port 11, 12 ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67842/ : SUCCESS -- To view, visit https://review.coreboot.org/23845 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Icded9850d833752680e0174b6c476e657817b319 Gerrit-Change-Number: 23845 Gerrit-PatchSet: 3 Gerrit-Owner: Zhongze Hu <frankhu(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Zhongze Hu <frankhu(a)chromium.org> Gerrit-Reviewer: Zhongze Hu <frankhu(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 23 Feb 2018 17:48:23 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: tint: change the tint download link from HTTP Debian to HTTPS FSF
by build bot (Jenkins) (Code Review) 23 Feb '18

23 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23855 ) Change subject: tint: change the tint download link from HTTP Debian to HTTPS FSF ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67840/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22334/ : SUCCESS -- To view, visit https://review.coreboot.org/23855 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I55147ee2668de03ba6e9feb84936de24b2a001df Gerrit-Change-Number: 23855 Gerrit-PatchSet: 1 Gerrit-Owner: Mike Banon <mikebdp2(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 23 Feb 2018 17:46:26 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit February 2018