coreboot-gerrit February 2018

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Change in coreboot[master]: mb/emulation/qemu-armv8: Add new board for ARMv8
by build bot (Jenkins) (Code Review) 26 Feb '18

26 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23812 ) Change subject: mb/emulation/qemu-armv8: Add new board for ARMv8 ...................................................................... Patch Set 7: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67907/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22391/ : SUCCESS -- To view, visit https://review.coreboot.org/23812 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib4f2fd43afb855c2ae5760d9ee6ae1478b09104c Gerrit-Change-Number: 23812 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 26 Feb 2018 11:21:03 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: util/cbfstool: Add ARM64 Image support
by Patrick Rudolph (Code Review) 26 Feb '18

26 Feb '18

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/23869 Change subject: util/cbfstool: Add ARM64 Image support ...................................................................... util/cbfstool: Add ARM64 Image support Add support for booting Linux ARM64 Image. * Add new ARM64 trampoline code * Add ARM64 Image detection * Parse the Image and mark it relocateable if no loadaddress was given * Place the trampoline 64 KiB before the Linux Image Tested on qemu-armv8 and Linux 4.15. Change-Id: I9a8183a87de4dc3a4c4f038fe5b4912ada5d75f9 --- M payloads/external/linux/Makefile.inc A payloads/external/linux/arm64image_loader.h A payloads/external/linux/linux_trampoline_arm64.S A payloads/external/linux/linux_trampoline_arm64.c M util/cbfstool/Makefile.inc M util/cbfstool/cbfs-payload-linux.c M util/cbfstool/cbfstool.c M util/cbfstool/common.h 8 files changed, 358 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/23869/1 diff --git a/payloads/external/linux/Makefile.inc b/payloads/external/linux/Makefile.inc index c0a2b0c..e3c5924 100644 --- a/payloads/external/linux/Makefile.inc +++ b/payloads/external/linux/Makefile.inc @@ -4,6 +4,7 @@ ## ## Copyright (C) 2009-2010 coresystems GmbH ## Copyright (C) 2015 Google Inc. +## Copyright 2018-present Facebook, Inc. ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -20,6 +21,14 @@ linuxdir:=$(top)/payloads/external/linux +ifneq ($(GCC_CC_arm64),) +$(linuxdir)/linux_trampoline_arm64.c: $(linuxdir)/linux_trampoline_arm64.S $(top)/src/arch/arm64/include/* + $(MAKE) -C $(linuxdir) linux_trampoline_arm64.c \ + HOSTCC="$(HOSTCC)" \ + CC="$(GCC_CC_arm64)" \ + OBJCOPY="$(OBJCOPY_arm64)" \ + CFLAGS="$(CFLAGS_arm64) $(armv8_flags) -I$(top)/src/arch/arm64/include" +endif ifneq ($(GCC_CC_x86_32),) $(linuxdir)/linux_trampoline_x86.c: $(linuxdir)/linux_trampoline_x86.S $(top)/src/arch/x86/include/* $(MAKE) -C $(linuxdir) linux_trampoline_x86.c \ diff --git a/payloads/external/linux/arm64image_loader.h b/payloads/external/linux/arm64image_loader.h new file mode 100644 index 0000000..fdc5dee --- /dev/null +++ b/payloads/external/linux/arm64image_loader.h @@ -0,0 +1,20 @@ +/* + * This file is part of coreboot project. + * + * Copyright 2018-present Facebook, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* trampoline */ +extern unsigned char linux_trampoline_arm64_bin[]; +extern unsigned int linux_trampoline_arm64_bin_len; + +#define TRAMPOLINE_SIZE (64 * KiB) diff --git a/payloads/external/linux/linux_trampoline_arm64.S b/payloads/external/linux/linux_trampoline_arm64.S new file mode 100644 index 0000000..c28f3a9 --- /dev/null +++ b/payloads/external/linux/linux_trampoline_arm64.S @@ -0,0 +1,120 @@ +/* + * linux_trampoline + * + * Copyright (C) 2013 Patrick Georgi <patrick(a)georgi-clan.de> + * Copyright 2018-present Facebook, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* NOTE: THIS CODE MUST REMAIN POSITION INDEPENDENT + * IT SHOULDN'T USE THE STACK + * AND IN GENERAL EXPECT NOTHING BUT RAM TO WORK + */ + +.data +#define TRAMPOLINE_SIZE (64 * 1024) +#define HEADER_SIG 0x4f49424c // LBIO little endian +#define CB_TAG_FORWARD 0x11 +#define CB_TAG_DEVICETREE 0x0033 + +/* + * Find the devicetree that should have been placed in a coreboot table. + * Register usage: + * x0: base pointer + * x1: working register + * x2: working register + * x3: counter, initial value is the number of coreboot tables + * x4: start of trampoline, to calculcate the kernel position + */ +trampoline_start: + // Store entry point for later use + adr x4, trampoline_start + // x0 contains pointer to coreboot tables + + // Verify coreboot table header + + mov w2, HEADER_SIG >> 16 + lsl w2, w2, 16 + mov w1, (HEADER_SIG & 0xffff) + orr w2, w2, w1 + + // verify signature32 (header magic) + ldr w1, [x0, 0] + cmp w1, w2 + b.ne _halt + + // verify header_bytes + ldr w1, [x0, 4] + cmp w1, #0 + b.eq _halt + + // verify table_bytes + ldr w1, [x0, 16] + cmp w1, #0 + b.eq _halt + + // TODO: Signature check + + // Number of table entries goes into w3 + ldr w3, [x0, 20] + + // Set pointer to first entry + ldr w1, [x0, 4] + add x0, x1, x0 + + // x0 contains the table entry pointer + +tablescan: + ldr w1, [x0, 0] + cmp w1, #CB_TAG_FORWARD + b.ne devicetree + + ldr w1, [x0, 8] + add x0, x0, x1 + b next + +devicetree: + ldr w1, [x0, 0] + cmp w1, #CB_TAG_DEVICETREE + b.ne next + + mov x1, #8 + add x0, x0, x1 + b done + +next: + // Increment table entries pointer + ldr w1, [x0, 4] + add x0, x0, x1 + + // Decrement table entry counter + subs w3, w3, #1 + + b.ne tablescan + + // not found, call the kernel without devicetree ? + b _halt +done: + // devicetree pointer is in x0 + + // kernel entry point is trampoline_start + 64 KiB + // CBFSTOOL did make sure that the kernel is at the given offset + mov x1, #(TRAMPOLINE_SIZE) + add x1, x1, x4 + + // Jump to kernel + br x1 + +_halt: + wfi + b _halt + +trampoline_end: diff --git a/payloads/external/linux/linux_trampoline_arm64.c b/payloads/external/linux/linux_trampoline_arm64.c new file mode 100644 index 0000000..b4bc2c6 --- /dev/null +++ b/payloads/external/linux/linux_trampoline_arm64.c @@ -0,0 +1,14 @@ +/* This file is automatically generated. Do not manually change */ +unsigned char linux_trampoline_arm64_bin[] = { + 0x04, 0x00, 0x00, 0x10, 0x22, 0xe9, 0x89, 0x52, 0x42, 0x3c, 0x10, 0x53, 0x81, 0x49, 0x88, 0x52, + 0x42, 0x00, 0x01, 0x2a, 0x01, 0x00, 0x40, 0xb9, 0x3f, 0x00, 0x02, 0x6b, 0xc1, 0x03, 0x00, 0x54, + 0x01, 0x04, 0x40, 0xb9, 0x3f, 0x00, 0x00, 0x71, 0x60, 0x03, 0x00, 0x54, 0x01, 0x10, 0x40, 0xb9, + 0x3f, 0x00, 0x00, 0x71, 0x00, 0x03, 0x00, 0x54, 0x03, 0x14, 0x40, 0xb9, 0x01, 0x04, 0x40, 0xb9, + 0x20, 0x00, 0x00, 0x8b, 0x01, 0x00, 0x40, 0xb9, 0x3f, 0x44, 0x00, 0x71, 0x81, 0x00, 0x00, 0x54, + 0x01, 0x08, 0x40, 0xb9, 0x00, 0x00, 0x01, 0x8b, 0x07, 0x00, 0x00, 0x14, 0x01, 0x00, 0x40, 0xb9, + 0x3f, 0xcc, 0x00, 0x71, 0x81, 0x00, 0x00, 0x54, 0x01, 0x01, 0x80, 0xd2, 0x00, 0x00, 0x01, 0x8b, + 0x06, 0x00, 0x00, 0x14, 0x01, 0x04, 0x40, 0xb9, 0x00, 0x00, 0x01, 0x8b, 0x63, 0x04, 0x00, 0x71, + 0x21, 0xfe, 0xff, 0x54, 0x04, 0x00, 0x00, 0x14, 0x21, 0x00, 0xa0, 0xd2, 0x21, 0x00, 0x04, 0x8b, + 0x20, 0x00, 0x1f, 0xd6, 0x7f, 0x20, 0x03, 0xd5, 0xff, 0xff, 0xff, 0x17 +}; +unsigned int linux_trampoline_arm64_bin_len = 156; diff --git a/util/cbfstool/Makefile.inc b/util/cbfstool/Makefile.inc index 0575e1d..c1626c4 100644 --- a/util/cbfstool/Makefile.inc +++ b/util/cbfstool/Makefile.inc @@ -39,6 +39,7 @@ cbfsobj += valstr.o # linux as payload cbfsobj += linux_trampoline_x86.o +cbfsobj += linux_trampoline_arm64.o cbfsobj += cbfs-payload-linux.o # compression algorithms diff --git a/util/cbfstool/cbfs-payload-linux.c b/util/cbfstool/cbfs-payload-linux.c index 17e18ca..7e73db0 100644 --- a/util/cbfstool/cbfs-payload-linux.c +++ b/util/cbfstool/cbfs-payload-linux.c @@ -2,6 +2,7 @@ * cbfs-payload-linux * * Copyright (C) 2013 Patrick Georgi <patrick(a)georgi-clan.de> + * Copyright 2018-present Facebook, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -20,18 +21,20 @@ #include "common.h" #include "cbfs.h" #include "bzimage_loader.h" +#include "arm64image_loader.h" /* * Current max number of segments include: * * 1. parameters * 2. kernel - * 3. trampoline - * 4. optional cmdline - * 5. optional initrd - * 6. terminating entry segment + * 3. flags + * 4. trampoline + * 5. optional cmdline + * 6. optional initrd + * 7. terminating entry segment */ -#define MAX_NUM_SEGMENTS 6 +#define MAX_NUM_SEGMENTS 7 struct bzpayload { /* Input variables. */ @@ -39,6 +42,7 @@ struct cbfs_payload_segment segs[MAX_NUM_SEGMENTS]; struct buffer parameters; struct buffer kernel; + struct buffer flags; struct buffer trampoline; struct buffer cmdline; struct buffer initrd; @@ -93,6 +97,31 @@ (header->header == BZI_SIGNATURE); } +#define ARM64_IMAGE_KERNEL_HEADER_MAGIC 0x644d5241 + +struct Arm64KernelHeader { + u32 code0; + u32 code1; + u64 text_offset; + u64 image_size; + u64 flags; + u64 res2; + u64 res3; + u64 res4; + u32 magic; + u32 res5; +}; + +/* Return true if buffer looks like an ARM64 Image */ +int probe_for_ARM64Image_header(const struct buffer *input) +{ + const struct Arm64KernelHeader *header = + (const struct Arm64KernelHeader *)input->data; + if (input->size < sizeof(*header)) + return 0; + return (header->magic == ARM64_IMAGE_KERNEL_HEADER_MAGIC); +} + static int bzp_init(struct bzpayload *bzp, enum comp_algo algo) { memset(bzp, 0, sizeof(*bzp)); @@ -169,12 +198,23 @@ return 0; } +static int bzp_add_flags(struct bzpayload *bzp, + struct cbfs_payload_flags *flags) +{ + bzp_add_segment(bzp, &bzp->flags, flags, 0); + xdr_be.put64(&bzp->flags, flags->f.u); + xdr_be.put32(&bzp->flags, flags->align); + + return 0; +} + static int bzp_init_output(struct bzpayload *bzp, const char *name) { size_t sz = 0; sz += buffer_size(&bzp->parameters); sz += buffer_size(&bzp->kernel); + sz += buffer_size(&bzp->flags); sz += buffer_size(&bzp->trampoline); sz += buffer_size(&bzp->cmdline); sz += buffer_size(&bzp->initrd); @@ -371,3 +411,137 @@ xdr_segs(output, bzp.segs, bzp.num_segments); return 0; } + +/* + * Add an ARM64 Linux Kernel Image as payload. + * + * The trampoline will locate the devicetree and pass it as argument x0. + * + * Memory map + * ... + * | | + * | Usable DRAM | + * | | + * --------------------------------| n * 2MiB + text-offset + image-size + * | | + * | Linux Kernel | + * | | + * --------------------------------| n * 2MiB + text-offset + * | | + * | Trampoline | + * | | + * --------------------------------| n * 2MiB + text-offset - 64 KiB (entry) + * | | + * | Usable DRAM | + * | | + * --------------------------------| + * | Devicetree | + * ------------------------------- | >= MAX((n - 256) * 2MiB, 0) + * | | + * ... + */ + +int parse_ARM64Image_to_payload(const struct buffer *input, + struct buffer *output, uint64_t load_address, + enum comp_algo algo) +{ + const struct Arm64KernelHeader *header = + (const struct Arm64KernelHeader *)input->data; + struct buffer tmp; + struct bzpayload bzp; + uint64_t offset, image_size; + struct cbfs_payload_flags flags = {0}; + + if (bzp_init(&bzp, algo) != 0) + return -1; + + if (linux_trampoline_arm64_bin_len > TRAMPOLINE_SIZE) { + ERROR("FIXME: trampoline size is too big\n"); + return -1; + } + + /* + * Prior to v3.17, the endianness of text_offset was not specified. In + * these cases image_size is zero and text_offset is 0x80000 in the + * endianness of the kernel. Where image_size is non-zero image_size is + * little-endian and must be respected. Where image_size is zero, + * text_offset can be assumed to be 0x80000. + */ + if (header->image_size) { + offset = header->text_offset; + image_size = header->image_size; + } else { + offset = 0x80000; + // FIXME: How much space to reserve ? + image_size = input->size + 4 * MiB; + } + /* + * The Image must be placed text_offset bytes from a 2MB aligned base + * address anywhere in usable system RAM and called there. The region + * between the 2 MB aligned base address and the start of the image has + * no special significance to the kernel, and may be used for other + * purposes. At least image_size bytes from the start of the image must + * be free for use by the kernel. + */ + load_address = ALIGN_UP(load_address, 2 * MiB); + + /* Reserve some extra space if the trampoline doesn't fit */ + if (offset < TRAMPOLINE_SIZE) + offset += 2 * MiB; + + if (buffer_create(&tmp, image_size + offset, input->name)) { + ERROR("Failed to allocate a buffer\n"); + return -1; + } + + /* Clear trampoline memory */ + memset(tmp.data, 0, tmp.size); + + /* Place trampoline right before kernel */ + memcpy(tmp.data + offset - TRAMPOLINE_SIZE, linux_trampoline_arm64_bin, + linux_trampoline_arm64_bin_len); + + /* Place kernel at offset, right after trampoline */ + memcpy(tmp.data + offset, input->data, input->size); + + if (bzp_add_kernel(&bzp, &tmp, 0) != 0) + return -1; + + /* Dynamic load address, tell the align */ + if (!load_address) { + flags.f.relocateable = 1; + flags.align = 2 * MiB; + + if (bzp_add_flags(&bzp, &flags)) + return -1; + } + + if (bzp_init_output(&bzp, input->name) != 0) + return -1; + + if (!load_address) { + /* data block */ + bzp_output_segment(&bzp, &bzp.flags, PAYLOAD_SEGMENT_FLAGS, 0); + ERROR("Adding flags\n"); + } + + /* code block */ + bzp_output_segment(&bzp, &bzp.kernel, PAYLOAD_SEGMENT_CODE, + load_address); + + /* Terminating entry segment. */ + bzp_output_segment(&bzp, NULL, PAYLOAD_SEGMENT_ENTRY, + load_address + offset - TRAMPOLINE_SIZE); + + /* Set size of buffer taking into account potential compression. */ + buffer_set_size(&bzp.output, bzp.offset); + /* Make passed-in output buffer be valid. */ + buffer_clone(output, &bzp.output); + + /* Serialize the segments with the correct encoding. */ + xdr_segs(output, bzp.segs, bzp.num_segments); + + buffer_delete(&tmp); + + return 0; +} diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index 91b0290..899e32a 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -5,6 +5,7 @@ * written by Patrick Georgi <patrick.georgi(a)coresystems.de> * Copyright (C) 2012 Google, Inc. * Copyright (C) 2016 Siemens AG + * Copyright 2018-present Facebook, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -640,6 +641,11 @@ ret = parse_bzImage_to_payload(buffer, &output, param.initrd, param.cmdline, param.compression); + /* Try ARM64 Image */ + if (ret != 0 && probe_for_ARM64Image_header(buffer)) + ret = parse_ARM64Image_to_payload(buffer, &output, + param.loadaddress, param.compression); + /* Not a supported payload type */ if (ret != 0) { ERROR("Not a supported payload type (ELF / FV).\n"); @@ -1169,7 +1175,7 @@ {"add", "H:r:f:n:t:c:b:a:p:yvA:gh?", cbfs_add, true, true}, {"add-flat-binary", "H:r:f:n:l:e:c:b:p:vA:gh?", cbfs_add_flat_binary, true, true}, - {"add-payload", "H:r:f:n:t:c:b:C:I:p:vA:gh?", cbfs_add_payload, + {"add-payload", "H:r:f:n:t:c:b:C:I:p:l:vA:gh?", cbfs_add_payload, true, true}, {"add-stage", "a:H:r:f:n:t:c:b:P:S:p:yvA:gh?", cbfs_add_stage, true, true}, @@ -1299,7 +1305,8 @@ "Add a component\n" " add-payload [-r image,regions] -f FILE -n NAME [-A hash] \\\n" " [-c compression] [-b base-address] \\\n" - " (linux specific: [-C cmdline] [-I initrd]) " + " (linux specific: [-C cmdline] [-I initrd] \\\n" + " [-l loadaddress]) " "Add a payload to the ROM\n" " add-stage [-r image,regions] -f FILE -n NAME [-A hash] \\\n" " [-c compression] [-b base] [-S section-to-ignore] \\\n" diff --git a/util/cbfstool/common.h b/util/cbfstool/common.h index 6e366a1..4361191 100644 --- a/util/cbfstool/common.h +++ b/util/cbfstool/common.h @@ -193,6 +193,12 @@ int parse_bzImage_to_payload(const struct buffer *input, struct buffer *output, const char *initrd, char *cmdline, enum comp_algo algo); + +int probe_for_ARM64Image_header(const struct buffer *input); +int parse_ARM64Image_to_payload(const struct buffer *input, + struct buffer *output, uint64_t load_address, + enum comp_algo algo); + int parse_flat_binary_to_payload(const struct buffer *input, struct buffer *output, uint32_t loadaddress, -- To view, visit https://review.coreboot.org/23869 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I9a8183a87de4dc3a4c4f038fe5b4912ada5d75f9 Gerrit-Change-Number: 23869 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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Change in coreboot[master]: util/cbfstool: Add bzImage header detection
by Patrick Rudolph (Code Review) 26 Feb '18

26 Feb '18

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/23868 Change subject: util/cbfstool: Add bzImage header detection ...................................................................... util/cbfstool: Add bzImage header detection Only handle payload as bzImage if it looks like one. Change-Id: I9fc96caedb872b14f3238e4a7a96f0d32d17f7ee Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M util/cbfstool/cbfs-payload-linux.c M util/cbfstool/cbfstool.c M util/cbfstool/common.h 3 files changed, 46 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/23868/1 diff --git a/util/cbfstool/cbfs-payload-linux.c b/util/cbfstool/cbfs-payload-linux.c index 9646384..17e18ca 100644 --- a/util/cbfstool/cbfs-payload-linux.c +++ b/util/cbfstool/cbfs-payload-linux.c @@ -50,6 +50,49 @@ struct cbfs_payload_segment *out_seg; }; +/** bzImage boot flag value */ +#define BZI_BOOT_FLAG 0xaa55 + +/** bzImage magic signature value */ +#define BZI_SIGNATURE 0x53726448 + +struct bzimage_header { + /** The size of the setup in sectors + * + * If this field contains 0, assume it contains 4. + */ + uint8_t setup_sects; + /** If set, the root is mounted readonly */ + uint16_t root_flags; + /** DO NOT USE - for bootsect.S use only */ + uint16_t syssize; + /** DO NOT USE - obsolete */ + uint16_t swap_dev; + /** DO NOT USE - for bootsect.S use only */ + uint16_t ram_size; + /** Video mode control */ + uint16_t vid_mode; + /** Default root device number */ + uint16_t root_dev; + /** 0xAA55 magic number */ + uint16_t boot_flag; + /** Jump instruction */ + uint16_t jump; + /** Magic signature "HdrS" */ + uint32_t header; +}; + +/* Return true if buffer looks like a bzImage */ +int probe_for_bzImage_header(const struct buffer *input) +{ + const struct bzimage_header *header = + (const struct bzimage_header *)input->data; + if (input->size < sizeof(*header)) + return 0; + return (header->boot_flag == BZI_BOOT_FLAG) && + (header->header == BZI_SIGNATURE); +} + static int bzp_init(struct bzpayload *bzp, enum comp_algo algo) { memset(bzp, 0, sizeof(*bzp)); diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index 1f71906..91b0290 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -636,7 +636,7 @@ ret = parse_fv_to_payload(buffer, &output, param.compression); /* If it's neither ELF nor UEFI Fv, try bzImage */ - if (ret != 0) + if (ret != 0 && probe_for_bzImage_header(buffer)) ret = parse_bzImage_to_payload(buffer, &output, param.initrd, param.cmdline, param.compression); diff --git a/util/cbfstool/common.h b/util/cbfstool/common.h index 85dfdeb..6e366a1 100644 --- a/util/cbfstool/common.h +++ b/util/cbfstool/common.h @@ -188,6 +188,8 @@ enum comp_algo algo); int parse_fv_to_payload(const struct buffer *input, struct buffer *output, enum comp_algo algo); + +int probe_for_bzImage_header(const struct buffer *input); int parse_bzImage_to_payload(const struct buffer *input, struct buffer *output, const char *initrd, char *cmdline, enum comp_algo algo); -- To view, visit https://review.coreboot.org/23868 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I9fc96caedb872b14f3238e4a7a96f0d32d17f7ee Gerrit-Change-Number: 23868 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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Change in coreboot[master]: util/cbfstool: Move x86 Linux trampoline
by Patrick Rudolph (Code Review) 26 Feb '18

26 Feb '18

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/23867 Change subject: util/cbfstool: Move x86 Linux trampoline ...................................................................... util/cbfstool: Move x86 Linux trampoline Move linux trampoline code to support more than one architecture. * Move the x86 trampoline to payloads/external/linux * Add make rules to compile it only if the toolchain is present * Add architecture independent Makefile for all trampolines * Rename the trampoline to linux_trampoline_x86 Change-Id: I1d8630554e9fd845840de88142e5115c0bf92842 --- M Makefile.inc A payloads/external/linux/Makefile A payloads/external/linux/Makefile.inc R payloads/external/linux/bzimage_loader.h R payloads/external/linux/linux_trampoline.h R payloads/external/linux/linux_trampoline_x86.S A payloads/external/linux/linux_trampoline_x86.c R payloads/external/linux/trampoline/x86/linux_trampoline.c M util/cbfstool/Makefile M util/cbfstool/Makefile.inc M util/cbfstool/cbfs-payload-linux.c 11 files changed, 86 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/23867/1 diff --git a/Makefile.inc b/Makefile.inc index be658ef..d117d59 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -93,7 +93,7 @@ subdirs-y += $(wildcard src/arch/*) subdirs-y += src/mainboard/$(MAINBOARDDIR) subdirs-y += src/security -subdirs-y += payloads payloads/external +subdirs-y += payloads payloads/external payloads/external/linux subdirs-y += site-local subdirs-y += util/checklist util/testing diff --git a/payloads/external/linux/Makefile b/payloads/external/linux/Makefile new file mode 100644 index 0000000..0f5f2fd --- /dev/null +++ b/payloads/external/linux/Makefile @@ -0,0 +1,18 @@ +.PHONY: clean +clean: + $(RM) */linux_trampoline.c + +%.bin: %.elf + echo " OBJCOPY $@" + $(OBJCOPY) -Obinary -j .data $< $@ + rm $< + +%.elf: %.S + echo " CC $@" + $(CC) $(CFLAGS) -o $@ $< -ffreestanding -nostdlib -nostdinc -Wl,--defsym=_start=0 + +%.c: %.bin + echo " XXD $@" + echo "/* This file is automatically generated. Do not manually change */" > $@ + xxd -c 16 -i $< >> $@ + rm $< diff --git a/payloads/external/linux/Makefile.inc b/payloads/external/linux/Makefile.inc new file mode 100644 index 0000000..c0a2b0c --- /dev/null +++ b/payloads/external/linux/Makefile.inc @@ -0,0 +1,37 @@ +################################################################################ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2009-2010 coresystems GmbH +## Copyright (C) 2015 Google Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +###################################################################### +# set up payload config and version files for later inclusion + +linuxdir:=$(top)/payloads/external/linux + +ifneq ($(GCC_CC_x86_32),) +$(linuxdir)/linux_trampoline_x86.c: $(linuxdir)/linux_trampoline_x86.S $(top)/src/arch/x86/include/* + $(MAKE) -C $(linuxdir) linux_trampoline_x86.c \ + HOSTCC="$(HOSTCC)" \ + CC="$(GCC_CC_x86_32)" \ + OBJCOPY="$(OBJCOPY_x86_32)" \ + CFLAGS="$(CFLAGS_x86_32) -I$(top)/src/arch/x86/include" +else ifneq ($(GCC_CC_x86_64),) +$(linuxdir)/linux_trampoline_x86.c: $(linuxdir)/linux_trampoline_x86.S $(top)/src/arch/x86/include/* + $(MAKE) -C $(linuxdir) linux_trampoline_x86.c \ + HOSTCC="$(HOSTCC)" \ + CC="$(GCC_CC_x86_64)" \ + OBJCOPY="$(OBJCOPY_x86_64)" \ + CFLAGS="$(CLFAGS_x86_64) -m32 -I$(top)/src/arch/x86/include" +endif diff --git a/util/cbfstool/linux.h b/payloads/external/linux/bzimage_loader.h similarity index 97% rename from util/cbfstool/linux.h rename to payloads/external/linux/bzimage_loader.h index 249c7d7..a01d3d7 100644 --- a/util/cbfstool/linux.h +++ b/payloads/external/linux/bzimage_loader.h @@ -188,3 +188,7 @@ u8 command_line[COMMAND_LINE_SIZE]; /* 0x800 */ u8 reserved17[1792]; /* 0x900 - 0x1000 */ }; + +/* trampoline */ +extern unsigned char linux_trampoline_x86_bin[]; +extern unsigned int linux_trampoline_x86_bin_len; diff --git a/util/cbfstool/linux_trampoline.h b/payloads/external/linux/linux_trampoline.h similarity index 100% rename from util/cbfstool/linux_trampoline.h rename to payloads/external/linux/linux_trampoline.h diff --git a/util/cbfstool/linux_trampoline.S b/payloads/external/linux/linux_trampoline_x86.S similarity index 100% rename from util/cbfstool/linux_trampoline.S rename to payloads/external/linux/linux_trampoline_x86.S diff --git a/payloads/external/linux/linux_trampoline_x86.c b/payloads/external/linux/linux_trampoline_x86.c new file mode 100644 index 0000000..a60d747 --- /dev/null +++ b/payloads/external/linux/linux_trampoline_x86.c @@ -0,0 +1,16 @@ +/* This file is automatically generated. Do not manually change */ +unsigned char linux_trampoline_x86_bin[] = { + 0xfc, 0x31, 0xd2, 0xb9, 0x00, 0x00, 0x00, 0x00, 0xbb, 0x00, 0x00, 0x01, 0x00, 0x01, 0xcb, 0x8b, + 0x01, 0x3d, 0x4c, 0x42, 0x49, 0x4f, 0x74, 0x07, 0x83, 0xc1, 0x10, 0x39, 0xcb, 0x75, 0xe9, 0x39, + 0xcb, 0x0f, 0x84, 0x87, 0x00, 0x00, 0x00, 0x8b, 0x59, 0x04, 0x01, 0xcb, 0x8b, 0x49, 0x14, 0x83, + 0x3b, 0x11, 0x75, 0x05, 0x8b, 0x4b, 0x08, 0xeb, 0xcf, 0x83, 0x3b, 0x01, 0x75, 0x33, 0x8b, 0x43, + 0x04, 0x83, 0xe8, 0x08, 0xc1, 0xe8, 0x02, 0x3d, 0xa0, 0x00, 0x00, 0x00, 0x7e, 0x05, 0xb8, 0xa0, + 0x00, 0x00, 0x00, 0x89, 0xc6, 0xbf, 0x05, 0x00, 0x00, 0x00, 0xf7, 0xf7, 0xa3, 0xe8, 0x01, 0x09, + 0x00, 0x89, 0xf0, 0x91, 0x8d, 0x73, 0x08, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0xf3, 0xa5, 0x91, 0xeb, + 0x05, 0x83, 0x3b, 0x12, 0x75, 0x00, 0x03, 0x5b, 0x04, 0x49, 0x75, 0xb3, 0xb8, 0x00, 0x00, 0x04, + 0x00, 0x0f, 0x01, 0x00, 0x8b, 0x58, 0x02, 0xc7, 0x43, 0x10, 0xff, 0xff, 0x00, 0x00, 0xc7, 0x43, + 0x14, 0x00, 0x9b, 0xcf, 0x00, 0xc7, 0x43, 0x18, 0xff, 0xff, 0x00, 0x00, 0xc7, 0x43, 0x1c, 0x00, + 0x93, 0xcf, 0x00, 0xbe, 0x00, 0x00, 0x09, 0x00, 0xff, 0x25, 0x14, 0x02, 0x09, 0x00, 0xf4, 0xeb, + 0xfd +}; +unsigned int linux_trampoline_x86_bin_len = 177; diff --git a/util/cbfstool/linux_trampoline.c b/payloads/external/linux/trampoline/x86/linux_trampoline.c similarity index 100% rename from util/cbfstool/linux_trampoline.c rename to payloads/external/linux/trampoline/x86/linux_trampoline.c diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile index caa8c7d..76efcad 100644 --- a/util/cbfstool/Makefile +++ b/util/cbfstool/Makefile @@ -30,15 +30,6 @@ $(RM) $(objutil)/cbfstool/ifwitool $(ifwiobj) $(RM) $(objutil)/cbfstool/cbfs-compression-tool $(cbfscompobj) -linux_trampoline.c: linux_trampoline.S - rm -f linux_trampoline.c - $(CC) -m32 -o linux_trampoline linux_trampoline.S -ffreestanding -nostdlib -nostdinc -Wl,--defsym=_start=0 - $(OBJCOPY) -Obinary -j .data linux_trampoline trampoline - echo "/* This file is automatically generated. Do not manually change */" > trampoline.c - xxd -c 16 -i trampoline >> trampoline.c - mv trampoline.c linux_trampoline.c - rm linux_trampoline trampoline - .SILENT: include Makefile.inc diff --git a/util/cbfstool/Makefile.inc b/util/cbfstool/Makefile.inc index 8e4d8b6..0575e1d 100644 --- a/util/cbfstool/Makefile.inc +++ b/util/cbfstool/Makefile.inc @@ -38,8 +38,9 @@ cbfsobj += kv_pair.o cbfsobj += valstr.o # linux as payload -cbfsobj += linux_trampoline.o +cbfsobj += linux_trampoline_x86.o cbfsobj += cbfs-payload-linux.o + # compression algorithms cbfsobj += $(compressionobj) @@ -83,6 +84,7 @@ TOOLCPPFLAGS += -DNEED_VB2_SHA_LIBRARY TOOLCPPFLAGS += -I$(VBOOT_SOURCE)/firmware/include TOOLCPPFLAGS += -I$(VBOOT_SOURCE)/firmware/2lib/include +TOOLCPPFLAGS += -I$(top)/payloads/external/linux # UEFI header file support. It's not pretty, but that's what we currently # have right now. TOOLCPPFLAGS += -I$(top)/src @@ -101,6 +103,10 @@ TOOLCFLAGS+=-std=c99 endif +$(objutil)/cbfstool/linux_trampoline_%.o: $(top)/payloads/external/linux/linux_trampoline_%.c + printf " HOSTCC $(subst $(objutil)/,,$(@))\n" + $(HOSTCC) $(TOOLCPPFLAGS) $(TOOLCFLAGS) $(HOSTCFLAGS) -c -o $@ $< + $(objutil)/cbfstool/%.o: $(objutil)/cbfstool/%.c printf " HOSTCC $(subst $(objutil)/,,$(@))\n" $(HOSTCC) $(TOOLCPPFLAGS) $(TOOLCFLAGS) $(HOSTCFLAGS) -c -o $@ $< diff --git a/util/cbfstool/cbfs-payload-linux.c b/util/cbfstool/cbfs-payload-linux.c index 6b4bf27..9646384 100644 --- a/util/cbfstool/cbfs-payload-linux.c +++ b/util/cbfstool/cbfs-payload-linux.c @@ -19,11 +19,7 @@ #include "common.h" #include "cbfs.h" -#include "linux.h" - -/* trampoline */ -extern unsigned char trampoline[]; -extern unsigned int trampoline_len; +#include "bzimage_loader.h" /* * Current max number of segments include: @@ -97,8 +93,8 @@ static int bzp_add_trampoline(struct bzpayload *bzp) { - bzp_add_segment(bzp, &bzp->trampoline, trampoline, - trampoline_len); + bzp_add_segment(bzp, &bzp->trampoline, linux_trampoline_x86_bin, + linux_trampoline_x86_bin_len); return 0; } -- To view, visit https://review.coreboot.org/23867 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I1d8630554e9fd845840de88142e5115c0bf92842 Gerrit-Change-Number: 23867 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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Change in coreboot[master]: mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot
by build bot (Jenkins) (Code Review) 26 Feb '18

26 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19820 ) Change subject: mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot ...................................................................... Patch Set 3: Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/67909/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/22393/ : SUCCESS -- To view, visit https://review.coreboot.org/19820 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia251334ae44668c2260d8d2e816f85f1f62faac5 Gerrit-Change-Number: 19820 Gerrit-PatchSet: 3 Gerrit-Owner: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: James Hebden <james(a)hebden.net.au> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 26 Feb 2018 11:14:47 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot
by build bot (Jenkins) (Code Review) 26 Feb '18

26 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19820 ) Change subject: mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot ...................................................................... Patch Set 2: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/67908/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/22392/ : SUCCESS -- To view, visit https://review.coreboot.org/19820 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia251334ae44668c2260d8d2e816f85f1f62faac5 Gerrit-Change-Number: 19820 Gerrit-PatchSet: 2 Gerrit-Owner: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: James Hebden <james(a)hebden.net.au> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 26 Feb 2018 10:56:22 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/skylake: Move PCR DMI programming into bootblock
by build bot (Jenkins) (Code Review) 26 Feb '18

26 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23866 ) Change subject: soc/intel/skylake: Move PCR DMI programming into bootblock ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67906/ : SUCCESS -- To view, visit https://review.coreboot.org/23866 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie706735492a450baa653d8a8bb74c6e42f5150b8 Gerrit-Change-Number: 23866 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 26 Feb 2018 09:37:40 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/skylake: Move PCR DMI programming into bootblock
by build bot (Jenkins) (Code Review) 26 Feb '18

26 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23866 ) Change subject: soc/intel/skylake: Move PCR DMI programming into bootblock ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67905/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22390/ : SUCCESS -- To view, visit https://review.coreboot.org/23866 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie706735492a450baa653d8a8bb74c6e42f5150b8 Gerrit-Change-Number: 23866 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 26 Feb 2018 09:30:31 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/skylake: Move PCR DMI programming into bootblock
by Subrata Banik (Code Review) 26 Feb '18

26 Feb '18

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/23866 Change subject: soc/intel/skylake: Move PCR DMI programming into bootblock ...................................................................... soc/intel/skylake: Move PCR DMI programming into bootblock As per PCH BWG 2.5.16, setup LPC IO Enables PCR[DMI] + 2774h bit [15:0] to the same value program in LPC PCI offset 82h. Hence moving the required programming from lpc.c to pch.c. Change-Id: Ie706735492a450baa653d8a8bb74c6e42f5150b8 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/skylake/bootblock/pch.c M src/soc/intel/skylake/lpc.c 2 files changed, 28 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/23866/1 diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c index 34cfaa3..e80758d 100644 --- a/src/soc/intel/skylake/bootblock/pch.c +++ b/src/soc/intel/skylake/bootblock/pch.c @@ -36,6 +36,8 @@ #include <soc/pmc.h> #include <soc/smbus.h> +#define PCR_DMI_DMICTL 0x2234 +#define PCR_DMI_DMICTL_SRLOCK (1 << 31) #define PCR_DMI_ACPIBA 0x27B4 #define PCR_DMI_ACPIBDID 0x27B8 #define PCR_DMI_PMBASEA 0x27AC @@ -158,14 +160,38 @@ outw(tcocnt, tcobase + TCO1_CNT); } +static int pch_check_decode_enable(uint16_t lpc_en) +{ + uint32_t dmi_control; + + /* + * This cycle decoding is only allowed to set when + * DMICTL.SRLOCK is 0 + */ + dmi_control = pcr_read32(PID_DMI, PCR_DMI_DMICTL); + if (dmi_control & PCR_DMI_DMICTL_SRLOCK) + return -1; + return 0; +} + void pch_early_iorange_init(void) { + uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 | + LPC_IOE_EC_62_66; + /* IO Decode Range */ lpc_io_setup_comm_a_b(); /* IO Decode Enable */ - lpc_enable_fixed_io_ranges(LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 | - LPC_IOE_EC_62_66); + if (pch_check_decode_enable(io_enables) == 0) { + lpc_enable_fixed_io_ranges(io_enables); + /* + * As per PCH BWG 2.5.16. + * Setup LPC IO Enables PCR[DMI] + 2774h [15:0] to the same + * value program in LPC PCI offset 82h + */ + pcr_write16(PID_DMI, PCR_DMI_LPCIOE, io_enables); + } /* Program generic IO Decode Range */ pch_enable_lpc(); diff --git a/src/soc/intel/skylake/lpc.c b/src/soc/intel/skylake/lpc.c index d0678c9..3d1dd7b 100644 --- a/src/soc/intel/skylake/lpc.c +++ b/src/soc/intel/skylake/lpc.c @@ -82,17 +82,11 @@ void soc_setup_dmi_pcr_io_dec(uint32_t *gen_io_dec) { - uint16_t lpc_en; - /* Mirror these same settings in DMI PCR */ pcr_write32(PID_DMI, PCR_DMI_LPCLGIR1, gen_io_dec[0]); pcr_write32(PID_DMI, PCR_DMI_LPCLGIR2, gen_io_dec[1]); pcr_write32(PID_DMI, PCR_DMI_LPCLGIR3, gen_io_dec[2]); pcr_write32(PID_DMI, PCR_DMI_LPCLGIR4, gen_io_dec[3]); - - /* LPC IO Decode Enable */ - lpc_en = pci_read_config16(PCH_DEV_LPC, LPC_IO_ENABLES); - pcr_write16(PID_DMI, PCR_DMI_LPCIOE, lpc_en); } static const struct reg_script pch_misc_init_script[] = { -- To view, visit https://review.coreboot.org/23866 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ie706735492a450baa653d8a8bb74c6e42f5150b8 Gerrit-Change-Number: 23866 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>

1 0

Change in coreboot[master]: mb/google/poppy/variant/nautilus: Configure GPP_B0 for WLAN wake
by build bot (Jenkins) (Code Review) 26 Feb '18

26 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23526 ) Change subject: mb/google/poppy/variant/nautilus: Configure GPP_B0 for WLAN wake ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67904/ : SUCCESS -- To view, visit https://review.coreboot.org/23526 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I72b940452cfbbe471279ef117a868a8ae0b65b8b Gerrit-Change-Number: 23526 Gerrit-PatchSet: 2 Gerrit-Owner: Seunghwan Kim <sh_.kim(a)samsung.com> Gerrit-Reviewer: Chris Wang <chriswang(a)ami.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Peggy Chuang <peggychuang(a)ami.corp-partner.google.com> Gerrit-Reviewer: Peter Lin <peterlin(a)ami.corp-partner.google.com> Gerrit-Reviewer: Seunghwan Kim <sh_.kim(a)samsung.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 26 Feb 2018 07:19:29 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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