Hello Li1 Feng, Duncan Laurie, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/30034
to look at the new patch set (#2).
Change subject: mb/google/sarien: Enable ISH
......................................................................
mb/google/sarien: Enable ISH
Turn on the ISH in the device tree.
BUG=b:120295222
Change-Id: I0ba08c245d050aebc6eb06055690c422ab9b51c6
Signed-off-by: Jett Rink <jettrink(a)chromium.org>
---
M src/mainboard/google/sarien/variants/sarien/devicetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/30034/2
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Gerrit-Change-Number: 30034
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Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29565 )
Change subject: lenovo/h8,thinkpads: Re-do USB Always On
......................................................................
Patch Set 6: Code-Review+2
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Gerrit-Change-Id: If812cd1ef8fb1a24d7fadbe834f574b40cbcd56a
Gerrit-Change-Number: 29565
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Gerrit-Owner: Nathaniel Roach <nroach44(a)gmail.com>
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Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29875 )
Change subject: sb/intel: Fix pointer casts
......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/29875/2/src/southbridge/intel/i82801ix/lpc.c
File src/southbridge/intel/i82801ix/lpc.c:
https://review.coreboot.org/#/c/29875/2/src/southbridge/intel/i82801ix/lpc.…
PS2, Line 556: acpigen_write_name_dword
> is this really writing out a 64bit pointer when compiled for 64bit? Or is this just enough to get th […]
NVSA is still 32bit.
The whole 64bit pointer to uint32_t doesn't matter that much, as all functions allocate memory below 4GiB and all code is loaded below 4GiB.
I thought about a macro that does the cast and asserts if the high bits are set. Is this what you had in mind ?
This is about getting basic support for x86_64 in qemu.
Running code or allocating memory beyond 4GiB on real hardware is still a long way.
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Peter Lemenkov has uploaded a new patch set (#6) to the change originally created by Nathaniel Roach. ( https://review.coreboot.org/c/coreboot/+/29565 )
Change subject: lenovo/h8,thinkpads: Re-do USB Always On
......................................................................
lenovo/h8,thinkpads: Re-do USB Always On
Re-write the UAO handling code as it had stopped working (#171)
(the flag was not getting read from the RTC properly in SMM)
Remove the SMM code as it's not needed (but EC flag won't be set
upon entering S3 now)
Set the EC flags on boot the same way other flags are set
Document bitwise operators for clarity
Propagate changes to other Thinkpads
(updated X201 to have 2 bits for the flag as it only had 1)
Per Nicola Corna's previous commits, 0x0d is set for "AC only"
"AC only" does exhibit different behaviour - the USB port is
turned on a few seconds after entering S3, rather than < 1 sec,
regardless of AC status
Tested on X220
Change-Id: If812cd1ef8fb1a24d7fadbe834f574b40cbcd56a
Signed-off-by: Nathaniel Roach <nroach44(a)gmail.com>
---
M src/ec/lenovo/h8/Makefile.inc
M src/ec/lenovo/h8/h8.c
M src/ec/lenovo/h8/h8.h
D src/ec/lenovo/h8/smm.c
M src/mainboard/lenovo/l520/smihandler.c
M src/mainboard/lenovo/t420/smihandler.c
M src/mainboard/lenovo/t420s/smihandler.c
M src/mainboard/lenovo/t430/smihandler.c
M src/mainboard/lenovo/t430s/smihandler.c
M src/mainboard/lenovo/t520/smihandler.c
M src/mainboard/lenovo/t530/smihandler.c
M src/mainboard/lenovo/x201/cmos.layout
M src/mainboard/lenovo/x201/smihandler.c
M src/mainboard/lenovo/x220/cmos.layout
M src/mainboard/lenovo/x220/smihandler.c
M src/mainboard/lenovo/x230/smihandler.c
16 files changed, 41 insertions(+), 72 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/29565/6
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Gerrit-MessageType: newpatchset
Peter Lemenkov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29565 )
Change subject: lenovo/h8,thinkpads: Re-do USB Always On
......................................................................
Patch Set 5:
(4 comments)
Addressed all proposals above and rebased on top of current master.
https://review.coreboot.org/#/c/29565/4/src/ec/lenovo/h8/h8.c
File src/ec/lenovo/h8/h8.c:
https://review.coreboot.org/#/c/29565/4/src/ec/lenovo/h8/h8.c@136
PS4, Line 136: e UA
> Pointless comment. […]
Done
https://review.coreboot.org/#/c/29565/4/src/ec/lenovo/h8/h8.c@138
PS4, Line 138: val &= ~(H8_USB_ALWAYS_ON_ENABLE | H8_USB_ALWAYS_ON_AC_ONLY); // Clear bits 0,2,3
> space required before the open brace '{'
Done
https://review.coreboot.org/#/c/29565/4/src/ec/lenovo/h8/h8.c@138
PS4, Line 138: val &= ~(H8_USB_ALWAYS_ON_ENABLE | H8_USB_ALWAYS_ON_AC_ONLY); // Clear bits 0,2,3
> space required before the open parenthesis '('
Done
https://review.coreboot.org/#/c/29565/4/src/ec/lenovo/h8/h8.c@141
PS4, Line 141:
> Please don't use magic values
Done
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29565 )
Change subject: lenovo/h8,thinkpads: Re-do USB Always On
......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/#/c/29565/5/src/ec/lenovo/h8/h8.c
File src/ec/lenovo/h8/h8.c:
https://review.coreboot.org/#/c/29565/5/src/ec/lenovo/h8/h8.c@138
PS5, Line 138: val &= ~(H8_USB_ALWAYS_ON_ENABLE | H8_USB_ALWAYS_ON_AC_ONLY); // Clear bits 0,2,3
line over 80 characters
https://review.coreboot.org/#/c/29565/5/src/ec/lenovo/h8/h8.c@151
PS5, Line 151: val |= (H8_USB_ALWAYS_ON_ENABLE | H8_USB_ALWAYS_ON_AC_ONLY); // Set bits 0,2,3
line over 80 characters
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Gerrit-Comment-Date: Wed, 05 Dec 2018 15:17:33 +0000
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Gerrit-MessageType: comment
Peter Lemenkov has uploaded a new patch set (#5) to the change originally created by Nathaniel Roach. ( https://review.coreboot.org/c/coreboot/+/29565 )
Change subject: lenovo/h8,thinkpads: Re-do USB Always On
......................................................................
lenovo/h8,thinkpads: Re-do USB Always On
Re-write the UAO handling code as it had stopped working (#171)
(the flag was not getting read from the RTC properly in SMM)
Remove the SMM code as it's not needed (but EC flag won't be set
upon entering S3 now)
Set the EC flags on boot the same way other flags are set
Document bitwise operators for clarity
Propagate changes to other Thinkpads
(updated X201 to have 2 bits for the flag as it only had 1)
Per Nicola Corna's previous commits, 0x0d is set for "AC only"
"AC only" does exhibit different behaviour - the USB port is
turned on a few seconds after entering S3, rather than < 1 sec,
regardless of AC status
Tested on X220
Change-Id: If812cd1ef8fb1a24d7fadbe834f574b40cbcd56a
Signed-off-by: Nathaniel Roach <nroach44(a)gmail.com>
---
M src/ec/lenovo/h8/Makefile.inc
M src/ec/lenovo/h8/h8.c
M src/ec/lenovo/h8/h8.h
D src/ec/lenovo/h8/smm.c
M src/mainboard/lenovo/l520/smihandler.c
M src/mainboard/lenovo/t420/smihandler.c
M src/mainboard/lenovo/t420s/smihandler.c
M src/mainboard/lenovo/t430/smihandler.c
M src/mainboard/lenovo/t430s/smihandler.c
M src/mainboard/lenovo/t520/smihandler.c
M src/mainboard/lenovo/t530/smihandler.c
M src/mainboard/lenovo/x201/cmos.layout
M src/mainboard/lenovo/x201/smihandler.c
M src/mainboard/lenovo/x220/cmos.layout
M src/mainboard/lenovo/x220/smihandler.c
M src/mainboard/lenovo/x230/smihandler.c
16 files changed, 39 insertions(+), 72 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/29565/5
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Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/30045
to look at the new patch set (#3).
Change subject: src/southbridge: Get rid of device_t
......................................................................
src/southbridge: Get rid of device_t
Use of device_t is deprecated.
Change-Id: Ib4db9c263ff156966926f9576eed7e3cfb02e78a
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/southbridge/amd/sr5650/cmn.h
M src/southbridge/intel/lynxpoint/me_9.x.c
M src/southbridge/intel/lynxpoint/pch.c
M src/southbridge/intel/lynxpoint/usb_xhci.c
4 files changed, 137 insertions(+), 39 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/30045/3
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