coreboot-gerrit December 2018

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Change in ...coreboot[master]: mb/google/sarien/variants/arcada: Enable touchpad and touchscreen
by Casper Chang (Code Review) 11 Dec '18

11 Dec '18

Casper Chang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30146 Change subject: mb/google/sarien/variants/arcada: Enable touchpad and touchscreen ...................................................................... mb/google/sarien/variants/arcada: Enable touchpad and touchscreen Enable Elan touchpad and WACOM touchscreen BUG=b:119924134, b:120103010 BRANCH=master TEST=Verify touchpad and touchscreen on arcada work with this change. Signed-off-by: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Change-Id: I3dcdb4eeeb32766e64553d9e69e6b7e2b5ba85aa --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb 1 file changed, 19 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/30146/1 diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index fccec9f..9c50856 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -194,13 +194,26 @@ device pci 14.3 on end # CNVi wifi end device pci 14.5 off end # SDCard - device pci 15.0 on end # I2C #0 - device pci 15.1 on + device pci 15.0 on chip drivers/i2c/hid - register "generic.hid" = ""ACPI0C50"" - register "generic.desc" = ""Touchpad"" - register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_B3_IRQ)" - register "hid_desc_reg_offset" = "0x20" + register "generic.hid" = ""WCOM48E2"" + register "generic.desc" = ""Wacom Touchscreen"" + register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_C23_IRQ)" + register "generic.probed" = "1" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E7)" + register "generic.enable_delay_ms" = "5" + register "generic.has_power_resource" = "1" + register "generic.disable_gpio_export_in_crs" = "1" + register "hid_desc_reg_offset" = "0x1" + device i2c 0A on end + end + end # I2C #0 + device pci 15.1 on + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_B3_IRQ)" + register "probed" = "1" device i2c 2c on end end end # I2C #1 -- To view, visit https://review.coreboot.org/c/coreboot/+/30146 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3dcdb4eeeb32766e64553d9e69e6b7e2b5ba85aa Gerrit-Change-Number: 30146 Gerrit-PatchSet: 1 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/google/sarien/variants/arcada: Enable Elan touchpad
by Casper Chang (Code Review) 11 Dec '18

11 Dec '18

Casper Chang has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/30145 ) Change subject: mb/google/sarien/variants/arcada: Enable Elan touchpad ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/30145 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I334ed231db77ef682c95171685025d43be622725 Gerrit-Change-Number: 30145 Gerrit-PatchSet: 1 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-MessageType: abandon

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Change in ...coreboot[master]: mb/google/sarien/variants/arcada: Enable Elan touchpad
by Casper Chang (Code Review) 11 Dec '18

11 Dec '18

Casper Chang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30145 Change subject: mb/google/sarien/variants/arcada: Enable Elan touchpad ...................................................................... mb/google/sarien/variants/arcada: Enable Elan touchpad BUG=b:119924134 BRANCH=master TEST=Verify touchpad on arcada works with this change. Signed-off-by: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Change-Id: I334ed231db77ef682c95171685025d43be622725 --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb 1 file changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/30145/1 diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index fccec9f..c995c7d 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -196,11 +196,11 @@ device pci 14.5 off end # SDCard device pci 15.0 on end # I2C #0 device pci 15.1 on - chip drivers/i2c/hid - register "generic.hid" = ""ACPI0C50"" - register "generic.desc" = ""Touchpad"" - register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_B3_IRQ)" - register "hid_desc_reg_offset" = "0x20" + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_B3_IRQ)" + register "probed" = "1" device i2c 2c on end end end # I2C #1 -- To view, visit https://review.coreboot.org/c/coreboot/+/30145 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I334ed231db77ef682c95171685025d43be622725 Gerrit-Change-Number: 30145 Gerrit-PatchSet: 1 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: Documentation/CoC: make clearer it's also for real world events
by Patrick Georgi (Code Review) 10 Dec '18

10 Dec '18

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30104 ) Change subject: Documentation/CoC: make clearer it's also for real world events ...................................................................... Documentation/CoC: make clearer it's also for real world events It's not just for the mailing lists, tools and IRC channel. Change-Id: I23883cfd8200496f4281d73b6e75fac0d3448a3c Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-on: https://review.coreboot.org/c/30104 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin Roth <martinroth(a)google.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M Documentation/code_of_conduct.md 1 file changed, 3 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve diff --git a/Documentation/code_of_conduct.md b/Documentation/code_of_conduct.md index b262a3b..c40393f 100644 --- a/Documentation/code_of_conduct.md +++ b/Documentation/code_of_conduct.md @@ -3,11 +3,11 @@ This code of conduct outlines our rules and expectations for everybody participating in the coreboot community. -## Mailing list and chat etiquette +## coreboot community etiquette We have a friendly and productive atmosphere on our mailing lists, -development / code review tools and IRC chat rooms. Our principles evolve -around the following: +development / code review tools, IRC chat rooms and when we meet in +person. Our principles evolve around the following: * It's not the user's fault if something goes wrong. * Attempt collaboration before conflict. -- To view, visit https://review.coreboot.org/c/coreboot/+/30104 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I23883cfd8200496f4281d73b6e75fac0d3448a3c Gerrit-Change-Number: 30104 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in ...coreboot[master]: mb/google/sarien: Disable unused SATA ports
by Bora Guvendik (Code Review) 10 Dec '18

10 Dec '18

Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30091 ) Change subject: mb/google/sarien: Disable unused SATA ports ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30091 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1b8801f7a0f9b7847b85d7c315fa0a2093b32f70 Gerrit-Change-Number: 30091 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Roy Mingi Park <roy.mingi.park(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 10 Dec 2018 23:44:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/sarien: Disable PCH Gigabit LAN
by Bora Guvendik (Code Review) 10 Dec '18

10 Dec '18

Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30096 ) Change subject: mb/google/sarien: Disable PCH Gigabit LAN ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30096 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I07c66df50dbe9fefd95a67b5af9e3f61ce6a18aa Gerrit-Change-Number: 30096 Gerrit-PatchSet: 4 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Roy Mingi Park <roy.mingi.park(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 10 Dec 2018 23:42:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: [WIP]mb/google/octopus: Override emmc DLL values for Phaser
by Bora Guvendik (Code Review) 10 Dec '18

10 Dec '18

Bora Guvendik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30144 Change subject: [WIP]mb/google/octopus: Override emmc DLL values for Phaser ...................................................................... [WIP]mb/google/octopus: Override emmc DLL values for Phaser New emmc DLL values for Phaser. BUG=b:120561055 TEST=Boot to OS, chromeos-install, mmc_test Change-Id: Ie8d56e0faf5c96d980c0614a61fbc6eacf582943 Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> --- M src/mainboard/google/octopus/variants/phaser/overridetree.cb 1 file changed, 41 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/30144/1 diff --git a/src/mainboard/google/octopus/variants/phaser/overridetree.cb b/src/mainboard/google/octopus/variants/phaser/overridetree.cb index f996d8b..a18dd7d 100644 --- a/src/mainboard/google/octopus/variants/phaser/overridetree.cb +++ b/src/mainboard/google/octopus/variants/phaser/overridetree.cb @@ -1,5 +1,46 @@ chip soc/intel/apollolake + # EMMC Tx CMD Delay + # Refer to EDS-Vol2-16.32. + # [14:8] steps of delay for DDR mode, each 125ps. + # [6:0] steps of delay for SDR mode, each 125ps. + register "emmc_tx_cmd_cntl" = "0x505" + + # EMMC TX DATA Delay 1 + # Refer to EDS-Vol2-16.33. + # [14:8] steps of delay for HS400, each 125ps. + # [6:0] steps of delay for SDR104/HS200, each 125ps. + register "emmc_tx_data_cntl1" = "0x0b0c" + + # EMMC TX DATA Delay 2 + # Refer to EDS-Vol2-16.34. + # [30:24] steps of delay for SDR50, each 125ps. + # [22:16] steps of delay for DDR50, each 125ps. + # [14:8] steps of delay for SDR25/HS50, each 125ps. + # [6:0] steps of delay for SDR12, each 125ps. + register "emmc_tx_data_cntl2" = "0x1c282929" + + # EMMC RX CMD/DATA Delay 1 + # Refer to EDS-Vol2-16.35. + # [30:24] steps of delay for SDR50, each 125ps. + # [22:16] steps of delay for DDR50, each 125ps. + # [14:8] steps of delay for SDR25/HS50, each 125ps. + # [6:0] steps of delay for SDR12, each 125ps. + register "emmc_rx_cmd_data_cntl1" = "0x00181b1b" + + # EMMC RX CMD/DATA Delay 2 + # Refer to EDS-Vol2-16.37. + # [17:16] stands for Rx Clock before Output Buffer + # [14:8] steps of delay for Auto Tuning Mode, each 125ps. + # [6:0] steps of delay for HS200, each 125ps. + register "emmc_rx_cmd_data_cntl2" = "0x10028" + + # EMMC Rx Strobe Delay + # Refer to EDS-Vol2-16.36. + # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps. + # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps. + register "emmc_rx_strobe_cntl" = "0x0b0b" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | -- To view, visit https://review.coreboot.org/c/coreboot/+/30144 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie8d56e0faf5c96d980c0614a61fbc6eacf582943 Gerrit-Change-Number: 30144 Gerrit-PatchSet: 1 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: WIP: DSP capabilities need to be enabled to allow DSP firmware to be ...
by Sathyanarayana Nujella (Code Review) 10 Dec '18

10 Dec '18

Sathyanarayana Nujella has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/29747 ) Change subject: WIP: DSP capabilities need to be enabled to allow DSP firmware to be loaded successfully. ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/29747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If59810e358eb0127df0c912655fca28124e2814a Gerrit-Change-Number: 29747 Gerrit-PatchSet: 1 Gerrit-Owner: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Jairaj Arava <jairaj.arava(a)intel.com> Gerrit-Reviewer: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in ...coreboot[master]: WIP: DSP capabilities need to be enabled to allow DSP firmware to be ...
by Sathyanarayana Nujella (Code Review) 10 Dec '18

10 Dec '18

Sathyanarayana Nujella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29747 ) Change subject: WIP: DSP capabilities need to be enabled to allow DSP firmware to be loaded successfully. ...................................................................... Patch Set 1: I am abandoning this as SOF is not needed for sarien boards now. -- To view, visit https://review.coreboot.org/c/coreboot/+/29747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If59810e358eb0127df0c912655fca28124e2814a Gerrit-Change-Number: 29747 Gerrit-PatchSet: 1 Gerrit-Owner: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Jairaj Arava <jairaj.arava(a)intel.com> Gerrit-Reviewer: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 10 Dec 2018 22:19:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: Work in progress: Early eMMC phase 1
by Richard Spiegel (Code Review) 10 Dec '18

10 Dec '18

Richard Spiegel has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/30109 ) Change subject: Work in progress: Early eMMC phase 1 ...................................................................... Abandoned Changed user by accident. -- To view, visit https://review.coreboot.org/c/coreboot/+/30109 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifd2a307ead37c62abca811654873c43c02ac2a4a Gerrit-Change-Number: 30109 Gerrit-PatchSet: 3 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Daniel Kurtz <djkurtz(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Simon Glass <sjg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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coreboot-gerrit December 2018