coreboot-gerrit December 2018

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Change in ...coreboot[master]: sb/intel/lynxpoint: Remove incomplete SATA ACPI code
by Patrick Rudolph (Code Review) 11 Dec '18

11 Dec '18

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30149 ) Change subject: sb/intel/lynxpoint: Remove incomplete SATA ACPI code ...................................................................... Patch Set 1: Code-Review+1 Please add an inline comment that legacy mode isn't supported yet. -- To view, visit https://review.coreboot.org/c/coreboot/+/30149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I808a9dff7b9ba34239ffd95fa4cb9b39b10c4b62 Gerrit-Change-Number: 30149 Gerrit-PatchSet: 1 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 11 Dec 2018 06:54:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: sb/intel/lynxpoint: Remove incomplete SATA ACPI code
by Tristan Corrick (Code Review) 11 Dec '18

11 Dec '18

Tristan Corrick has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30149 Change subject: sb/intel/lynxpoint: Remove incomplete SATA ACPI code ...................................................................... sb/intel/lynxpoint: Remove incomplete SATA ACPI code The existing SATA ACPI code for Lynx Point implements some methods and devices, but not completely. These methods are optional and only used in IDE mode. The code was likely copied from bd82x6x, where it has since been removed. As a result, many remarks produced by iasl about unreferenced objects are eliminated. Tested on an ASRock H81M-HDS and an Acer C720. No issues with SATA were observed. Change-Id: I808a9dff7b9ba34239ffd95fa4cb9b39b10c4b62 Signed-off-by: Tristan Corrick <tristan(a)corrick.kiwi> --- M src/southbridge/intel/lynxpoint/acpi/sata.asl 1 file changed, 0 insertions(+), 52 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/30149/1 diff --git a/src/southbridge/intel/lynxpoint/acpi/sata.asl b/src/southbridge/intel/lynxpoint/acpi/sata.asl index 44ce576..3c01893 100644 --- a/src/southbridge/intel/lynxpoint/acpi/sata.asl +++ b/src/southbridge/intel/lynxpoint/acpi/sata.asl @@ -22,56 +22,4 @@ Device (SATA) { Name (_ADR, 0x001f0002) - - Device (PRID) - { - Name (_ADR, 0) - - // Get Timing Mode - Method (_GTM, 0, Serialized) - { - Name(PBUF, Buffer(20) { - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - 0x00,0x00,0x00,0x00 }) - - CreateDwordField (PBUF, 0, PIO0) - CreateDwordField (PBUF, 4, DMA0) - CreateDwordField (PBUF, 8, PIO1) - CreateDwordField (PBUF, 12, DMA1) - CreateDwordField (PBUF, 16, FLAG) - - // TODO fill return structure - - Return (PBUF) - } - - // Set Timing Mode - Method (_STM, 3) - { - CreateDwordField (Arg0, 0, PIO0) - CreateDwordField (Arg0, 4, DMA0) - CreateDwordField (Arg0, 8, PIO1) - CreateDwordField (Arg0, 12, DMA1) - CreateDwordField (Arg0, 16, FLAG) - - // TODO: Do the deed - } - - Device (DSK0) - { - Name (_ADR, 0) - // TODO: _RMV ? - // TODO: _GTF ? - } - - Device (DSK1) - { - Name (_ADR, 1) - - // TODO: _RMV ? - // TODO: _GTF ? - } - - } } -- To view, visit https://review.coreboot.org/c/coreboot/+/30149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I808a9dff7b9ba34239ffd95fa4cb9b39b10c4b62 Gerrit-Change-Number: 30149 Gerrit-PatchSet: 1 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/asus/maximus_iv_gene-z: Select NO_UART_ON_SUPERIO
by Tristan Corrick (Code Review) 11 Dec '18

11 Dec '18

Tristan Corrick has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30148 Change subject: mb/asus/maximus_iv_gene-z: Select NO_UART_ON_SUPERIO ...................................................................... mb/asus/maximus_iv_gene-z: Select NO_UART_ON_SUPERIO This board doesn't have a UART on the super I/O. Selecting this option speeds up boot time from ~493 ms to ~416 ms. Change-Id: I1d84f373831381da79022638e1082adf68f47aad Signed-off-by: Tristan Corrick <tristan(a)corrick.kiwi> --- M src/mainboard/asus/maximus_iv_gene-z/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/30148/1 diff --git a/src/mainboard/asus/maximus_iv_gene-z/Kconfig b/src/mainboard/asus/maximus_iv_gene-z/Kconfig index 4106c64..c6e0dce 100644 --- a/src/mainboard/asus/maximus_iv_gene-z/Kconfig +++ b/src/mainboard/asus/maximus_iv_gene-z/Kconfig @@ -28,6 +28,7 @@ select INTEL_INT15 select MAINBOARD_HAS_LIBGFXINIT select NORTHBRIDGE_INTEL_SANDYBRIDGE + select NO_UART_ON_SUPERIO select SERIRQ_CONTINUOUS_MODE select SOUTHBRIDGE_INTEL_BD82X6X select SUPERIO_NUVOTON_NCT6776 -- To view, visit https://review.coreboot.org/c/coreboot/+/30148 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d84f373831381da79022638e1082adf68f47aad Gerrit-Change-Number: 30148 Gerrit-PatchSet: 1 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: soc/intel/cannonlake: Amend comment typo
by Lijian Zhao (Code Review) 11 Dec '18

11 Dec '18

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30147 Change subject: soc/intel/cannonlake: Amend comment typo ...................................................................... soc/intel/cannonlake: Amend comment typo Fix typo of "VGOIO" back to "VGPIO". Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> Change-Id: Ia2b7cb0e5fe2817acc3e3f4656b98dc2462b397f --- M src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/30147/1 diff --git a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h index a1ce8c4..cb184c9 100644 --- a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h +++ b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h @@ -196,7 +196,7 @@ #define GPP_H21 138 #define GPP_H22 139 #define GPP_H23 140 -/* Group VGOIO */ +/* Group VGPIO */ #define GPIO_RSVD_13 141 #define GPIO_RSVD_14 142 #define GPIO_RSVD_15 143 -- To view, visit https://review.coreboot.org/c/coreboot/+/30147 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia2b7cb0e5fe2817acc3e3f4656b98dc2462b397f Gerrit-Change-Number: 30147 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/google/poppy/variants/nami: Modify SPD for hynix memory part
by Furquan Shaikh (Code Review) 11 Dec '18

11 Dec '18

Furquan Shaikh has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30076 ) Change subject: mb/google/poppy/variants/nami: Modify SPD for hynix memory part ...................................................................... mb/google/poppy/variants/nami: Modify SPD for hynix memory part correct memory part name form hynix_dimm_H5ANAG6NCMR-VKC to hynix_dimm_H5AN4G6NAFR-UHC BUG=b:113983573 BRANCH=Nami TEST=emerge-nami coreboot chromeos-bootimage Change-Id: I0c33343eb1269919fba324333897805da1d1ff9b Signed-off-by: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/30076 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Shelley Chen <shchen(a)google.com> --- R src/mainboard/google/poppy/spd/hynix_dimm_H5AN4G6NAFR-UHC.spd.hex M src/mainboard/google/poppy/variants/nami/Makefile.inc 2 files changed, 3 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Shelley Chen: Looks good to me, approved Ren Kuo: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/poppy/spd/hynix_dimm_H5ANAG6NAFR-UHC.spd.hex b/src/mainboard/google/poppy/spd/hynix_dimm_H5AN4G6NAFR-UHC.spd.hex similarity index 93% rename from src/mainboard/google/poppy/spd/hynix_dimm_H5ANAG6NAFR-UHC.spd.hex rename to src/mainboard/google/poppy/spd/hynix_dimm_H5AN4G6NAFR-UHC.spd.hex index 9a702ce..4aaa98d 100644 --- a/src/mainboard/google/poppy/spd/hynix_dimm_H5ANAG6NAFR-UHC.spd.hex +++ b/src/mainboard/google/poppy/spd/hynix_dimm_H5AN4G6NAFR-UHC.spd.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -80 AD 01 00 00 00 00 00 00 48 4D 41 34 32 35 53 -36 41 46 52 36 4E 2D 55 48 20 20 20 20 00 80 AD +80 AD 01 00 00 00 00 00 00 48 35 41 4E 34 47 36 +4E 41 46 52 2D 55 48 43 20 20 20 20 20 00 80 AD FF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 DD 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/poppy/variants/nami/Makefile.inc b/src/mainboard/google/poppy/variants/nami/Makefile.inc index 690b9c8..f1808ca 100644 --- a/src/mainboard/google/poppy/variants/nami/Makefile.inc +++ b/src/mainboard/google/poppy/variants/nami/Makefile.inc @@ -11,7 +11,7 @@ SPD_SOURCES += samsung_dimm_K4A4G165WE-BCRC # 0b0111 SPD_SOURCES += samsung_dimm_K4A8G165WC-BCTD # 0b1000 SPD_SOURCES += samsung_dimm_K4AAG165WB-MCRC # 0b1001 -SPD_SOURCES += hynix_dimm_H5ANAG6NAFR-UHC # 0b1010 +SPD_SOURCES += hynix_dimm_H5AN4G6NAFR-UHC # 0b1010 SPD_SOURCES += empty_ddr4 # 0b1011 SPD_SOURCES += empty_ddr4 # 0b1100 SPD_SOURCES += micron_dimm_MT40A1G16KNR-075E # 0b1101 -- To view, visit https://review.coreboot.org/c/coreboot/+/30076 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c33343eb1269919fba324333897805da1d1ff9b Gerrit-Change-Number: 30076 Gerrit-PatchSet: 2 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Vincent Wang <vwang(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in ...coreboot[master]: mb/google/poppy/variants/nami: Modify SPD for hynix memory part
by Shelley Chen (Code Review) 11 Dec '18

11 Dec '18

Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30076 ) Change subject: mb/google/poppy/variants/nami: Modify SPD for hynix memory part ...................................................................... Patch Set 1: Checked with Dexter and this part/board id is not used for any current nami board. -- To view, visit https://review.coreboot.org/c/coreboot/+/30076 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c33343eb1269919fba324333897805da1d1ff9b Gerrit-Change-Number: 30076 Gerrit-PatchSet: 1 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Vincent Wang <vwang(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 11 Dec 2018 01:46:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/poppy/variants/nami: Modify SPD for hynix memory part
by Shelley Chen (Code Review) 11 Dec '18

11 Dec '18

Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30076 ) Change subject: mb/google/poppy/variants/nami: Modify SPD for hynix memory part ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30076 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c33343eb1269919fba324333897805da1d1ff9b Gerrit-Change-Number: 30076 Gerrit-PatchSet: 1 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Vincent Wang <vwang(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 11 Dec 2018 01:46:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/sarien/variants/arcada: Enable touchpad and touchscreen
by Casper Chang (Code Review) 11 Dec '18

11 Dec '18

Casper Chang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30146 ) Change subject: mb/google/sarien/variants/arcada: Enable touchpad and touchscreen ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/30146/1/src/mainboard/google/sarien/variant… File src/mainboard/google/sarien/variants/arcada/devicetree.cb: https://review.coreboot.org/#/c/30146/1/src/mainboard/google/sarien/variant… PS1, Line 197: device pci 15.0 on > trailing whitespace done. -- To view, visit https://review.coreboot.org/c/coreboot/+/30146 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3dcdb4eeeb32766e64553d9e69e6b7e2b5ba85aa Gerrit-Change-Number: 30146 Gerrit-PatchSet: 2 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 11 Dec 2018 01:45:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/sarien/variants/arcada: Enable touchpad and touchscreen
by Casper Chang (Code Review) 11 Dec '18

11 Dec '18

Hello YH Lin, Duncan Laurie, build bot (Jenkins), Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30146 to look at the new patch set (#2). Change subject: mb/google/sarien/variants/arcada: Enable touchpad and touchscreen ...................................................................... mb/google/sarien/variants/arcada: Enable touchpad and touchscreen Enable Elan touchpad and WACOM touchscreen BUG=b:119924134, b:120103010 BRANCH=master TEST=Verify touchpad and touchscreen on arcada work with this change. Signed-off-by: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Change-Id: I3dcdb4eeeb32766e64553d9e69e6b7e2b5ba85aa --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb 1 file changed, 19 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/30146/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30146 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3dcdb4eeeb32766e64553d9e69e6b7e2b5ba85aa Gerrit-Change-Number: 30146 Gerrit-PatchSet: 2 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/google/sarien/variants/arcada: Enable touchpad and touchscreen
by build bot (Jenkins) (Code Review) 11 Dec '18

11 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30146 ) Change subject: mb/google/sarien/variants/arcada: Enable touchpad and touchscreen ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/30146/1/src/mainboard/google/sarien/variant… File src/mainboard/google/sarien/variants/arcada/devicetree.cb: https://review.coreboot.org/#/c/30146/1/src/mainboard/google/sarien/variant… PS1, Line 197: device pci 15.0 on trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/30146 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3dcdb4eeeb32766e64553d9e69e6b7e2b5ba85aa Gerrit-Change-Number: 30146 Gerrit-PatchSet: 1 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 11 Dec 2018 01:41:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit December 2018