coreboot-gerrit December 2018

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Change in ...coreboot[master]: soc/intel/common/block/cpu: Perform AP init if publish_mp_service_ppi=1
by Subrata Banik (Code Review) 11 Dec '18

11 Dec '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/26645 to look at the new patch set (#2). Change subject: soc/intel/common/block/cpu: Perform AP init if publish_mp_service_ppi=1 ...................................................................... soc/intel/common/block/cpu: Perform AP init if publish_mp_service_ppi=1 This patch ensures that coreboot can still perform AP initialziation if publish_mp_service_ppi is enabled through mainboard devicetree.cb Change-Id: I699c5457898c1dea0b6f78ec74dd02fb400db14f Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/common/block/cpu/mp_init.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/26645/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/26645 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I699c5457898c1dea0b6f78ec74dd02fb400db14f Gerrit-Change-Number: 26645 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: soc/intel/common: Add option to publish MP service PPI
by Subrata Banik (Code Review) 11 Dec '18

11 Dec '18

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30155 Change subject: soc/intel/common: Add option to publish MP service PPI ...................................................................... soc/intel/common: Add option to publish MP service PPI This patch ensures to have required configuration option in intel common cpu code to publish MP service PPI based on devicetree.cb selection on supported platform. TEST=Support platform should select publish_mp_service_ppi=1 to enable MP service PPI publish option. Change-Id: Ie076c93429f3e647cfc9feb415b33fb27b2f1254 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/common/block/chip/chip.c M src/soc/intel/common/block/include/intelblocks/chip.h 2 files changed, 30 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/30155/1 diff --git a/src/soc/intel/common/block/chip/chip.c b/src/soc/intel/common/block/chip/chip.c index aecf060..1514120 100644 --- a/src/soc/intel/common/block/chip/chip.c +++ b/src/soc/intel/common/block/chip/chip.c @@ -47,3 +47,18 @@ return common_config->use_fsp_mp_init; } + +/* + * This function will get MP service PPI config + * + * Return values: + * 0 = Don't create PPI structure + * 1 = Create PPI structure + */ +int chip_get_mp_service_ppi_config(void) +{ + const struct soc_intel_common_config *common_config; + common_config = chip_get_common_soc_structure(); + + return common_config->publish_mp_service_ppi; +} diff --git a/src/soc/intel/common/block/include/intelblocks/chip.h b/src/soc/intel/common/block/include/intelblocks/chip.h index d761f6b..fe6d8d7 100644 --- a/src/soc/intel/common/block/include/intelblocks/chip.h +++ b/src/soc/intel/common/block/include/intelblocks/chip.h @@ -39,6 +39,12 @@ * 1 = Make use of FSP MP Init */ uint8_t use_fsp_mp_init; + /* + * Create MP service PPI + * 0 = Don't create PPI structure + * 1 = Create PPI structure + */ + uint8_t publish_mp_service_ppi; }; /* This function to retrieve soc config structure required by common code */ @@ -53,4 +59,13 @@ */ int chip_get_fsp_mp_init(void); +/* + * This function will get MP service PPI config + * + * Return values: + * 0 = Don't create PPI structure + * 1 = Create PPI structure + */ +int chip_get_mp_service_ppi_config(void); + #endif /* SOC_INTEL_COMMON_BLOCK_CHIP_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/30155 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie076c93429f3e647cfc9feb415b33fb27b2f1254 Gerrit-Change-Number: 30155 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: soc/intel/common: Implement EFI_MP_SERVICES_PPI structure APIs
by build bot (Jenkins) (Code Review) 11 Dec '18

11 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25634 ) Change subject: soc/intel/common: Implement EFI_MP_SERVICES_PPI structure APIs ...................................................................... Patch Set 38: (11 comments) https://review.coreboot.org/#/c/25634/38/src/soc/intel/common/block/cpu/mp_… File src/soc/intel/common/block/cpu/mp_service_ppi.c: https://review.coreboot.org/#/c/25634/38/src/soc/intel/common/block/cpu/mp_… PS38, Line 47: CONST EFI_PEI_SERVICES **ignored1, need consistent spacing around '*' (ctx:WxO) https://review.coreboot.org/#/c/25634/38/src/soc/intel/common/block/cpu/mp_… PS38, Line 64: CONST EFI_PEI_SERVICES **ignored1, need consistent spacing around '*' (ctx:WxO) https://review.coreboot.org/#/c/25634/38/src/soc/intel/common/block/cpu/mp_… PS38, Line 67: EFI_PROCESSOR_INFORMATION *ProcessorInfoBuffer need consistent spacing around '*' (ctx:WxV) https://review.coreboot.org/#/c/25634/38/src/soc/intel/common/block/cpu/mp_… PS38, Line 92: CONST EFI_PEI_SERVICES **ignored1, need consistent spacing around '*' (ctx:WxO) https://review.coreboot.org/#/c/25634/38/src/soc/intel/common/block/cpu/mp_… PS38, Line 97: VOID *ProcedureArgument need consistent spacing around '*' (ctx:WxV) https://review.coreboot.org/#/c/25634/38/src/soc/intel/common/block/cpu/mp_… PS38, Line 116: CONST EFI_PEI_SERVICES **ignored1, need consistent spacing around '*' (ctx:WxO) https://review.coreboot.org/#/c/25634/38/src/soc/intel/common/block/cpu/mp_… PS38, Line 121: VOID *ProcedureArgument need consistent spacing around '*' (ctx:WxV) https://review.coreboot.org/#/c/25634/38/src/soc/intel/common/block/cpu/mp_… PS38, Line 146: CONST EFI_PEI_SERVICES **ignored1, need consistent spacing around '*' (ctx:WxO) https://review.coreboot.org/#/c/25634/38/src/soc/intel/common/block/cpu/mp_… PS38, Line 157: CONST EFI_PEI_SERVICES **ignored1, need consistent spacing around '*' (ctx:WxO) https://review.coreboot.org/#/c/25634/38/src/soc/intel/common/block/cpu/mp_… PS38, Line 161: UINT32 *HealthFlag need consistent spacing around '*' (ctx:WxV) https://review.coreboot.org/#/c/25634/38/src/soc/intel/common/block/cpu/mp_… PS38, Line 168: CONST EFI_PEI_SERVICES **PeiServices, need consistent spacing around '*' (ctx:WxO) -- To view, visit https://review.coreboot.org/c/coreboot/+/25634 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie844e3f15f759ea09a8f3fd24825ee740151c956 Gerrit-Change-Number: 25634 Gerrit-PatchSet: 38 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Nathaniel L Desimone <nathaniel.l.desimone(a)intel.com> Gerrit-Comment-Date: Tue, 11 Dec 2018 12:20:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: Revert "mb/google/poppy/variants/nocturne: Add DMIC properties to ACP...
by Jenny Tc (Code Review) 11 Dec '18

11 Dec '18

Jenny Tc has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30151 Change subject: Revert "mb/google/poppy/variants/nocturne: Add DMIC properties to ACPI DSD" ...................................................................... Revert "mb/google/poppy/variants/nocturne: Add DMIC properties to ACPI DSD" This reverts commit 999b916015ea0558e3821bdb51501b43a60b5ed6. The DMIC doesn't have an ACPI id. The patch which enables ACPI device with id DMIC may create conflict in the feature. Also the ACPI id "DMIC" doesn't comply with ACPI naming conventions. The issue for which the patch was introduced, is already addressed in kernel DMIC driver and the patches are upstreamed in to the Linux kernel. Change-Id: I42cb076700dcb5906599471bebfcd5b265b17644 Signed-off-by: Jenny TC <jenny.tc(a)intel.com> --- M src/mainboard/google/poppy/Kconfig M src/mainboard/google/poppy/variants/nocturne/devicetree.cb 2 files changed, 1 insertion(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/30151/1 diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig index 0683f45..7b970de 100644 --- a/src/mainboard/google/poppy/Kconfig +++ b/src/mainboard/google/poppy/Kconfig @@ -3,7 +3,6 @@ def_bool n select BOARD_ROMSIZE_KB_16384 select DRIVERS_GENERIC_GPIO_KEYS - select DRIVERS_GENERIC_GENERIC select DRIVERS_I2C_GENERIC select DRIVERS_I2C_HID select EC_GOOGLE_CHROMEEC diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 031c7ff..76b9773 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -468,18 +468,7 @@ end # LPC Interface device pci 1f.1 on end # P2SB device pci 1f.2 on end # Power Management Controller - device pci 1f.3 on - chip drivers/generic/generic - register "hid" = ""DMIC"" - register "name" = ""DMIC"" - register "desc" = ""Generic DMIC"" - register "property_count" = "1" - register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" - register "property_list[0].name" = ""modeswitch_delay_ms"" - register "property_list[0].integer" = "35" - device generic 0 on end - end - end # Intel HDA + device pci 1f.3 on end # Intel HDA device pci 1f.4 on end # SMBus device pci 1f.5 on end # PCH SPI device pci 1f.6 off end # GbE -- To view, visit https://review.coreboot.org/c/coreboot/+/30151 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I42cb076700dcb5906599471bebfcd5b265b17644 Gerrit-Change-Number: 30151 Gerrit-PatchSet: 1 Gerrit-Owner: Jenny Tc <jenny.tc(a)intel.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: arch/x86/smbios: Add SMBIOS type for QCA6174A
by Amanda Hwang (Code Review) 11 Dec '18

11 Dec '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30150 to look at the new patch set (#4). Change subject: arch/x86/smbios: Add SMBIOS type for QCA6174A ...................................................................... arch/x86/smbios: Add SMBIOS type for QCA6174A BUG=b:118656705 TEST=dmidecode -t 0xf8 and make sure that the correct SMBIOS type information gets returned. Change-Id: I0d1f84898bb4130b55508cc29fa2412ec8bad658 Signed-off-by: Amanda Huang <amanda_hwang(a)compal.corp-partner.google.com> --- M src/arch/x86/smbios.c M src/include/smbios.h M src/mainboard/google/kahlee/variants/baseboard/mainboard.c 3 files changed, 67 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/30150/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/30150 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d1f84898bb4130b55508cc29fa2412ec8bad658 Gerrit-Change-Number: 30150 Gerrit-PatchSet: 4 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: arch/x86/smbios: Add SMBIOS type for QCA6174A
by build bot (Jenkins) (Code Review) 11 Dec '18

11 Dec '18

1 0

Change in ...coreboot[master]: arch/x86/smbios: Add SMBIOS type for QCA6174A
by Amanda Hwang (Code Review) 11 Dec '18

11 Dec '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30150 to look at the new patch set (#3). Change subject: arch/x86/smbios: Add SMBIOS type for QCA6174A ...................................................................... arch/x86/smbios: Add SMBIOS type for QCA6174A BUG=b:118656705 TEST=dmidecode -t 0xf8 and make sure that the correct SMBIOS type information gets returned. Change-Id: I0d1f84898bb4130b55508cc29fa2412ec8bad658 Signed-off-by: Amanda Huang <amanda_hwang(a)compal.corp-partner.google.com> --- M src/arch/x86/smbios.c M src/include/smbios.h M src/mainboard/google/kahlee/variants/baseboard/mainboard.c 3 files changed, 67 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/30150/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/30150 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d1f84898bb4130b55508cc29fa2412ec8bad658 Gerrit-Change-Number: 30150 Gerrit-PatchSet: 3 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: arch/x86/smbios: Add SMBIOS type for QCA6174A
by build bot (Jenkins) (Code Review) 11 Dec '18

11 Dec '18

1 0

Change in ...coreboot[master]: arch/x86/smbios: Add SMBIOS type for QCA6174A
by Amanda Hwang (Code Review) 11 Dec '18

11 Dec '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30150 to look at the new patch set (#2). Change subject: arch/x86/smbios: Add SMBIOS type for QCA6174A ...................................................................... arch/x86/smbios: Add SMBIOS type for QCA6174A BUG=b:118656705 TEST=dmidecode -t 0xf8 and make sure that the correct SMBIOS type information gets returned. Change-Id: I0d1f84898bb4130b55508cc29fa2412ec8bad658 Signed-off-by: Amanda Huang <amanda_hwang(a)compal.corp-partner.google.com> --- M src/arch/x86/smbios.c M src/include/smbios.h M src/mainboard/google/kahlee/variants/baseboard/mainboard.c 3 files changed, 66 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/30150/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30150 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d1f84898bb4130b55508cc29fa2412ec8bad658 Gerrit-Change-Number: 30150 Gerrit-PatchSet: 2 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: arch/x86/smbios: Add SMBIOS type for QCA6174A
by build bot (Jenkins) (Code Review) 11 Dec '18

11 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30150 ) Change subject: arch/x86/smbios: Add SMBIOS type for QCA6174A ...................................................................... Patch Set 1: (12 comments) https://review.coreboot.org/#/c/30150/1/src/arch/x86/smbios.c File src/arch/x86/smbios.c: https://review.coreboot.org/#/c/30150/1/src/arch/x86/smbios.c@479 PS1, Line 479: trailing whitespace https://review.coreboot.org/#/c/30150/1/src/arch/x86/smbios.c@489 PS1, Line 489: t->board_file_extension = smbios_add_string(t->eos, smbios_bdf_extension()); line over 80 characters https://review.coreboot.org/#/c/30150/1/src/arch/x86/smbios.c@490 PS1, Line 490: trailing whitespace https://review.coreboot.org/#/c/30150/1/src/arch/x86/smbios.c@778 PS1, Line 778: trailing whitespace https://review.coreboot.org/#/c/30150/1/src/include/smbios.h File src/include/smbios.h: https://review.coreboot.org/#/c/30150/1/src/include/smbios.h@207 PS1, Line 207: SMBIOS_END_OF_TABLE = 127, trailing whitespace https://review.coreboot.org/#/c/30150/1/src/mainboard/google/kahlee/variant… File src/mainboard/google/kahlee/variants/baseboard/mainboard.c: https://review.coreboot.org/#/c/30150/1/src/mainboard/google/kahlee/variant… PS1, Line 102: { trailing whitespace https://review.coreboot.org/#/c/30150/1/src/mainboard/google/kahlee/variant… PS1, Line 103: return "BDF_GO_LIARA"; code indent should use tabs where possible https://review.coreboot.org/#/c/30150/1/src/mainboard/google/kahlee/variant… PS1, Line 103: return "BDF_GO_LIARA"; please, no spaces at the start of a line https://review.coreboot.org/#/c/30150/1/src/mainboard/google/kahlee/variant… PS1, Line 108: return 0x00; code indent should use tabs where possible https://review.coreboot.org/#/c/30150/1/src/mainboard/google/kahlee/variant… PS1, Line 108: return 0x00; please, no spaces at the start of a line https://review.coreboot.org/#/c/30150/1/src/mainboard/google/kahlee/variant… PS1, Line 113: return 0x00; code indent should use tabs where possible https://review.coreboot.org/#/c/30150/1/src/mainboard/google/kahlee/variant… PS1, Line 113: return 0x00; please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/30150 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d1f84898bb4130b55508cc29fa2412ec8bad658 Gerrit-Change-Number: 30150 Gerrit-PatchSet: 1 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 11 Dec 2018 09:53:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit December 2018