coreboot-gerrit December 2018

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: mb/google/cheza/chromeos.c: Add recovery mode and WP staus functions
by Frans Hendriks (Code Review) 12 Dec '18

12 Dec '18

Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30181 Change subject: mb/google/cheza/chromeos.c: Add recovery mode and WP staus functions ...................................................................... mb/google/cheza/chromeos.c: Add recovery mode and WP staus functions In commit 303a4bfd4a0df01c329683322466da46129313b1 the config VBOOT_NO_BOARD_SUPPORT is removed. This disables weak get_recovery_mode_switch() and get_write_protect_state(), without having strong functions avaiilable. Add get_recovery_mode_switch() and get_write_protect_state() . BUG=N/A TEST=N/A Change-Id: I8b532474e442153913cf031fb03cf1d661416ef7 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/mainboard/google/cheza/chromeos.c 1 file changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/30181/1 diff --git a/src/mainboard/google/cheza/chromeos.c b/src/mainboard/google/cheza/chromeos.c index 538e46f..4ab08ca 100644 --- a/src/mainboard/google/cheza/chromeos.c +++ b/src/mainboard/google/cheza/chromeos.c @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2018, Eltan B.V. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -19,3 +20,13 @@ { } + +int get_recovery_mode_switch(void) +{ + return 0; +} + +int get_write_protect_state(void) +{ + return 0; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/30181 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8b532474e442153913cf031fb03cf1d661416ef7 Gerrit-Change-Number: 30181 Gerrit-PatchSet: 1 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: soc/intel/common: Implement EFI_MP_SERVICES_PPI structure APIs
by build bot (Jenkins) (Code Review) 12 Dec '18

12 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25634 ) Change subject: soc/intel/common: Implement EFI_MP_SERVICES_PPI structure APIs ...................................................................... Patch Set 40: (7 comments) https://review.coreboot.org/#/c/25634/40/src/soc/intel/common/block/cpu/mp_… File src/soc/intel/common/block/cpu/mp_service_ppi.c: https://review.coreboot.org/#/c/25634/40/src/soc/intel/common/block/cpu/mp_… PS40, Line 47: EFI_PEI_SERVICES **ignored1, EFI_PEI_MP_SERVICES_PPI *ignored2, need consistent spacing around '*' (ctx:WxO) https://review.coreboot.org/#/c/25634/40/src/soc/intel/common/block/cpu/mp_… PS40, Line 60: static EFI_STATUS mp_get_processor_info(CONST EFI_PEI_SERVICES **ignored1, need consistent spacing around '*' (ctx:WxO) https://review.coreboot.org/#/c/25634/40/src/soc/intel/common/block/cpu/mp_… PS40, Line 85: static EFI_STATUS mp_startup_all_aps(CONST EFI_PEI_SERVICES **ignored1, need consistent spacing around '*' (ctx:WxO) https://review.coreboot.org/#/c/25634/40/src/soc/intel/common/block/cpu/mp_… PS40, Line 104: static EFI_STATUS mp_startup_this_ap(CONST EFI_PEI_SERVICES **ignored1, need consistent spacing around '*' (ctx:WxO) https://review.coreboot.org/#/c/25634/40/src/soc/intel/common/block/cpu/mp_… PS40, Line 130: static EFI_STATUS mp_switch_bsp(CONST EFI_PEI_SERVICES **ignored1, need consistent spacing around '*' (ctx:WxO) https://review.coreboot.org/#/c/25634/40/src/soc/intel/common/block/cpu/mp_… PS40, Line 138: static EFI_STATUS mp_enable_disable_ap(CONST EFI_PEI_SERVICES **ignored1, need consistent spacing around '*' (ctx:WxO) https://review.coreboot.org/#/c/25634/40/src/soc/intel/common/block/cpu/mp_… PS40, Line 145: static EFI_STATUS mp_identify_processor(CONST EFI_PEI_SERVICES **PeiServices, need consistent spacing around '*' (ctx:WxO) -- To view, visit https://review.coreboot.org/c/coreboot/+/25634 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie844e3f15f759ea09a8f3fd24825ee740151c956 Gerrit-Change-Number: 25634 Gerrit-PatchSet: 40 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Nathaniel L Desimone <nathaniel.l.desimone(a)intel.com> Gerrit-Comment-Date: Wed, 12 Dec 2018 08:22:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/poppy/variants/nami: perform PL2 setting fro bard/ekko
by Furquan Shaikh (Code Review) 12 Dec '18

12 Dec '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30178 ) Change subject: mb/google/poppy/variants/nami: perform PL2 setting fro bard/ekko ...................................................................... Patch Set 2: (2 comments) https://review.coreboot.org/#/c/30178/2//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/30178/2//COMMIT_MSG@7 PS2, Line 7: fro for https://review.coreboot.org/#/c/30178/2/src/mainboard/google/poppy/variants… File src/mainboard/google/poppy/variants/nami/mainboard.c: https://review.coreboot.org/#/c/30178/2/src/mainboard/google/poppy/variants… PS2, Line 250: case SKU_0_EKKO: : case SKU_1_EKKO: : case SKU_2_EKKO: : case SKU_3_EKKO: : case SKU_0_BARD: : case SKU_1_BARD: : case SKU_2_BARD: : case SKU_3_BARD: : pl2_id = PL2_ID_BARD_EKKO; > bard&ekko SKU ids should not be same as Vaye&Panthon […] Okay. So, the port 5 needs to be kept enabled. Can you please add break at the end of this case? -- To view, visit https://review.coreboot.org/c/coreboot/+/30178 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5f9d672c4244c363a7cfb362653663a065259fc0 Gerrit-Change-Number: 30178 Gerrit-PatchSet: 2 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 12 Dec 2018 08:18:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: mainboard/google/poppy/variants/rammus: Fixed touchscreen function fa...
by Ken Lu (Code Review) 12 Dec '18

12 Dec '18

Ken Lu has uploaded a new patch set (#2) to the change originally created by YanRu Chen. ( https://review.coreboot.org/c/coreboot/+/30180 ) Change subject: mainboard/google/poppy/variants/rammus: Fixed touchscreen function failed on EVT FATP ...................................................................... mainboard/google/poppy/variants/rammus: Fixed touchscreen function failed on EVT FATP According to issue tracker b:119238959 #13. Add control on GPP_E3 pin to delay touchscreen I2C communication with PCH. To Avoid abnormal data transfer before touchscreen I2C function complete ready during power on initialization. BUG=b:119238959 BRANCH=firmware-rammus-11275.B TEST=emerge-rammus coreboot chromeos-ec chromeos-bootimage Flash FW to DUT, run S5 stress test and verify the result Signed-off-by: YanRu Chen <kane_chen(a)pegatron.corp-partner.google.com> Change-Id: I86452c1445243c499aeaf931dba286db169c5628 --- M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/rammus/gpio.c 2 files changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/30180/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30180 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86452c1445243c499aeaf931dba286db169c5628 Gerrit-Change-Number: 30180 Gerrit-PatchSet: 2 Gerrit-Owner: YanRu Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: YanRu Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-CC: Jerry Chou <jerry_chou(a)pegatron.corp-partner.google.com> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/google/poppy/variants/nami: perform PL2 setting fro bard/ekko
by Ren Kuo (Code Review) 12 Dec '18

12 Dec '18

Ren Kuo has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30178 ) Change subject: mb/google/poppy/variants/nami: perform PL2 setting fro bard/ekko ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/30178/2/src/mainboard/google/poppy/variants… File src/mainboard/google/poppy/variants/nami/mainboard.c: https://review.coreboot.org/#/c/30178/2/src/mainboard/google/poppy/variants… PS2, Line 250: case SKU_0_EKKO: : case SKU_1_EKKO: : case SKU_2_EKKO: : case SKU_3_EKKO: : case SKU_0_BARD: : case SKU_1_BARD: : case SKU_2_BARD: : case SKU_3_BARD: : pl2_id = PL2_ID_BARD_EKKO; > If port 5 needs to be disabled for these skus, then you will have to put this above case SKU_0_VAYNE […] bard&ekko SKU ids should not be same as Vaye&Panthon suppose that ekko&bard sku can be set and will not break in vayne&pathon case? -- To view, visit https://review.coreboot.org/c/coreboot/+/30178 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5f9d672c4244c363a7cfb362653663a065259fc0 Gerrit-Change-Number: 30178 Gerrit-PatchSet: 2 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 12 Dec 2018 08:01:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: HiFive Unleashed: remove the definition of MAX_CPUS
by Xiang Wang (Code Review) 12 Dec '18

12 Dec '18

Xiang Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30179 Change subject: HiFive Unleashed: remove the definition of MAX_CPUS ...................................................................... HiFive Unleashed: remove the definition of MAX_CPUS When I debug with HiFive Unleashed, I found that hart4 could not be running. Then find the duplicate MAX_CPUS definition. The correct MAX_CPUS is located in src/soc/sifive/fu540/Kconfig Change-Id: I583f6ba548daeeb6c7e341dc3fa8817e7dec5697 Signed-off-by: Xiang Wang <wxjstz(a)126.com> --- M src/mainboard/sifive/hifive-unleashed/Kconfig 1 file changed, 0 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/30179/1 diff --git a/src/mainboard/sifive/hifive-unleashed/Kconfig b/src/mainboard/sifive/hifive-unleashed/Kconfig index b7cf107..1fdff7b 100644 --- a/src/mainboard/sifive/hifive-unleashed/Kconfig +++ b/src/mainboard/sifive/hifive-unleashed/Kconfig @@ -23,10 +23,6 @@ string default sifive/hifive-unleashed -config MAX_CPUS - int - default 4 - config MAINBOARD_PART_NUMBER string default "HiFive Unleashed" -- To view, visit https://review.coreboot.org/c/coreboot/+/30179 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I583f6ba548daeeb6c7e341dc3fa8817e7dec5697 Gerrit-Change-Number: 30179 Gerrit-PatchSet: 1 Gerrit-Owner: Xiang Wang <wxjstz(a)126.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: google/grunt: Add lost character hynix-H5ANAG6NAMR-UH.spd.hex SPD fil...
by Lucas Chen (Code Review) 12 Dec '18

12 Dec '18

Hello build bot (Jenkins), David Wu, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30177 to look at the new patch set (#2). Change subject: google/grunt: Add lost character hynix-H5ANAG6NAMR-UH.spd.hex SPD file Module Part Number ...................................................................... google/grunt: Add lost character hynix-H5ANAG6NAMR-UH.spd.hex SPD file Module Part Number Correct to add Ram_ID=0b0001 SPD Module Part Number lost last alphabet 'C' to "H5ANAG6NAMR-UHC". BUG=b:120000816 BRANCH=master TEST=mosys memory spd print all Change-Id: I4d320b2e10c4865456a9a9ccb400db5dd9256b3e Signed-off-by: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> --- M src/mainboard/google/kahlee/variants/baseboard/spd/hynix-H5ANAG6NAMR-UH.spd.hex 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/30177/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30177 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d320b2e10c4865456a9a9ccb400db5dd9256b3e Gerrit-Change-Number: 30177 Gerrit-PatchSet: 2 Gerrit-Owner: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/google/sarien/variants/arcada: Enable touchpad and touchscreen
by Casper Chang (Code Review) 12 Dec '18

12 Dec '18

Hello YH Lin, Duncan Laurie, build bot (Jenkins), Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30146 to look at the new patch set (#4). Change subject: mb/google/sarien/variants/arcada: Enable touchpad and touchscreen ...................................................................... mb/google/sarien/variants/arcada: Enable touchpad and touchscreen Enable Elan touchpad and WACOM touchscreen BUG=b:119924134, b:120103010 BRANCH=master TEST=Verify touchpad and touchscreen on arcada work with this change. Signed-off-by: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Change-Id: I3dcdb4eeeb32766e64553d9e69e6b7e2b5ba85aa --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb 1 file changed, 19 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/30146/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/30146 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3dcdb4eeeb32766e64553d9e69e6b7e2b5ba85aa Gerrit-Change-Number: 30146 Gerrit-PatchSet: 4 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Assignee: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/google/poppy/variants/nami: perform PL2 setting fro bard/ekko
by Furquan Shaikh (Code Review) 12 Dec '18

12 Dec '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30178 ) Change subject: mb/google/poppy/variants/nami: perform PL2 setting fro bard/ekko ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/30178/2/src/mainboard/google/poppy/variants… File src/mainboard/google/poppy/variants/nami/mainboard.c: https://review.coreboot.org/#/c/30178/2/src/mainboard/google/poppy/variants… PS2, Line 250: case SKU_0_EKKO: : case SKU_1_EKKO: : case SKU_2_EKKO: : case SKU_3_EKKO: : case SKU_0_BARD: : case SKU_1_BARD: : case SKU_2_BARD: : case SKU_3_BARD: : pl2_id = PL2_ID_BARD_EKKO; If port 5 needs to be disabled for these skus, then you will have to put this above case SKU_0_VAYNE: -- To view, visit https://review.coreboot.org/c/coreboot/+/30178 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5f9d672c4244c363a7cfb362653663a065259fc0 Gerrit-Change-Number: 30178 Gerrit-PatchSet: 2 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 12 Dec 2018 07:27:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: src/soc/intel/braswell/acpi/lpss.asl: Remove SPI1 and PWM asl code
by Frans Hendriks (Code Review) 12 Dec '18

12 Dec '18

Hello Hannah Williams, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29417 to look at the new patch set (#2). Change subject: src/soc/intel/braswell/acpi/lpss.asl: Remove SPI1 and PWM asl code ...................................................................... src/soc/intel/braswell/acpi/lpss.asl: Remove SPI1 and PWM asl code Linux remains using SPI1 and PWM ASL even if these devices are disabled. SPI1 and PWM are disabled by Intel FSP. Remove ASL code. BUG=N/A TEST=Boot Ubuntu on Intel CherryHill CRB Change-Id: Iec2ca7520081d00bf7a53d58ee054aa6f23e5606 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/soc/intel/braswell/acpi/lpss.asl 1 file changed, 1 insertion(+), 109 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/29417/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29417 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec2ca7520081d00bf7a53d58ee054aa6f23e5606 Gerrit-Change-Number: 29417 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit December 2018