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coreboot-gerrit
September 2017
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Change in coreboot[master]: ifdtool: port the feature to set AltMeDisable/HAP bit here
by build bot (Jenkins) (Code Review)
21 Sep '17
21 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21437
) Change subject: ifdtool: port the feature to set AltMeDisable/HAP bit here ...................................................................... Patch Set 32: Verified-1 Build Unstable
https://qa.coreboot.org/job/coreboot-gerrit/60839/
: UNSTABLE
https://qa.coreboot.org/job/coreboot-checkpatch/16025/
: SUCCESS -- To view, visit
https://review.coreboot.org/21437
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9a2ecc60cfbb9ee9d96f15be3d53226cb428729a Gerrit-Change-Number: 21437 Gerrit-PatchSet: 32 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 21 Sep 2017 01:25:06 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: ifdtool: Port the feature to jail ME from me_cleaner
by build bot (Jenkins) (Code Review)
21 Sep '17
21 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21607
) Change subject: ifdtool: Port the feature to jail ME from me_cleaner ...................................................................... Patch Set 4: Verified-1 Build Unstable
https://qa.coreboot.org/job/coreboot-gerrit/60838/
: UNSTABLE
https://qa.coreboot.org/job/coreboot-checkpatch/16024/
: SUCCESS -- To view, visit
https://review.coreboot.org/21607
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I00533f4e2569c4763fbfc302bb460db1e60e5564 Gerrit-Change-Number: 21607 Gerrit-PatchSet: 4 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 21 Sep 2017 01:21:21 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: ifdtool: refactor region-permission-related functions
by build bot (Jenkins) (Code Review)
21 Sep '17
21 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21416
) Change subject: ifdtool: refactor region-permission-related functions ...................................................................... Patch Set 39: Verified-1 Build Unstable
https://qa.coreboot.org/job/coreboot-gerrit/60837/
: UNSTABLE
https://qa.coreboot.org/job/coreboot-checkpatch/16023/
: SUCCESS -- To view, visit
https://review.coreboot.org/21416
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4d34606545db4d970ce3ec202da4bf4c5cbad18c Gerrit-Change-Number: 21416 Gerrit-PatchSet: 39 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: Shawn Chang <citypw(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 21 Sep 2017 01:17:39 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/skylake: add Kabylake Celeron base SKU
by Gaggery Tsai (Code Review)
21 Sep '17
21 Sep '17
Gaggery Tsai has uploaded this change for review. (
https://review.coreboot.org/21617
Change subject: soc/intel/skylake: add Kabylake Celeron base SKU ...................................................................... soc/intel/skylake: add Kabylake Celeron base SKU This patch adds the support for Kabylake Celeron base SKU with PCH ID 0x9d50. BRANCH=none BUG=b:65709679 TEST=Ensure coreboot could recognize the Kabylake Celeron base SKU and boot into OS. Change-Id: I9c6f7bf643e0dbeb132fb677fcff461244101a55 Signed-off-by: Tsai, Gaggery <gaggery.tsai(a)intel.com> --- M src/include/device/pci_ids.h M src/soc/intel/common/block/lpc/lpc.c M src/soc/intel/skylake/bootblock/report_platform.c M src/soc/intel/skylake/lpc.c 4 files changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/21617/1 diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 07b66d1..0c78fab 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2670,6 +2670,7 @@ #define PCI_DEVICE_ID_INTEL_KBP_H_QM170 0xa14d #define PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22 0x9d4b #define PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22 0x9d4e +#define PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22 0x9d50 #define PCI_DEVICE_ID_INTEL_KBP_LP_SUPER_SKU 0x9d51 #define PCI_DEVICE_ID_INTEL_KBP_LP_U_PREMIUM 0x9d58 #define PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM 0x9d56 diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index 2bd9d07..da3188d 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -108,6 +108,7 @@ PCI_DEVICE_ID_INTEL_KBP_H_QM170, PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22, PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22, + PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22, PCI_DEVICE_ID_INTEL_KBP_LP_SUPER_SKU, PCI_DEVICE_ID_INTEL_KBP_LP_U_PREMIUM, PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM, diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index e7fbb8a..69484fb 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -76,6 +76,8 @@ "Kabylake-Y iHDCP 2.2 Premium" }, { PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22, "Kabylake-U iHDCP 2.2 Premium" }, + { PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22, + "Kabylake-U iHDCP 2.2 Base" }, }; static struct { diff --git a/src/soc/intel/skylake/lpc.c b/src/soc/intel/skylake/lpc.c index 6e7b197..295dace 100644 --- a/src/soc/intel/skylake/lpc.c +++ b/src/soc/intel/skylake/lpc.c @@ -328,6 +328,7 @@ PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM, PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22, PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22, + PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22, 0 }; -- To view, visit
https://review.coreboot.org/21617
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I9c6f7bf643e0dbeb132fb677fcff461244101a55 Gerrit-Change-Number: 21617 Gerrit-PatchSet: 1 Gerrit-Owner: Gaggery Tsai <gaggery.tsai(a)intel.com>
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Change in coreboot[master]: amd/stoneyridge: Clean up include files in northbridge.h
by build bot (Jenkins) (Code Review)
21 Sep '17
21 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21615
) Change subject: amd/stoneyridge: Clean up include files in northbridge.h ...................................................................... Patch Set 1: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/60835/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/16021/
: SUCCESS -- To view, visit
https://review.coreboot.org/21615
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3e5ab39fd0640d2983fc5b7b202fb65d42c5ce3d Gerrit-Change-Number: 21615 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 21 Sep 2017 01:09:20 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/amd/stoneyridge: Revert CAR teardown wbinvd
by build bot (Jenkins) (Code Review)
21 Sep '17
21 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/20967
) Change subject: soc/amd/stoneyridge: Revert CAR teardown wbinvd ...................................................................... Patch Set 9: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/60834/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/16020/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8e6bcb3947f508b1db1a42fd0714bba70074837a Gerrit-Change-Number: 20967 Gerrit-PatchSet: 9 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 21 Sep 2017 01:07:15 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/amd/stoneyridge: Add postcar stage
by build bot (Jenkins) (Code Review)
21 Sep '17
21 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/20966
) Change subject: soc/amd/stoneyridge: Add postcar stage ...................................................................... Patch Set 9: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/60833/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/16019/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1045446655b81b806d75903d75288ab17b5e77d1 Gerrit-Change-Number: 20966 Gerrit-PatchSet: 9 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 21 Sep 2017 01:06:02 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/cannonlake: Remove old soc_get_rtc_failed function
by Martin Roth (Code Review)
21 Sep '17
21 Sep '17
Martin Roth has uploaded this change for review. (
https://review.coreboot.org/21616
Change subject: soc/intel/cannonlake: Remove old soc_get_rtc_failed function ...................................................................... soc/intel/cannonlake: Remove old soc_get_rtc_failed function In coreboot commit bcd0bdabed (soc/intel/cannonlake: add rtc failure checking), the function soc_get_rtc_failed was supposed to be moved, but the old function was not removed, causing a build error. BUG=b:63054105 Change-Id: I31c1966af413df3f5a5492a5dd891a6eb26a1fc4 Signed-off-by: Martin Roth <martinroth(a)google.com> --- M src/soc/intel/cannonlake/pmc.c 1 file changed, 0 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/21616/1 diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c index a91e5ea..e9972a6 100644 --- a/src/soc/intel/cannonlake/pmc.c +++ b/src/soc/intel/cannonlake/pmc.c @@ -87,22 +87,6 @@ } } -int soc_get_rtc_failed(void) -{ - uint8_t reg8; - int rtc_failed; - uint8_t *pmcbase = pmc_mmio_regs(); - - reg8 = read8(pmcbase + GEN_PMCON_B); - rtc_failed = reg8 & RTC_BATTERY_DEAD; - if (rtc_failed) { - reg8 &= ~RTC_BATTERY_DEAD; - write8(pmcbase + GEN_PMCON_B, reg8); - printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed); - } - return rtc_failed; -} - static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable) { uint32_t reg; -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I31c1966af413df3f5a5492a5dd891a6eb26a1fc4 Gerrit-Change-Number: 21616 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com>
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Change in coreboot[master]: soc/amd/common: Clean up GetHeapBase function
by build bot (Jenkins) (Code Review)
21 Sep '17
21 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21593
) Change subject: soc/amd/common: Clean up GetHeapBase function ...................................................................... Patch Set 4: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/60830/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/16016/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Id4a024d000a514ea9a44f9dfc2caffae9ff01789 Gerrit-Change-Number: 21593 Gerrit-PatchSet: 4 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 21 Sep 2017 00:58:56 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: amd/stoneyridge: Move AmdInitEnv to ramstage
by build bot (Jenkins) (Code Review)
21 Sep '17
21 Sep '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21613
) Change subject: amd/stoneyridge: Move AmdInitEnv to ramstage ...................................................................... Patch Set 2: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/60832/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/16018/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0e4a5fd979b06cf50907c62d51e55db63c5e00c5 Gerrit-Change-Number: 21613 Gerrit-PatchSet: 2 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 21 Sep 2017 00:58:25 +0000 Gerrit-HasComments: No
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