coreboot-gerrit September 2017

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Change in coreboot[master]: mb/intel/dg43gt: Fix very long boot delays with USE_OPTION_TABLE
by Arthur Heymans (Code Review) 22 Sep '17

22 Sep '17

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/21641 Change subject: mb/intel/dg43gt: Fix very long boot delays with USE_OPTION_TABLE ...................................................................... mb/intel/dg43gt: Fix very long boot delays with USE_OPTION_TABLE With USE_OPTION_TABLE console_init() will fetch both baudrate and debug level from rtc nvram. These functions will at some point try to create some output even though console is not ready yet. This board seems to have the COMA hardware in an undefined state with a very low divisor which results in long boot delay ~30s. Setting the BDLAB bit seems to fix it. Change-Id: I6a23ef9577161084521b569fc3870a27f50624d1 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/intel/dg43gt/romstage.c 1 file changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/21641/1 diff --git a/src/mainboard/intel/dg43gt/romstage.c b/src/mainboard/intel/dg43gt/romstage.c index 6944b18..b84f5a2 100644 --- a/src/mainboard/intel/dg43gt/romstage.c +++ b/src/mainboard/intel/dg43gt/romstage.c @@ -26,6 +26,7 @@ #include <lib.h> #include <northbridge/intel/x4x/iomap.h> #include <timestamp.h> +#include <drivers/uart/uart8250reg.h> #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1) #define LPC_DEV PCI_DEV(0, 0x1f, 0) @@ -83,6 +84,15 @@ mb_gpio_init(); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + /* Aparantly the COMA port is booted in an undefined state in which + * the divisor is very high. In console_init() some functions are + * called which print to the console resulting in very long + * (up to 30s) boot delays. + * Setting the Baudrate Divisor Latch Access Bit (BDLAB) here fixes it. + */ + if (CONFIG_TTYS0_BASE == 0x3f8) + outb(UART8250_LCR_DLAB, CONFIG_TTYS0_BASE + UART8250_LCR); + console_init(); report_bist_failure(bist); -- To view, visit https://review.coreboot.org/21641 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I6a23ef9577161084521b569fc3870a27f50624d1 Gerrit-Change-Number: 21641 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: ifdtool: improve the "new layout" feature
by build bot (Jenkins) (Code Review) 22 Sep '17

22 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21315 ) Change subject: ifdtool: improve the "new layout" feature ...................................................................... Patch Set 53: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/60936/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16118/ : SUCCESS -- To view, visit https://review.coreboot.org/21315 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia2b92c3f835f9849a243a48c37588c2dbe7449bf Gerrit-Change-Number: 21315 Gerrit-PatchSet: 53 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Christopher Douglass <cdouglass.orion(a)gmail.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Sep 2017 15:48:25 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: Fizz: Enable EC-EFS support for Depthcharge
by Daisuke Nojiri (Code Review) 22 Sep '17

22 Sep '17

Daisuke Nojiri has uploaded this change for review. ( https://review.coreboot.org/21640 Change subject: Fizz: Enable EC-EFS support for Depthcharge ...................................................................... Fizz: Enable EC-EFS support for Depthcharge BUG=b:65028930 BRANCH=none TEST=emerge-fizz coreboot. Verify Depthcharge recognize VBSD_EC_EFS. Change-Id: Ie18536982e172a45703600eec6e183c1e7c12746 Signed-off-by: Daisuke Nojiri <dnojiri(a)chromium.org> --- M src/mainboard/google/fizz/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/21640/1 diff --git a/src/mainboard/google/fizz/Kconfig b/src/mainboard/google/fizz/Kconfig index 107af9a..06868ae 100644 --- a/src/mainboard/google/fizz/Kconfig +++ b/src/mainboard/google/fizz/Kconfig @@ -21,6 +21,7 @@ config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select VBOOT_EC_EFS config DRIVER_TPM_I2C_BUS depends on FIZZ_USE_I2C_TPM -- To view, visit https://review.coreboot.org/21640 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ie18536982e172a45703600eec6e183c1e7c12746 Gerrit-Change-Number: 21640 Gerrit-PatchSet: 1 Gerrit-Owner: Daisuke Nojiri <dnojiri(a)chromium.org>

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Change in coreboot[master]: nb/intel/sandybridge/raminit: Improve readability
by build bot (Jenkins) (Code Review) 22 Sep '17

22 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21638 ) Change subject: nb/intel/sandybridge/raminit: Improve readability ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/60934/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16116/ : SUCCESS -- To view, visit https://review.coreboot.org/21638 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I722102b7981781b88cdc4877f698294eb719ff32 Gerrit-Change-Number: 21638 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Sep 2017 14:22:55 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/sandybridge/raminit: Improve readability
by Patrick Rudolph (Code Review) 22 Sep '17

22 Sep '17

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/21638 Change subject: nb/intel/sandybridge/raminit: Improve readability ...................................................................... nb/intel/sandybridge/raminit: Improve readability Improve readability of SPD probing. Change-Id: I722102b7981781b88cdc4877f698294eb719ff32 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/northbridge/intel/sandybridge/raminit.c 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/21638/1 diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 2854a2b..bdba748 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -209,6 +209,9 @@ /* count dimms on channel */ for (slot = 0; slot < NUM_SLOTS; slot++) { spd_slot = 2 * channel + slot; + printk(BIOS_DEBUG, + "SPD probe channel%d, slot%d\n", channel, slot); + spd_decode_ddr3(&dimm->dimm[channel][slot], spd[spd_slot]); if (dimm->dimm[channel][slot].dram_type == SPD_MEMORY_TYPE_SDRAM_DDR3) dimms_on_channel++; @@ -216,6 +219,9 @@ for (slot = 0; slot < NUM_SLOTS; slot++) { spd_slot = 2 * channel + slot; + printk(BIOS_DEBUG, + "SPD probe channel%d, slot%d\n", channel, slot); + /* search for XMP profile */ spd_xmp_decode_ddr3(&dimm->dimm[channel][slot], spd[spd_slot], -- To view, visit https://review.coreboot.org/21638 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I722102b7981781b88cdc4877f698294eb719ff32 Gerrit-Change-Number: 21638 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org>

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Change in coreboot[master]: mb/*/*/cmos.layout: Remove rtc nvram configurable debug level
by build bot (Jenkins) (Code Review) 22 Sep '17

22 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21637 ) Change subject: mb/*/*/cmos.layout: Remove rtc nvram configurable debug level ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/60933/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16115/ : SUCCESS -- To view, visit https://review.coreboot.org/21637 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8db4ba428ec51f9230bb5f3d2259ae9141308f81 Gerrit-Change-Number: 21637 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Sep 2017 13:19:36 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mb/intel/dg43gt: Add romstage timestamps
by build bot (Jenkins) (Code Review) 22 Sep '17

22 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21635 ) Change subject: mb/intel/dg43gt: Add romstage timestamps ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/60932/ : SUCCESS -- To view, visit https://review.coreboot.org/21635 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0383dd9b582d5c77be66ecd74bcf1a438f874cc7 Gerrit-Change-Number: 21635 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Sep 2017 13:17:47 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mb/*/*: Remove rtc nvram configurable baud rate
by build bot (Jenkins) (Code Review) 22 Sep '17

22 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19682 ) Change subject: mb/*/*: Remove rtc nvram configurable baud rate ...................................................................... Patch Set 13: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/60930/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16113/ : SUCCESS -- To view, visit https://review.coreboot.org/19682 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I71698d9b188eeac73670b18b757dff5fcea0df41 Gerrit-Change-Number: 19682 Gerrit-PatchSet: 13 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Sep 2017 13:13:13 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mb/*/*/cmos.layout: Remove rtc nvram configurable debug level
by build bot (Jenkins) (Code Review) 22 Sep '17

22 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21637 ) Change subject: mb/*/*/cmos.layout: Remove rtc nvram configurable debug level ...................................................................... Patch Set 4: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/60931/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/16114/ : SUCCESS -- To view, visit https://review.coreboot.org/21637 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8db4ba428ec51f9230bb5f3d2259ae9141308f81 Gerrit-Change-Number: 21637 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Sep 2017 13:12:48 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mainboard/winnet/g170: drop the redundant vendor name
by Martin Roth (Code Review) 22 Sep '17

22 Sep '17

Martin Roth has posted comments on this change. ( https://review.coreboot.org/21612 ) Change subject: mainboard/winnet/g170: drop the redundant vendor name ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/21612 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iae0a8725645b9d6321b64ccbad10633e0049d477 Gerrit-Change-Number: 21612 Gerrit-PatchSet: 1 Gerrit-Owner: Lubomir Rintel <lkundrak(a)v3.sk> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Sep 2017 13:06:05 +0000 Gerrit-HasComments: No

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coreboot-gerrit September 2017