coreboot-gerrit

coreboot-gerrit@coreboot.org
  • 1 participants
  • 1960 discussions
Change in coreboot[master]: soc/amd/stoneyridge: Wait for UART to be ready
by build bot (Jenkins) (Code Review)
2 years, 2 months
Change in coreboot[master]: mainboard/google/fizz: Enable Devslp for SATA port 1
by build bot (Jenkins) (Code Review)
2 years, 2 months
Change in coreboot[master]: mainboard/google/fizz: Enable Devslp for SATA port 1
by Gaggery Tsai (Code Review)
2 years, 2 months
Change in coreboot[master]: memtest: Add disable SPD option to coreboot menuconfig
by build bot (Jenkins) (Code Review)
2 years, 2 months
Change in coreboot[master]: ifdtool: port the feature to set AltMeDisable/HAP bit here
by build bot (Jenkins) (Code Review)
2 years, 2 months
Change in coreboot[master]: ifdtool: Port the feature to jail ME from me_cleaner
by build bot (Jenkins) (Code Review)
2 years, 2 months
Change in coreboot[master]: ifdtool: refactor region-permission-related functions
by build bot (Jenkins) (Code Review)
2 years, 2 months
Change in coreboot[master]: ifdtool: improve the "new layout" feature
by build bot (Jenkins) (Code Review)
2 years, 2 months
Change in coreboot[master]: mainboard/google/fizz: Enable Devslp for SATA port 1
by build bot (Jenkins) (Code Review)
2 years, 2 months
Change in coreboot[master]: mainboard/google/fizz: Enable Devslp for SATA port 1
by Gaggery Tsai (Code Review)
2 years, 2 months
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