coreboot-gerrit September 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: ifdtool: refactor region_name(s) and new_layout
by build bot (Jenkins) (Code Review) 05 Sep '17

05 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21315 ) Change subject: ifdtool: refactor region_name(s) and new_layout ...................................................................... Patch Set 8: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15129/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59867/ : SUCCESS -- To view, visit https://review.coreboot.org/21315 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia2b92c3f835f9849a243a48c37588c2dbe7449bf Gerrit-Change-Number: 21315 Gerrit-PatchSet: 8 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Sep 2017 10:54:31 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: ifdtool: optimize some code and data type
by build bot (Jenkins) (Code Review) 05 Sep '17

05 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21288 ) Change subject: ifdtool: optimize some code and data type ...................................................................... Patch Set 17: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15128/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59868/ : SUCCESS -- To view, visit https://review.coreboot.org/21288 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6d05418c8b32fa31dcd038a3e56f9aefe13fa9c4 Gerrit-Change-Number: 21288 Gerrit-PatchSet: 17 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: Ronald G. Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Sep 2017 10:51:52 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: google/snappy: Update EC keyboard backlight flag by SKU ID
by build bot (Jenkins) (Code Review) 05 Sep '17

05 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21400 ) Change subject: google/snappy: Update EC keyboard backlight flag by SKU ID ...................................................................... Patch Set 3: Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/59866/ : UNSTABLE -- To view, visit https://review.coreboot.org/21400 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1153aa0b89250c55f311dd93a01fcef47afd7292 Gerrit-Change-Number: 21400 Gerrit-PatchSet: 3 Gerrit-Owner: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Keith Tzeng <keith.tzeng(a)quantatw.com> Gerrit-Reviewer: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Sep 2017 10:19:19 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: [WIP] mainboard/google/soraka: USB 2.0 tuning for port4
by build bot (Jenkins) (Code Review) 05 Sep '17

05 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21403 ) Change subject: [WIP] mainboard/google/soraka: USB 2.0 tuning for port4 ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15127/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59865/ : SUCCESS -- To view, visit https://review.coreboot.org/21403 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2c79e96e2e3dea1364d7b71af19b57f4c9307fcb Gerrit-Change-Number: 21403 Gerrit-PatchSet: 1 Gerrit-Owner: Wisley Chen <wisley.chen(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Sep 2017 09:57:31 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: [WIP] mainboard/google/soraka: USB 2.0 tuning for port4
by Wisley Chen (Code Review) 05 Sep '17

05 Sep '17

Wisley Chen has uploaded this change for review. ( https://review.coreboot.org/21403 Change subject: [WIP] mainboard/google/soraka: USB 2.0 tuning for port4 ...................................................................... [WIP] mainboard/google/soraka: USB 2.0 tuning for port4 Fine tune usb 2.0 strength for port 4 to pass eye diagram. BUG=b:65306272 TEST=build on soraka, measure usb2.0 eye diagram, and result is pass. Change-Id: I2c79e96e2e3dea1364d7b71af19b57f4c9307fcb Signed-off-by: Wisley Chen <wisley.chen(a)quantatw.com> --- M src/mainboard/google/poppy/variants/soraka/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/21403/1 diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index b39092b..fea3372 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -156,7 +156,7 @@ register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)" # Type-C Port 1 register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth - register "usb2_ports[4]" = "USB2_PORT_LONG(OC1)" # Type-C Port 2 + register "usb2_ports[4]" = "USB2_PORT_MAX(OC1)" # Type-C Port 2 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port -- To view, visit https://review.coreboot.org/21403 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I2c79e96e2e3dea1364d7b71af19b57f4c9307fcb Gerrit-Change-Number: 21403 Gerrit-PatchSet: 1 Gerrit-Owner: Wisley Chen <wisley.chen(a)quantatw.com>

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Change in coreboot[master]: soc/intel/skylake: Add config for Enbaling PCIe AER
by build bot (Jenkins) (Code Review) 05 Sep '17

05 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21401 ) Change subject: soc/intel/skylake: Add config for Enbaling PCIe AER ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15125/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59861/ : SUCCESS -- To view, visit https://review.coreboot.org/21401 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ieb74c3566ded2276e549c98f78813c4f5d4d310a Gerrit-Change-Number: 21401 Gerrit-PatchSet: 1 Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rajat Jain <rajatja(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Sep 2017 09:07:58 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mb/google/soraka: enable AER for PCIe root port 0
by build bot (Jenkins) (Code Review) 05 Sep '17

05 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21402 ) Change subject: mb/google/soraka: enable AER for PCIe root port 0 ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15126/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59862/ : SUCCESS -- To view, visit https://review.coreboot.org/21402 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I76742801e84449d0910ddadf31d39597df3263b9 Gerrit-Change-Number: 21402 Gerrit-PatchSet: 1 Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rajat Jain <rajatja(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Sep 2017 09:05:13 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mb/google/soraka: enable AER for PCIe root port 0
by Rizwan Qureshi (Code Review) 05 Sep '17

05 Sep '17

Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/21402 Change subject: mb/google/soraka: enable AER for PCIe root port 0 ...................................................................... mb/google/soraka: enable AER for PCIe root port 0 Enable PCIe Advanced Error Reporting for PCIe root port 0. Change-Id: I76742801e84449d0910ddadf31d39597df3263b9 Signed-off-by: Rizwan Qureshi <rizwan.qureshi(a)intel.com> --- M src/mainboard/google/poppy/variants/soraka/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/21402/1 diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 3ac3aaf..87e4b83 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -152,6 +152,8 @@ register "PcieRpClkReqSupport[0]" = "1" # RP 1 uses SRCCLKREQ1# register "PcieRpClkReqNumber[0]" = "1" + # RP 1, Enable Advanced Error Reporting + register PcieRpAdvancedErrorReporting[0] = "1" register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)" # Type-C Port 1 register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port -- To view, visit https://review.coreboot.org/21402 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I76742801e84449d0910ddadf31d39597df3263b9 Gerrit-Change-Number: 21402 Gerrit-PatchSet: 1 Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com>

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Change in coreboot[master]: soc/intel/skylake: Add config for Enbaling PCIe AER
by Rizwan Qureshi (Code Review) 05 Sep '17

05 Sep '17

Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/21401 Change subject: soc/intel/skylake: Add config for Enbaling PCIe AER ...................................................................... soc/intel/skylake: Add config for Enbaling PCIe AER Add a config for enabling/disabling Advanced Error Reporting feature for PCIe root ports. BUG=b:64798078 TEST="lspci" shows that AER is enabled in the capabilities list. Change-Id: Ieb74c3566ded2276e549c98f78813c4f5d4d310a Signed-off-by: Rizwan Qureshi <rizwan.qureshi(a)intel.com> --- M src/soc/intel/skylake/chip.h M src/soc/intel/skylake/chip_fsp20.c 2 files changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/21401/1 diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index beb5a7a..45f3f99 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -173,6 +173,7 @@ u8 PcieRpEnable[CONFIG_MAX_ROOT_PORTS]; u8 PcieRpClkReqSupport[CONFIG_MAX_ROOT_PORTS]; u8 PcieRpClkReqNumber[CONFIG_MAX_ROOT_PORTS]; + u8 PcieRpAdvancedErrorReporting[CONFIG_MAX_ROOT_PORTS]; /* USB related */ struct usb2_port_config usb2_ports[16]; diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index aa612ed..adf8772 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -166,6 +166,9 @@ sizeof(params->PcieRpClkReqSupport)); memcpy(params->PcieRpClkReqNumber, config->PcieRpClkReqNumber, sizeof(params->PcieRpClkReqNumber)); + memcpy(params->PcieRpAdvancedErrorReporting, + config->PcieRpAdvancedErrorReporting, + sizeof(params->PcieRpAdvancedErrorReporting)); /* disable Legacy PME */ memset(params->PcieRpPmSci, 0, sizeof(params->PcieRpPmSci)); -- To view, visit https://review.coreboot.org/21401 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ieb74c3566ded2276e549c98f78813c4f5d4d310a Gerrit-Change-Number: 21401 Gerrit-PatchSet: 1 Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com>

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Change in coreboot[master]: google/snappy: Update EC keyboard backlight flag by SKU ID
by build bot (Jenkins) (Code Review) 05 Sep '17

05 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21400 ) Change subject: google/snappy: Update EC keyboard backlight flag by SKU ID ...................................................................... Patch Set 2: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/59860/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/15124/ : SUCCESS -- To view, visit https://review.coreboot.org/21400 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1153aa0b89250c55f311dd93a01fcef47afd7292 Gerrit-Change-Number: 21400 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Keith Tzeng <keith.tzeng(a)quantatw.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Sep 2017 08:28:39 +0000 Gerrit-HasComments: No

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coreboot-gerrit September 2017