Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/21212
to look at the new patch set (#5).
Change subject: [WIP,TEST]mb/g41c-gs: Attempt to fix broken SATA (in payload and linux)
......................................................................
[WIP,TEST]mb/g41c-gs: Attempt to fix broken SATA (in payload and linux)
Change-Id: I8067080ce7c3f080ad9ebcbb27086f8a048aff6b
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/southbridge/intel/i82801gx/lpc.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/21212/5
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I8067080ce7c3f080ad9ebcbb27086f8a048aff6b
Gerrit-Change-Number: 21212
Gerrit-PatchSet: 5
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/21212
to look at the new patch set (#4).
Change subject: [WIP,TEST]mb/g41c-gs: Attempt to fix broken SATA (in payload and linux)
......................................................................
[WIP,TEST]mb/g41c-gs: Attempt to fix broken SATA (in payload and linux)
Change-Id: I8067080ce7c3f080ad9ebcbb27086f8a048aff6b
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/mainboard/asrock/g41c-gs/romstage.c
1 file changed, 47 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/21212/4
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I8067080ce7c3f080ad9ebcbb27086f8a048aff6b
Gerrit-Change-Number: 21212
Gerrit-PatchSet: 4
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Alexander Couzens has uploaded this change for review. ( https://review.coreboot.org/21238
Change subject: Kconfig: move Mainboard selection to the top level
......................................................................
Kconfig: move Mainboard selection to the top level
Choosing the mainboard vendor and board is the most important settings.
It should be choosen as the first thing before configuring anything else.
Change-Id: Ic21abc69a3430475c232d8050626d6bca98c5514
Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu>
---
M src/Kconfig
M src/mainboard/Kconfig
2 files changed, 8 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/21238/1
diff --git a/src/Kconfig b/src/Kconfig
index 4dd1ded..91dea2a 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -16,6 +16,14 @@
mainmenu "coreboot configuration"
+source "src/mainboard/Kconfig"
+
+menu "Mainboard"
+
+source "src/mainboard/Kconfig.mainboard"
+
+endmenu
+
menu "General setup"
config COREBOOT_BUILD
@@ -266,12 +274,6 @@
help
The path and filename of the file to use as graphical bootsplash
screen. The file format has to be jpg.
-
-endmenu
-
-menu "Mainboard"
-
-source "src/mainboard/Kconfig"
endmenu
diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig
index 7367367..8d4e0d1 100644
--- a/src/mainboard/Kconfig
+++ b/src/mainboard/Kconfig
@@ -9,5 +9,3 @@
endchoice
source "src/mainboard/*/Kconfig"
-
-source "src/mainboard/Kconfig.mainboard"
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic21abc69a3430475c232d8050626d6bca98c5514
Gerrit-Change-Number: 21238
Gerrit-PatchSet: 1
Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu>
Alexander Couzens has uploaded this change for review. ( https://review.coreboot.org/21237
Change subject: Kconfig: move remaining Mainboard options into src/mainboard/Kconfig.mainboard
......................................................................
Kconfig: move remaining Mainboard options into src/mainboard/Kconfig.mainboard
Change-Id: I909d090ea449dbf0ef0328b7c2741214bc8a07d4
Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu>
---
M src/Kconfig
M src/mainboard/Kconfig.mainboard
2 files changed, 40 insertions(+), 40 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/21237/1
diff --git a/src/Kconfig b/src/Kconfig
index 637f575..4dd1ded 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -273,46 +273,6 @@
source "src/mainboard/Kconfig"
-config DEVICETREE
- string
- default "devicetree.cb"
- help
- This symbol allows mainboards to select a different file under their
- mainboard directory for the devicetree.cb file. This allows the board
- variants that need different devicetrees to be in the same directory.
-
- Examples: "devicetree.variant.cb"
- "variant/devicetree.cb"
-
-config CBFS_SIZE
- hex "Size of CBFS filesystem in ROM"
- # Default value set at the end of the file
- help
- This is the part of the ROM actually managed by CBFS, located at the
- end of the ROM (passed through cbfstool -o) on x86 and at at the start
- of the ROM (passed through cbfstool -s) everywhere else. It defaults
- to span the whole ROM on all but Intel systems that use an Intel Firmware
- Descriptor. It can be overridden to make coreboot live alongside other
- components like ChromeOS's vboot/FMAP or Intel's IFD / ME / TXE
- binaries.
-
-config FMDFILE
- string "fmap description file in fmd format"
- default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS
- default ""
- help
- The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE,
- but in some cases more complex setups are required.
- When an fmd is specified, it overrides the default format.
-
-config MAINBOARD_HAS_TPM2
- bool
- default n
- help
- There is a TPM device installed on the mainboard, and it is
- compliant with version 2 TCG TPM specification. Could be connected
- over LPC, SPI or I2C.
-
endmenu
# load site-local kconfig to allow user specific defaults and overrides
diff --git a/src/mainboard/Kconfig.mainboard b/src/mainboard/Kconfig.mainboard
index babbb95..8983b8a 100644
--- a/src/mainboard/Kconfig.mainboard
+++ b/src/mainboard/Kconfig.mainboard
@@ -155,3 +155,43 @@
config ENABLE_POWER_BUTTON
def_bool y if !POWER_BUTTON_IS_OPTIONAL && POWER_BUTTON_FORCE_ENABLE
def_bool n if !POWER_BUTTON_IS_OPTIONAL && POWER_BUTTON_FORCE_DISABLE
+
+config DEVICETREE
+ string
+ default "devicetree.cb"
+ help
+ This symbol allows mainboards to select a different file under their
+ mainboard directory for the devicetree.cb file. This allows the board
+ variants that need different devicetrees to be in the same directory.
+
+ Examples: "devicetree.variant.cb"
+ "variant/devicetree.cb"
+
+config CBFS_SIZE
+ hex "Size of CBFS filesystem in ROM"
+ # Default value set at the end of the file
+ help
+ This is the part of the ROM actually managed by CBFS, located at the
+ end of the ROM (passed through cbfstool -o) on x86 and at at the start
+ of the ROM (passed through cbfstool -s) everywhere else. It defaults
+ to span the whole ROM on all but Intel systems that use an Intel Firmware
+ Descriptor. It can be overridden to make coreboot live alongside other
+ components like ChromeOS's vboot/FMAP or Intel's IFD / ME / TXE
+ binaries.
+
+config FMDFILE
+ string "fmap description file in fmd format"
+ default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS
+ default ""
+ help
+ The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE,
+ but in some cases more complex setups are required.
+ When an fmd is specified, it overrides the default format.
+
+config MAINBOARD_HAS_TPM2
+ bool
+ default n
+ help
+ There is a TPM device installed on the mainboard, and it is
+ compliant with version 2 TCG TPM specification. Could be connected
+ over LPC, SPI or I2C.
--
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To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I909d090ea449dbf0ef0328b7c2741214bc8a07d4
Gerrit-Change-Number: 21237
Gerrit-PatchSet: 1
Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu>