coreboot-gerrit August 2017

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Change in coreboot[master]: sb/intel/bd82x6x: make hotplug map consistent to remapped ports
by build bot (Jenkins) (Code Review) 29 Aug '17

29 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21178 ) Change subject: sb/intel/bd82x6x: make hotplug map consistent to remapped ports ...................................................................... Patch Set 13: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14776/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59472/ : SUCCESS -- To view, visit https://review.coreboot.org/21178 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I28c4eaf82fb52fe793dfa2f824f14686b80951ad Gerrit-Change-Number: 21178 Gerrit-PatchSet: 13 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 Aug 2017 14:55:56 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/common: Add functions into common SMM library
by Subrata Banik (Code Review) 29 Aug '17

29 Aug '17

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/21268 ) Change subject: soc/intel/common: Add functions into common SMM library ...................................................................... Patch Set 2: will clean up APL and SKL code SMM region function and make use of this common code -- To view, visit https://review.coreboot.org/21268 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If10af4a3f6a5bd22db5a03bcd3033a01b1cce0b4 Gerrit-Change-Number: 21268 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 Aug 2017 14:54:16 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/common: Add functions into common SMM library
by Subrata Banik (Code Review) 29 Aug '17

29 Aug '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/21268 to look at the new patch set (#2). Change subject: soc/intel/common: Add functions into common SMM library ...................................................................... soc/intel/common: Add functions into common SMM library This patch to add helper function to get SMM region start and size based on systemagent common library. BRANCH=none BUG=b:63974384 TEST=Build and boot eve successfully. Change-Id: If10af4a3f6a5bd22db5a03bcd3033a01b1cce0b4 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/common/block/include/intelblocks/smm.h M src/soc/intel/common/block/smm/Makefile.inc M src/soc/intel/common/block/smm/smm.c 3 files changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/21268/2 -- To view, visit https://review.coreboot.org/21268 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: If10af4a3f6a5bd22db5a03bcd3033a01b1cce0b4 Gerrit-Change-Number: 21268 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: mb/asrock/g41c-gs: Fix the SATA CLOCK output on ck505
by build bot (Jenkins) (Code Review) 29 Aug '17

29 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21257 ) Change subject: mb/asrock/g41c-gs: Fix the SATA CLOCK output on ck505 ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14775/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59471/ : SUCCESS -- To view, visit https://review.coreboot.org/21257 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic2b8ca91920f015ae3265871bc092023302fefdc Gerrit-Change-Number: 21257 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 Aug 2017 14:01:27 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/common: Add functions into common system agent library
by build bot (Jenkins) (Code Review) 29 Aug '17

29 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21267 ) Change subject: soc/intel/common: Add functions into common system agent library ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14774/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59469/ : SUCCESS -- To view, visit https://review.coreboot.org/21267 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4c8b79f047e3dc6b2deb17fdb745f004004526b6 Gerrit-Change-Number: 21267 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 Aug 2017 13:45:27 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/cannonlake: Add PrmrrSize and C6DRAM config
by build bot (Jenkins) (Code Review) 29 Aug '17

29 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21266 ) Change subject: soc/intel/cannonlake: Add PrmrrSize and C6DRAM config ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14772/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59468/ : SUCCESS -- To view, visit https://review.coreboot.org/21266 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I61ec3b6a16e20526516f681ddc3c70755724ed8a Gerrit-Change-Number: 21266 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 Aug 2017 13:43:19 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/common: Add functions into common SMM library
by build bot (Jenkins) (Code Review) 29 Aug '17

29 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21268 ) Change subject: soc/intel/common: Add functions into common SMM library ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/59470/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/14773/ : SUCCESS -- To view, visit https://review.coreboot.org/21268 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If10af4a3f6a5bd22db5a03bcd3033a01b1cce0b4 Gerrit-Change-Number: 21268 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 Aug 2017 13:42:54 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/common: Add functions into common SMM library
by Subrata Banik (Code Review) 29 Aug '17

29 Aug '17

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/21268 Change subject: soc/intel/common: Add functions into common SMM library ...................................................................... soc/intel/common: Add functions into common SMM library This patch to add helper function to get SMM region start and size based on systemagent common library. BRANCH=none BUG=b:63974384 TEST=Build and boot eve successfully. Change-Id: If10af4a3f6a5bd22db5a03bcd3033a01b1cce0b4 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/common/block/include/intelblocks/smm.h M src/soc/intel/common/block/smm/Makefile.inc M src/soc/intel/common/block/smm/smm.c 3 files changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/21268/1 diff --git a/src/soc/intel/common/block/include/intelblocks/smm.h b/src/soc/intel/common/block/include/intelblocks/smm.h index 09378b9..423c8a8 100644 --- a/src/soc/intel/common/block/include/intelblocks/smm.h +++ b/src/soc/intel/common/block/include/intelblocks/smm.h @@ -30,5 +30,7 @@ */ void smm_southbridge_clear_state(void); void smm_southbridge_enable(void); +/* API to get SMM region start and size based on Host Bridge register */ +void smm_region(void **start, size_t *size); #endif diff --git a/src/soc/intel/common/block/smm/Makefile.inc b/src/soc/intel/common/block/smm/Makefile.inc index e505625..82a3191 100644 --- a/src/soc/intel/common/block/smm/Makefile.inc +++ b/src/soc/intel/common/block/smm/Makefile.inc @@ -1,3 +1,6 @@ +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smihandler.c smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP) += smitraphandler.c diff --git a/src/soc/intel/common/block/smm/smm.c b/src/soc/intel/common/block/smm/smm.c index 41f3426..5a7f216 100644 --- a/src/soc/intel/common/block/smm/smm.c +++ b/src/soc/intel/common/block/smm/smm.c @@ -19,6 +19,7 @@ #include <cpu/x86/smm.h> #include <intelblocks/pmclib.h> #include <intelblocks/smm.h> +#include <intelblocks/systemagent.h> #include <soc/pm.h> void smm_southbridge_clear_state(void) @@ -77,3 +78,9 @@ "d" (APM_CNT) ); } + +void smm_region(void **start, size_t *size) +{ + *start = (void *)sa_get_tseg_base(); + *size = sa_get_tseg_size(); +} -- To view, visit https://review.coreboot.org/21268 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: If10af4a3f6a5bd22db5a03bcd3033a01b1cce0b4 Gerrit-Change-Number: 21268 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>

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Change in coreboot[master]: soc/intel/common: Add functions into common system agent library
by Subrata Banik (Code Review) 29 Aug '17

29 Aug '17

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/21267 Change subject: soc/intel/common: Add functions into common system agent library ...................................................................... soc/intel/common: Add functions into common system agent library This patch to add helper function to get tseg memory base and size for HW based memory layout design. BRANCH=none BUG=b:63974384 TEST=Build and boot eve successfully. Change-Id: I4c8b79f047e3dc6b2deb17fdb745f004004526b6 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/common/block/include/intelblocks/systemagent.h M src/soc/intel/common/block/systemagent/systemagent_early.c 2 files changed, 23 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/21267/1 diff --git a/src/soc/intel/common/block/include/intelblocks/systemagent.h b/src/soc/intel/common/block/include/intelblocks/systemagent.h index 5f04e36..4ca19e6 100644 --- a/src/soc/intel/common/block/include/intelblocks/systemagent.h +++ b/src/soc/intel/common/block/include/intelblocks/systemagent.h @@ -74,11 +74,15 @@ /* API to enable Power Aware Interrupt Routing through MCHBAR */ void enable_power_aware_intr(void); /* API to get TOLUD base address */ -uint32_t sa_get_tolud_base(void); +uintptr_t sa_get_tolud_base(void); /* API to get DSM size */ size_t sa_get_dsm_size(void); /* API to get GSM size */ size_t sa_get_gsm_size(void); +/* API to get TSEG base address */ +uintptr_t sa_get_tseg_base(void); +/* API to get TSEG size */ +size_t sa_get_tseg_size(void); /* API to get DPR size */ size_t sa_get_dpr_size(void); /* diff --git a/src/soc/intel/common/block/systemagent/systemagent_early.c b/src/soc/intel/common/block/systemagent/systemagent_early.c index 855d953..4abc15f 100644 --- a/src/soc/intel/common/block/systemagent/systemagent_early.c +++ b/src/soc/intel/common/block/systemagent/systemagent_early.c @@ -133,7 +133,7 @@ MCHBAR8(BIOS_RESET_CPL) = bios_reset_cpl; } -uint32_t sa_get_tolud_base(void) +uintptr_t sa_get_tolud_base(void) { /* All regions concerned for have 1 MiB alignment. */ return ALIGN_DOWN(pci_read_config32(SA_DEV_ROOT, TOLUD), 1*MiB); @@ -147,6 +147,12 @@ size_t sa_get_dsm_size(void) { return (((sa_get_ggc_reg() & G_GMS_MASK) >> G_GMS_OFFSET) * 32*MiB); +} + +static uintptr_t sa_get_gsm_base(void) +{ + /* All regions concerned for have 1 MiB alignment. */ + return ALIGN_DOWN(pci_read_config32(SA_DEV_ROOT, BGSM), 1*MiB); } size_t sa_get_gsm_size(void) @@ -165,6 +171,17 @@ return 0; } +uintptr_t sa_get_tseg_base(void) +{ + /* All regions concerned for have 1 MiB alignment. */ + return ALIGN_DOWN(pci_read_config32(SA_DEV_ROOT, TSEG), 1*MiB); +} + +size_t sa_get_tseg_size(void) +{ + return sa_get_gsm_base() - sa_get_tseg_base(); +} + /* * Get DPR size in case CONFIG_SA_ENABLE_DPR is selected by SoC. */ -- To view, visit https://review.coreboot.org/21267 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4c8b79f047e3dc6b2deb17fdb745f004004526b6 Gerrit-Change-Number: 21267 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>

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Change in coreboot[master]: soc/intel/cannonlake: Add PrmrrSize and C6DRAM config
by Subrata Banik (Code Review) 29 Aug '17

29 Aug '17

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/21266 Change subject: soc/intel/cannonlake: Add PrmrrSize and C6DRAM config ...................................................................... soc/intel/cannonlake: Add PrmrrSize and C6DRAM config This patch ensures coreboot can set PRMRR size and C6DRAM enable FSP-M UPDs. Change-Id: I61ec3b6a16e20526516f681ddc3c70755724ed8a Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/romstage/romstage.c 2 files changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/21266/1 diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 48305fe..0ed41fc 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -186,6 +186,14 @@ /* Enable/Disable EIST. 1b:Enabled, 0b:Disabled */ uint8_t eist_enable; + /* Enable C6 DRAM */ + uint8_t enable_c6dram; + /* + * PRMRR size setting with below options + * 0x00100000 - 1MiB + * 0x02000000 - 32MiB and beyond + */ + uint32_t PrmrrSize; }; typedef struct soc_intel_cannonlake_config config_t; diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 17c3191..5fa39ca 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -82,6 +82,8 @@ mask |= (1 << i); } m_cfg->PcieRpEnableMask = mask; + m_cfg->PrmrrSize = config->PrmrrSize; + m_cfg->EnableC6Dram = config->enable_c6dram; } void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) -- To view, visit https://review.coreboot.org/21266 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I61ec3b6a16e20526516f681ddc3c70755724ed8a Gerrit-Change-Number: 21266 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>

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coreboot-gerrit August 2017