Lin Huang has posted comments on this change. ( https://review.coreboot.org/20866 )
Change subject: rockchip: gpio: add gpio_pull argument in gpio_input_irq() function
......................................................................
Patch Set 2:
> Actually, let's fix this in in gpio_input_irq... see my comment on
> the bug.
done
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I9b8e6497f07146dafdb447a6ea10d039a2a2fa33
Gerrit-Change-Number: 20866
Gerrit-PatchSet: 2
Gerrit-Owner: Lin Huang <hl(a)rock-chips.com>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Lin Huang <hl(a)rock-chips.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Thu, 03 Aug 2017 03:08:10 +0000
Gerrit-HasComments: No
Hello Julius Werner, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/20866
to look at the new patch set (#2).
Change subject: rockchip: gpio: add gpio_pull argument in gpio_input_irq() function
......................................................................
rockchip: gpio: add gpio_pull argument in gpio_input_irq() function
some gpio irq need to set input pull initialization status
to guarantee get the right irq trigger. let's add this argument
in gpio_input_irq() function
BRANCH=None
BUG=None
TEST=boot from bob
Change-Id: I9b8e6497f07146dafdb447a6ea10d039a2a2fa33
Signed-off-by: Lin Huang <hl(a)rock-chips.com>
---
M src/mainboard/google/gru/bootblock.c
M src/soc/rockchip/common/gpio.c
M src/soc/rockchip/common/include/soc/gpio.h
3 files changed, 14 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/20866/2
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I9b8e6497f07146dafdb447a6ea10d039a2a2fa33
Gerrit-Change-Number: 20866
Gerrit-PatchSet: 2
Gerrit-Owner: Lin Huang <hl(a)rock-chips.com>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Julius Werner has posted comments on this change. ( https://review.coreboot.org/20866 )
Change subject: rockchip: tpm: cr50: set tpm_irq gpio initialization status
......................................................................
Patch Set 1: -Code-Review
Actually, let's fix this in in gpio_input_irq... see my comment on the bug.
--
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Gerrit-Change-Id: I9b8e6497f07146dafdb447a6ea10d039a2a2fa33
Gerrit-Change-Number: 20866
Gerrit-PatchSet: 1
Gerrit-Owner: Lin Huang <hl(a)rock-chips.com>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Thu, 03 Aug 2017 02:14:42 +0000
Gerrit-HasComments: No
Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/20869
Change subject: mainboard/google/poppy: Ensure correct sequencing of PERST signal
......................................................................
mainboard/google/poppy: Ensure correct sequencing of PERST signal
PERST# signal has specific requirements that it should be low for
~1msec after applying power to PCIe device. Ensure that this
requirement is met by adding a delay of 5ms before setting WLAN_PE_RST
to low (There is an inverter which inverts the logic of WLAN_PE_RST to
PERST#).
(This is a temporary workaround until support is added to do this in
ACPI.)
BUG=b:64181150,b:62726961
TEST=Verified with warm reboot and suspend-resume stress test that
wifi is still functional.
Change-Id: I68e1bd67499262a17daade72e9a9fd32934a184d
Signed-off-by: Furquan Shaikh <furquan(a)chromium.org>
---
M src/mainboard/google/poppy/ramstage.c
M src/mainboard/google/poppy/smihandler.c
M src/mainboard/google/poppy/variants/soraka/gpio.c
3 files changed, 17 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/20869/1
diff --git a/src/mainboard/google/poppy/ramstage.c b/src/mainboard/google/poppy/ramstage.c
index 39df3ee..2390013 100644
--- a/src/mainboard/google/poppy/ramstage.c
+++ b/src/mainboard/google/poppy/ramstage.c
@@ -14,6 +14,9 @@
*/
#include <baseboard/variants.h>
+#include <delay.h>
+#include <gpio.h>
+#include <soc/gpio.h>
#include <soc/ramstage.h>
#include <variant/gpio.h>
@@ -25,4 +28,16 @@
pads = variant_gpio_table(&num);
gpio_configure_pads(pads, num);
+
+ /*
+ * TODO(furquan): Temporary work-around until this is properly
+ * implemented in ACPI.
+ * Ensure PERST# timing requirements are met by pulling it high for
+ * >1msec. This is important to ensure that the wifi chip does not get
+ * into a bad state on warm reboot/suspend-resume.
+ */
+ gpio_set(GPP_B8, 1);
+ mdelay(5);
+ gpio_set(GPP_B8, 0);
+
}
diff --git a/src/mainboard/google/poppy/smihandler.c b/src/mainboard/google/poppy/smihandler.c
index 1a86d0f..68d071e 100644
--- a/src/mainboard/google/poppy/smihandler.c
+++ b/src/mainboard/google/poppy/smihandler.c
@@ -31,6 +31,7 @@
{
/* Power down camera PMIC */
gpio_set(EN_PP3300_DX_CAM, 0);
+ gpio_set(GPP_B8, 1);
}
void mainboard_smi_sleep(u8 slp_typ)
diff --git a/src/mainboard/google/poppy/variants/soraka/gpio.c b/src/mainboard/google/poppy/variants/soraka/gpio.c
index f0fb34a..ddd5cd7 100644
--- a/src/mainboard/google/poppy/variants/soraka/gpio.c
+++ b/src/mainboard/google/poppy/variants/soraka/gpio.c
@@ -79,7 +79,7 @@
/* B7 : SRCCLKREQ2# ==> NC */
PAD_CFG_NC(GPP_B7),
/* B8 : SRCCLKREQ3# ==> WLAN_PE_RST */
- PAD_CFG_GPO(GPP_B8, 0, DEEP),
+ PAD_CFG_GPO(GPP_B8, 1, DEEP),
/* B9 : SRCCLKREQ4# ==> NC */
PAD_CFG_NC(GPP_B9),
/* B10 : SRCCLKREQ5# ==> NC */
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I68e1bd67499262a17daade72e9a9fd32934a184d
Gerrit-Change-Number: 20869
Gerrit-PatchSet: 1
Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>