coreboot-gerrit May 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: nb/intel/x4x: Rename a things that are not ddr2 specific
by Philippe Mathieu-Daudé (Code Review) 26 May '17

26 May '17

Philippe Mathieu-Daudé has posted comments on this change. ( https://review.coreboot.org/19870 ) Change subject: nb/intel/x4x: Rename a things that are not ddr2 specific ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/19870 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ib3d10014f530905155e56fc52706edb4ab9f5630 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: mb/lenovo/t430: Fix hot-plug ports
by build bot (Jenkins) (Code Review) 26 May '17

26 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19928 ) Change subject: mb/lenovo/t430: Fix hot-plug ports ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/10169/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54447/ : SUCCESS -- To view, visit https://review.coreboot.org/19928 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I5d3d4c7541683a6c09aac47ca251a6dad23ad1ab Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: mb/lenovo/t430: Fix hot-plug ports
by Patrick Rudolph (Code Review) 26 May '17

26 May '17

Patrick Rudolph has uploaded a new change for review. ( https://review.coreboot.org/19928 ) Change subject: mb/lenovo/t430: Fix hot-plug ports ...................................................................... mb/lenovo/t430: Fix hot-plug ports Port 0 is connected to SD-card reader. Don't mark it as hot-plugable. Change-Id: I5d3d4c7541683a6c09aac47ca251a6dad23ad1ab Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/mainboard/lenovo/t430/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/19928/1 diff --git a/src/mainboard/lenovo/t430/devicetree.cb b/src/mainboard/lenovo/t430/devicetree.cb index 86c8756..0a121b7 100644 --- a/src/mainboard/lenovo/t430/devicetree.cb +++ b/src/mainboard/lenovo/t430/devicetree.cb @@ -47,7 +47,7 @@ register "gpi13_routing" = "2" register "gpi1_routing" = "2" register "p_cnt_throttling_supported" = "1" - register "pcie_hotplug_map" = "{ 1, 0, 1, 0, 0, 0, 0, 0 }" + register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }" register "pcie_port_coalesce" = "1" register "sata_interface_speed_support" = "0x3" register "sata_port_map" = "0x17" -- To view, visit https://review.coreboot.org/19928 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: I5d3d4c7541683a6c09aac47ca251a6dad23ad1ab Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org>

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Change in coreboot[master]: nb/intel/i945/raminit.c: Refactor tRD selection
by build bot (Jenkins) (Code Review) 26 May '17

26 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18354 ) Change subject: nb/intel/i945/raminit.c: Refactor tRD selection ...................................................................... Patch Set 15: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/10167/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54445/ : SUCCESS -- To view, visit https://review.coreboot.org/18354 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I8002daf25b7603131b78b01075f43fd23747dd94 Gerrit-PatchSet: 15 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: device/dram/ddr2: Add functions to select common CAS en freq
by build bot (Jenkins) (Code Review) 26 May '17

26 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18320 ) Change subject: device/dram/ddr2: Add functions to select common CAS en freq ...................................................................... Patch Set 29: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/10166/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54444/ : SUCCESS -- To view, visit https://review.coreboot.org/18320 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I3ab39d38a243edddfde8f70ebd23f79ff774e90e Gerrit-PatchSet: 29 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: nb/i945/raminit: Use common ddr2 decode functions
by build bot (Jenkins) (Code Review) 26 May '17

26 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18305 ) Change subject: nb/i945/raminit: Use common ddr2 decode functions ...................................................................... Patch Set 37: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/10168/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54446/ : SUCCESS -- To view, visit https://review.coreboot.org/18305 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I97c93939d11807752797785dd88c70b43a236ee3 Gerrit-PatchSet: 37 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com> Gerrit-HasComments: No

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Change in coreboot[master]: nb/i945/raminit: Use common ddr2 decode functions
by Arthur Heymans (Code Review) 26 May '17

26 May '17

Hello Patrick Rudolph, build bot (Jenkins), coreboot org, I'd like you to reexamine a change. Please visit https://review.coreboot.org/18305 to look at the new patch set (#37). Change subject: nb/i945/raminit: Use common ddr2 decode functions ...................................................................... nb/i945/raminit: Use common ddr2 decode functions This simplifies computing dram timings a lot. This removes computation of rank size based on columns, rows, banks,... and uses the information in SPD byte 31. The result of this is that dimms with multiple asymmetric ranks are not supported anymore. These however are very rare and most likely never tested on this platform. This also uses i2c block read instead of byte read to speed up the raminit. The result is less time is being spend reading SPDs. It still keeps smbus read byte as a backup if i2c block read were to fail. Change-Id: I97c93939d11807752797785dd88c70b43a236ee3 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/intel/i945/raminit.c M src/northbridge/intel/i945/raminit.h 2 files changed, 156 insertions(+), 614 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/18305/37 -- To view, visit https://review.coreboot.org/18305 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I97c93939d11807752797785dd88c70b43a236ee3 Gerrit-PatchSet: 37 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com>

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Change in coreboot[master]: nb/intel/i945/raminit.c: Refactor tRD selection
by Arthur Heymans (Code Review) 26 May '17

26 May '17

Hello build bot (Jenkins), Nico Huber, I'd like you to reexamine a change. Please visit https://review.coreboot.org/18354 to look at the new patch set (#15). Change subject: nb/intel/i945/raminit.c: Refactor tRD selection ...................................................................... nb/intel/i945/raminit.c: Refactor tRD selection Inspired by gm45 code, which sets this value the same way. Some values for tRD on 800 and 1067MHz FSB were set wrong because the CAS/Freq selection was wrong. CAS was often selected to low and when fixing CAS this results in tRD being too high, due to an incorrect lookup table which caused instability. PASSED memtest86+ during 10h+ on 1067MHZ fsb with 667MHz ddr2, CAS 5 on GA-945GCM-S2L. Change-Id: I8002daf25b7603131b78b01075f43fd23747dd94 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/intel/i945/raminit.c 1 file changed, 13 insertions(+), 33 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/18354/15 -- To view, visit https://review.coreboot.org/18354 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I8002daf25b7603131b78b01075f43fd23747dd94 Gerrit-PatchSet: 15 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: device/dram/ddr2: Add functions to select common CAS en freq
by Arthur Heymans (Code Review) 26 May '17

26 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/18320 to look at the new patch set (#29). Change subject: device/dram/ddr2: Add functions to select common CAS en freq ...................................................................... device/dram/ddr2: Add functions to select common CAS en freq This adds two functions: - one to find the highest common tCLK per CAS; - another to find to select tCLK and CAS based on the results of the previous function and the limits on minimal tCLK the memory controller can impose. Change-Id: I3ab39d38a243edddfde8f70ebd23f79ff774e90e Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/device/dram/ddr2.c M src/include/device/dram/ddr2.h 2 files changed, 83 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/18320/29 -- To view, visit https://review.coreboot.org/18320 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I3ab39d38a243edddfde8f70ebd23f79ff774e90e Gerrit-PatchSet: 29 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/apollolake: Use common systemagent code
by build bot (Jenkins) (Code Review) 26 May '17

26 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19795 ) Change subject: soc/intel/apollolake: Use common systemagent code ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/10164/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54443/ : SUCCESS -- To view, visit https://review.coreboot.org/19795 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I15a3b2fc46ec9063b54379d41996b9a1d612cfd2 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-HasComments: No

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coreboot-gerrit May 2017