coreboot-gerrit May 2017

coreboot-gerrit@coreboot.org

1 participants
3888 discussions

Change in coreboot[master]: mb/lenovo/s230u: fix sata port map for the msata port
by Anonymous Coward (Code Review) 02 May '17

02 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19523 to look at the new patch set (#4). Change subject: mb/lenovo/s230u: fix sata port map for the msata port ...................................................................... mb/lenovo/s230u: fix sata port map for the msata port s230u seems only have two sata ports: one for the 2.5in hdd and one for msata. map 0x11 (port 0 & 4) enables hdd but not msata, and map 0x5 (port 0 & 2) enables both. Change-Id: I1e9e96f0d0849b1e8c4e02aa4f686ceb5e10b3ab Signed-off-by: Bill XIE <persmule(a)gmail.com> --- M src/mainboard/lenovo/s230u/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/19523/4 -- To view, visit https://review.coreboot.org/19523 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I1e9e96f0d0849b1e8c4e02aa4f686ceb5e10b3ab Gerrit-PatchSet: 4 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Anonymous Coward #1001586 Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins)

1 0

Change in coreboot[master]: mb/gigabyte/ga-b75m-d3h: add libgfxinit support
by Anonymous Coward (Code Review) 02 May '17

02 May '17

Anonymous Coward #1001586 has posted comments on this change. ( https://review.coreboot.org/19522 ) Change subject: mb/gigabyte/ga-b75m-d3h: add libgfxinit support ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/#/c/19522/3//COMMIT_MSG Commit Message: PS3, Line 9: only on port HDMI1 > What happens on the DVI and Analog port? Maybe you can compile with ada deb I have done so. libgfxinit finally fetches the EDID and generate a config when attaching an adapter to the DVI-D port (HDMI1), and generates nothing if the adapter is attached to other ports. -- To view, visit https://review.coreboot.org/19522 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: If00a7247df0c32b3d1f489fb92d86baaa8fdf8ba Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Anonymous Coward #1001586 Gerrit-Reviewer: Anonymous Coward #1001586 Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: Yes

1 0

Change in coreboot[master]: sb/intel/i82801gx: Consolidate interrupt routing
by coreboot org (Code Review) 02 May '17

02 May '17

coreboot org has posted comments on this change. ( https://review.coreboot.org/19017 ) Change subject: sb/intel/i82801gx: Consolidate interrupt routing ...................................................................... Patch Set 7: Verified-1 Gigabyte GA-G41M-ES2L: Target OFFLINE. Test ABORTED. Asus P5GC-MX: Boot successful. Extended test FAILED.Asus P5GC-MX: DMESG_ACCESS_FAILURE -- To view, visit https://review.coreboot.org/19017 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I46838d2249c6fefedf9e2c63ade0812d22e7d627 Gerrit-PatchSet: 7 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Vladimir Serbinenko <phcoder(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com> Gerrit-HasComments: No

1 0

Change in coreboot[master]: [WIP]soc/intel/common/block: Add Intel PMC support
by Bora Guvendik (Code Review) 02 May '17

02 May '17

Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/19349 ) Change subject: [WIP]soc/intel/common/block: Add Intel PMC support ...................................................................... Patch Set 1: (3 comments) https://review.coreboot.org/#/c/19349/1//COMMIT_MSG Commit Message: PS1, Line 7: [WIP] remove this https://review.coreboot.org/#/c/19349/1/src/soc/intel/common/block/pmc/Kcon… File src/soc/intel/common/block/pmc/Kconfig: PS1, Line 4: PMC please describe what PMC stands for https://review.coreboot.org/#/c/19349/1/src/soc/intel/common/block/pmc/pmc.c File src/soc/intel/common/block/pmc/pmc.c: PS1, Line 31: use tabs -- To view, visit https://review.coreboot.org/19349 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ic3d96fc23a98c30e8ea0969a7be09d217eeaa889 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: Yes

1 0

Change in coreboot[master]: sb/intel/i82801gx: Consolidate interrupt routing
by build bot (Jenkins) (Code Review) 02 May '17

02 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19017 ) Change subject: sb/intel/i82801gx: Consolidate interrupt routing ...................................................................... Patch Set 8: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/53092/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/8927/ : SUCCESS -- To view, visit https://review.coreboot.org/19017 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I46838d2249c6fefedf9e2c63ade0812d22e7d627 Gerrit-PatchSet: 8 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Vladimir Serbinenko <phcoder(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com> Gerrit-HasComments: No

1 0

Change in coreboot[master]: sb/intel/i82801gx: Consolidate interrupt routing
by Arthur Heymans (Code Review) 02 May '17

02 May '17

Hello Vladimir Serbinenko, Paul Menzel, build bot (Jenkins), coreboot org, I'd like you to reexamine a change. Please visit https://review.coreboot.org/19017 to look at the new patch set (#8). Change subject: sb/intel/i82801gx: Consolidate interrupt routing ...................................................................... sb/intel/i82801gx: Consolidate interrupt routing The current code tries to make routing per-board, presumably for optimizing IRQ balancing but instead fails at providing an error-free default. Rewrite in unified and simplified way at the cost of minor performance hit on very old OS. This is set up similar to newer Intel PCH where a sane default is provided by coreboot. Change-Id: I46838d2249c6fefedf9e2c63ade0812d22e7d627 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/apple/macbook21/Kconfig D src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl M src/mainboard/apple/macbook21/devicetree.cb M src/mainboard/apple/macbook21/romstage.c M src/mainboard/asus/p5gc-mx/Kconfig D src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl M src/mainboard/asus/p5gc-mx/devicetree.cb M src/mainboard/getac/p470/Kconfig M src/mainboard/getac/p470/devicetree.cb M src/mainboard/getac/p470/romstage.c D src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl M src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb M src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c M src/mainboard/gigabyte/ga-g41m-es2l/Kconfig D src/mainboard/gigabyte/ga-g41m-es2l/acpi/x4x_pci_irqs.asl M src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb M src/mainboard/gigabyte/ga-g41m-es2l/romstage.c M src/mainboard/ibase/mb899/Kconfig D src/mainboard/ibase/mb899/acpi/i945_pci_irqs.asl M src/mainboard/ibase/mb899/devicetree.cb M src/mainboard/ibase/mb899/romstage.c M src/mainboard/intel/d510mo/Kconfig D src/mainboard/intel/d510mo/acpi/pineview_pci_irqs.asl M src/mainboard/intel/d510mo/devicetree.cb M src/mainboard/intel/d510mo/romstage.c M src/mainboard/intel/d945gclf/Kconfig D src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl M src/mainboard/intel/d945gclf/devicetree.cb M src/mainboard/intel/d945gclf/romstage.c M src/mainboard/kontron/986lcd-m/Kconfig D src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl M src/mainboard/kontron/986lcd-m/devicetree.cb M src/mainboard/kontron/986lcd-m/romstage.c M src/mainboard/lenovo/t60/Kconfig D src/mainboard/lenovo/t60/acpi/i945_pci_irqs.asl M src/mainboard/lenovo/t60/devicetree.cb M src/mainboard/lenovo/t60/romstage.c M src/mainboard/lenovo/x60/Kconfig D src/mainboard/lenovo/x60/acpi/i945_pci_irqs.asl M src/mainboard/lenovo/x60/devicetree.cb M src/mainboard/lenovo/x60/romstage.c M src/mainboard/roda/rk886ex/Kconfig D src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl M src/mainboard/roda/rk886ex/devicetree.cb M src/mainboard/roda/rk886ex/romstage.c M src/northbridge/intel/i945/acpi/hostbridge.asl M src/northbridge/intel/i945/early_init.c M src/northbridge/intel/i945/i945.h M src/northbridge/intel/pineview/acpi/hostbridge.asl M src/northbridge/intel/pineview/early_init.c M src/northbridge/intel/x4x/acpi/hostbridge.asl M src/northbridge/intel/x4x/early_init.c M src/southbridge/intel/i82801gx/acpi/ich7.asl R src/southbridge/intel/i82801gx/acpi/irq.asl M src/southbridge/intel/i82801gx/chip.h M src/southbridge/intel/i82801gx/early_lpc.c M src/southbridge/intel/i82801gx/i82801gx.h M src/southbridge/intel/i82801gx/lpc.c 58 files changed, 408 insertions(+), 1,221 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/19017/8 -- To view, visit https://review.coreboot.org/19017 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I46838d2249c6fefedf9e2c63ade0812d22e7d627 Gerrit-PatchSet: 8 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Vladimir Serbinenko <phcoder(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com>

1 0

Change in coreboot[master]: cbmem: Add new command line flag to dump console for one boo...
by Sumeet R Pawnikar (Code Review) 02 May '17

02 May '17

Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/19497 ) Change subject: cbmem: Add new command line flag to dump console for one boot only ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/19497 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ic17383507a884d84de9a2a880380cb15b25708a1 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

1 0

Change in coreboot[master]: sb/intel/i82801gx: Consolidate interrupt routing
by build bot (Jenkins) (Code Review) 02 May '17

02 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19017 ) Change subject: sb/intel/i82801gx: Consolidate interrupt routing ...................................................................... Patch Set 7: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/53091/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/8926/ : SUCCESS -- To view, visit https://review.coreboot.org/19017 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I46838d2249c6fefedf9e2c63ade0812d22e7d627 Gerrit-PatchSet: 7 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Vladimir Serbinenko <phcoder(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com> Gerrit-HasComments: No

1 0

Change in coreboot[master]: mainboard/google/poppy: Update GPIO table for next build
by Sumeet R Pawnikar (Code Review) 02 May '17

02 May '17

Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/19517 ) Change subject: mainboard/google/poppy: Update GPIO table for next build ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/19517 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I949a14bfaa7972f2257a0b11ee81dcb0771e2f7f Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

1 0

Change in coreboot[master]: soc/intel/skylake: Remove unused skylake_i2c_config structure
by Sumeet R Pawnikar (Code Review) 02 May '17

02 May '17

Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/19520 ) Change subject: soc/intel/skylake: Remove unused skylake_i2c_config structure ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/19520 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Icde4b7af5b9c31020099c1a6372a6867827f61ae Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit May 2017