Hello Aaron Durbin, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19157
to look at the new patch set (#18).
Change subject: amd/pi/00670F00: Add AMD PSP support for Stoney Ridge
......................................................................
amd/pi/00670F00: Add AMD PSP support for Stoney Ridge
Add initial support for BIOS->PSP communication that is not
covered by AGESA. The first command implemented notifies
the PSP that DRAM is ready.
Gardenia is the only ST-enabled mainboard. Send the PSP the
notification from Gardenia's romstage file.
Change-Id: Icf111470b261d6516b878e88be471967abe681b3
Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Signed-off-by: Marc Jones <marcj303(a)gmail.com>
---
M src/mainboard/amd/gardenia/romstage.c
M src/northbridge/amd/pi/00670F00/Makefile.inc
A src/northbridge/amd/pi/00670F00/psp.c
A src/northbridge/amd/pi/00670F00/psp.h
4 files changed, 302 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/19157/18
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Icf111470b261d6516b878e88be471967abe681b3
Gerrit-PatchSet: 18
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com>
Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org>
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Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
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Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19555
to look at the new patch set (#8).
Change subject: drivers/pc80/tpm: Refactor init_tpm() implementation
......................................................................
drivers/pc80/tpm: Refactor init_tpm() implementation
Move the TPM deactivate command after the tis_init()
function in order to ensure that there is a TPM which
can be used.
Add additional doc for CONFIG_NO_TPM_RESUME kconfig option
which is mainly used by chromebooks.
Add TPM_PcrRead command for TPM state retrieval by calling
it. Now the TPM state is logged. Also if TPM deactivate is
enforced and something is wrong it will jump directly to
the error handling.
Change-Id: I2c51ce402f43466e211bc1990335fd320d685829
Signed-off-by: Philipp Deppenwiese <zaolin(a)das-labor.org>
---
M src/drivers/pc80/tpm/romstage.c
1 file changed, 62 insertions(+), 34 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/19555/8
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I2c51ce402f43466e211bc1990335fd320d685829
Gerrit-PatchSet: 8
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Alexander Couzens has posted comments on this change. ( https://review.coreboot.org/19523 )
Change subject: mb/lenovo/s230u: fix sata port map for the msata port
......................................................................
Patch Set 5: Code-Review+2
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Gerrit-MessageType: comment
Gerrit-Change-Id: I1e9e96f0d0849b1e8c4e02aa4f686ceb5e10b3ab
Gerrit-PatchSet: 5
Gerrit-Project: coreboot
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Gerrit-Owner: Bill XIE <persmule(a)gmail.com>
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Gerrit-HasComments: No
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/16328
to look at the new patch set (#20).
Change subject: util/intelmetool: Add bootguard information dump support
......................................................................
util/intelmetool: Add bootguard information dump support
With this implementation it's possible to detect the state
of bootguard in intel based systems. Currently it's WIP and
in a testphase. Handle it with care!
Change-Id: Ifeec8e20fa8efc35d7db4c6a84be1f118dccfc4a
Signed-off-by: Philipp Deppenwiese <zaolin(a)das-labor.org>
---
M util/intelmetool/Makefile
M util/intelmetool/intelmetool.c
M util/intelmetool/intelmetool.h
M util/intelmetool/me.c
M util/intelmetool/me.h
A util/intelmetool/msr.c
A util/intelmetool/msr.h
7 files changed, 261 insertions(+), 49 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/16328/20
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ifeec8e20fa8efc35d7db4c6a84be1f118dccfc4a
Gerrit-PatchSet: 20
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
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Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
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Gerrit-Reviewer: Mathias Krause <minipli(a)googlemail.com>
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Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com>
Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/19468 )
Change subject: intel/common/block/i2c: Add common block for I2C
......................................................................
Patch Set 11:
> > So you never removed the other code in this patch series? Why?
> the
> > soc code is already using common code. Just change the Kconfig
> > selections.
>
> I suggest you either squash all the patches together or tweak the
> existing code and then *move* it in a follow up patch. The reason I
> say that is because I don't want to lose the history of the
> existing code. The way you are transitioning the history be lost
> and simple git blame won't tell us anything pertinent.
Aah...I get it.
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Gerrit-MessageType: comment
Gerrit-Change-Id: I4d91a04c22e181e3a995112cce6d5f0324130b81
Gerrit-PatchSet: 11
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Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com>
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