Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/19955 )
Change subject: mb/lenovo/*/cmos: Remove unused option and checksum fix
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/19955/1/src/mainboard/lenovo/l520/cmos.layo…
File src/mainboard/lenovo/l520/cmos.layout:
PS1, Line 83: # SandyBridge MRC Scrambler Seed values
: 896 32 r 0 mrc_scrambler_seed
: 928 32 r 0 mrc_scrambler_seed_s3
> Given that native raminit is selected in Kconfig (MRC.bin boot path is not
We could see how much work it is to support MRC and native ram init. If it's not possible to support MRC at all, there should be a bigger code cleanup than just removing those values.
--
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Gerrit-Change-Id: I02f7af13d9c82d7f531d4b49b3bc0e5a20c14b55
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-HasComments: Yes
Hello Arthur Heymans, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19928
to look at the new patch set (#2).
Change subject: mb/lenovo/t430: Fix PCIe hot-plug ports
......................................................................
mb/lenovo/t430: Fix PCIe hot-plug ports
Port 0 is connected to SD-card reader.
Don't mark it as hot-plugable.
Change-Id: I5d3d4c7541683a6c09aac47ca251a6dad23ad1ab
Signed-off-by: Patrick Rudolph <siro(a)das-labor.org>
---
M src/mainboard/lenovo/t430/devicetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/19928/2
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Gerrit-Change-Id: I5d3d4c7541683a6c09aac47ca251a6dad23ad1ab
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
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Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/19764 )
Change subject: lib/edid: Split out fill_lb_framebuffer()
......................................................................
lib/edid: Split out fill_lb_framebuffer()
Place it into new edid_fill_fb.c, and invert the logic of the Kconfig
guard (NATIVE_VGA_INIT_USE_EDID is now !NO_EDID_FILL_FB). It has to be
selected by all drivers that use MAINBOARD_DO_NATIVE_VGA_INIT but pro-
vide their own fill_lb_framebuffer() implementation.
Change-Id: I90634b835bd8e2d150b1c714328a5b2774d891bd
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
Reviewed-on: https://review.coreboot.org/19764
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Reviewed-by: Julius Werner <jwerner(a)chromium.org>
---
M src/Kconfig
M src/device/Kconfig
M src/drivers/xgi/common/Kconfig
M src/drivers/xgi/z9s/z9s.c
M src/include/edid.h
A src/lib/Kconfig
M src/lib/Makefile.inc
M src/lib/edid.c
A src/lib/edid_fill_fb.c
9 files changed, 109 insertions(+), 78 deletions(-)
Approvals:
Aaron Durbin: Looks good to me, approved
Julius Werner: Looks good to me, but someone else must approve
build bot (Jenkins): Verified
diff --git a/src/Kconfig b/src/Kconfig
index 4091a61..50a054a 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -1043,6 +1043,9 @@
###############################################################################
# Set variables with no prompt - these can be set anywhere, and putting at
# the end of this file gives the most flexibility.
+
+source "src/lib/Kconfig"
+
config ENABLE_APIC_EXT_ID
bool
default n
diff --git a/src/device/Kconfig b/src/device/Kconfig
index 3dfc507..778ab88 100644
--- a/src/device/Kconfig
+++ b/src/device/Kconfig
@@ -21,13 +21,6 @@
bool
default n
-# FIXME Ugly hack to allow Z9s driver native framebuffer configuration
-config NATIVE_VGA_INIT_USE_EDID
- bool
- depends on MAINBOARD_DO_NATIVE_VGA_INIT
- default n if DRIVERS_XGI_Z9S || MAINBOARD_USE_LIBGFXINIT
- default y if !DRIVERS_XGI_Z9S
-
config MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
bool
default n
@@ -57,6 +50,7 @@
select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
select RAMSTAGE_LIBHWBASE
select VGA if !FRAMEBUFFER_KEEP_VESA_MODE
+ select NO_EDID_FILL_FB
default n
help
Use the SPARK library `libgfxinit` for the native graphics
diff --git a/src/drivers/xgi/common/Kconfig b/src/drivers/xgi/common/Kconfig
index a0b6fed..203a123 100644
--- a/src/drivers/xgi/common/Kconfig
+++ b/src/drivers/xgi/common/Kconfig
@@ -1,3 +1,4 @@
config DRIVERS_XGI_Z79_COMMON
bool
select VGA
+ select NO_EDID_FILL_FB
diff --git a/src/drivers/xgi/z9s/z9s.c b/src/drivers/xgi/z9s/z9s.c
index 8c1c97c..86808fc 100644
--- a/src/drivers/xgi/z9s/z9s.c
+++ b/src/drivers/xgi/z9s/z9s.c
@@ -16,7 +16,6 @@
#include <stdlib.h>
#include <string.h>
#include <arch/io.h>
-#include <edid.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/include/edid.h b/src/include/edid.h
index 1eb8c4d..d567115 100644
--- a/src/include/edid.h
+++ b/src/include/edid.h
@@ -16,6 +16,8 @@
#ifndef EDID_H
#define EDID_H
+#include <stdint.h>
+
enum edid_modes {
EDID_MODE_640x480_60Hz,
EDID_MODE_720x480_60Hz,
diff --git a/src/lib/Kconfig b/src/lib/Kconfig
new file mode 100644
index 0000000..6d5f034
--- /dev/null
+++ b/src/lib/Kconfig
@@ -0,0 +1,7 @@
+config NO_EDID_FILL_FB
+ bool
+ default y if !MAINBOARD_DO_NATIVE_VGA_INIT
+ help
+ Don't include default fill_lb_framebuffer() implementation. Select
+ this if your drivers uses MAINBOARD_DO_NATIVE_VGA_INIT but provides
+ its own fill_lb_framebuffer() implementation.
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 55f5960..c4d4f6a 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -131,6 +131,9 @@
ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
ramstage-$(CONFIG_COVERAGE) += libgcov.c
ramstage-y += edid.c
+ifneq ($(CONFIG_NO_EDID_FILL_FB),y)
+ramstage-y += edid_fill_fb.c
+endif
ramstage-y += memrange.c
ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c
ramstage-$(CONFIG_TIMER_QUEUE) += timer_queue.c
diff --git a/src/lib/edid.c b/src/lib/edid.c
index 2216690..7ad4136 100644
--- a/src/lib/edid.c
+++ b/src/lib/edid.c
@@ -94,9 +94,6 @@
static struct edid tmp_edid;
-static int vbe_valid;
-static struct lb_framebuffer edid_fb;
-
static char *manufacturer_name(unsigned char *x)
{
extra_info.manuf_name[0] = ((x[0] & 0x7C) >> 2) + '@';
@@ -1693,70 +1690,3 @@
edid->x_resolution = edid->bytes_per_line / (fb_bpp / 8);
edid->y_resolution = edid->mode.va;
}
-
-/*
- * Take an edid, and create a framebuffer. Set vbe_valid to 1.
- */
-
-void set_vbe_mode_info_valid(const struct edid *edid, uintptr_t fb_addr)
-{
- edid_fb.physical_address = fb_addr;
- edid_fb.x_resolution = edid->x_resolution;
- edid_fb.y_resolution = edid->y_resolution;
- edid_fb.bytes_per_line = edid->bytes_per_line;
- /* In the case of (e.g.) 24 framebuffer bits per pixel, the convention
- * nowadays seems to be to round it up to the nearest reasonable
- * boundary, because otherwise the byte-packing is hideous.
- * So, for example, in RGB with no alpha, the bytes are still
- * packed into 32-bit words, the so-called 32bpp-no-alpha mode.
- * Or, in 5:6:5 mode, the bytes are also packed into 32-bit words,
- * and in 4:4:4 mode, they are packed into 16-bit words.
- * Good call on the hardware guys part.
- * It's not clear we're covering all cases here, but
- * I'm not sure with grahpics you ever can.
- */
- edid_fb.bits_per_pixel = edid->framebuffer_bits_per_pixel;
- edid_fb.reserved_mask_pos = 0;
- edid_fb.reserved_mask_size = 0;
- switch (edid->framebuffer_bits_per_pixel) {
- case 32:
- case 24:
- /* packed into 4-byte words */
- edid_fb.reserved_mask_pos = 24;
- edid_fb.reserved_mask_size = 8;
- edid_fb.red_mask_pos = 16;
- edid_fb.red_mask_size = 8;
- edid_fb.green_mask_pos = 8;
- edid_fb.green_mask_size = 8;
- edid_fb.blue_mask_pos = 0;
- edid_fb.blue_mask_size = 8;
- break;
- case 16:
- /* packed into 2-byte words */
- edid_fb.red_mask_pos = 11;
- edid_fb.red_mask_size = 5;
- edid_fb.green_mask_pos = 5;
- edid_fb.green_mask_size = 6;
- edid_fb.blue_mask_pos = 0;
- edid_fb.blue_mask_size = 5;
- break;
- default:
- printk(BIOS_SPEW, "%s: unsupported BPP %d\n", __func__,
- edid->framebuffer_bits_per_pixel);
- return;
- }
-
- vbe_valid = 1;
-}
-
-#if IS_ENABLED(CONFIG_NATIVE_VGA_INIT_USE_EDID)
-int fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
-{
- if (!vbe_valid)
- return -1;
-
- *framebuffer = edid_fb;
-
- return 0;
-}
-#endif
diff --git a/src/lib/edid_fill_fb.c b/src/lib/edid_fill_fb.c
new file mode 100644
index 0000000..210c727
--- /dev/null
+++ b/src/lib/edid_fill_fb.c
@@ -0,0 +1,92 @@
+/*
+ * Copyright 2013 Google Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <console/console.h>
+#include <edid.h>
+#include <boot/coreboot_tables.h>
+
+static int fb_valid;
+static struct lb_framebuffer edid_fb;
+
+/*
+ * Take an edid, and create a framebuffer. Set fb_valid to 1.
+ */
+void set_vbe_mode_info_valid(const struct edid *edid, uintptr_t fb_addr)
+{
+ edid_fb.physical_address = fb_addr;
+ edid_fb.x_resolution = edid->x_resolution;
+ edid_fb.y_resolution = edid->y_resolution;
+ edid_fb.bytes_per_line = edid->bytes_per_line;
+ /* In the case of (e.g.) 24 framebuffer bits per pixel, the convention
+ * nowadays seems to be to round it up to the nearest reasonable
+ * boundary, because otherwise the byte-packing is hideous.
+ * So, for example, in RGB with no alpha, the bytes are still
+ * packed into 32-bit words, the so-called 32bpp-no-alpha mode.
+ * Or, in 5:6:5 mode, the bytes are also packed into 32-bit words,
+ * and in 4:4:4 mode, they are packed into 16-bit words.
+ * Good call on the hardware guys part.
+ * It's not clear we're covering all cases here, but
+ * I'm not sure with grahpics you ever can.
+ */
+ edid_fb.bits_per_pixel = edid->framebuffer_bits_per_pixel;
+ edid_fb.reserved_mask_pos = 0;
+ edid_fb.reserved_mask_size = 0;
+ switch (edid->framebuffer_bits_per_pixel) {
+ case 32:
+ case 24:
+ /* packed into 4-byte words */
+ edid_fb.reserved_mask_pos = 24;
+ edid_fb.reserved_mask_size = 8;
+ edid_fb.red_mask_pos = 16;
+ edid_fb.red_mask_size = 8;
+ edid_fb.green_mask_pos = 8;
+ edid_fb.green_mask_size = 8;
+ edid_fb.blue_mask_pos = 0;
+ edid_fb.blue_mask_size = 8;
+ break;
+ case 16:
+ /* packed into 2-byte words */
+ edid_fb.red_mask_pos = 11;
+ edid_fb.red_mask_size = 5;
+ edid_fb.green_mask_pos = 5;
+ edid_fb.green_mask_size = 6;
+ edid_fb.blue_mask_pos = 0;
+ edid_fb.blue_mask_size = 5;
+ break;
+ default:
+ printk(BIOS_SPEW, "%s: unsupported BPP %d\n", __func__,
+ edid->framebuffer_bits_per_pixel);
+ return;
+ }
+
+ fb_valid = 1;
+}
+
+int fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
+{
+ if (!fb_valid)
+ return -1;
+
+ *framebuffer = edid_fb;
+
+ return 0;
+}
--
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Youness Alaoui has posted comments on this change. ( https://review.coreboot.org/19849 )
Change subject: console/flashsconsole: Add spi flash console for debugging
......................................................................
Patch Set 10:
(2 comments)
> I'd leave it as is. Issues that you brought up can be fixed as
> needed. I think with Furquan's SPI changes a lot of the flash part
> drivers are fixed to not use globals. That just leaves the spi
> flash controller drivers. It looks like the 'flashes' variable in
> spi_flash.c should be const, but I doubt that's what you are
> hitting.
Ok, I'll leave it as is.
The issue I got previously were indeed all the global vars in the spi drivers which got fixed by Furquan's changes. But compiling for broadwell still fails because of a lack of timer_monotonic_get, and when I add monotonic_timer.c to the Makefile for romstage, it complains about mono_count global variable, which I remove and replace the timer_monotonic_get code in broadwell with the implementation in skylake (which doesn't need a global var), then I get issues with the spi_ctrlr_bus_map and spi_ctrlr_bus_map_count in spi-generic.c. After I removed those and commented out the spi_setup_slave, it worked, no more issues. I didn't test it though.
I'm still baffled as to why I only get the global vars warning (and missing timer_monotonic_get) in romstage but not in bootblock.
https://review.coreboot.org/#/c/19849/10/Makefile.inc
File Makefile.inc:
PS10, Line 819: ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
: FMAP_CONSOLE_BASE := $(call int-add, $(FMAP_FMAP_BASE) $(FMAP_FMAP_SIZE))
: FMAP_CONSOLE_SIZE := $(CONFIG_CONSOLE_SPI_FLASH_BUFFER_SIZE)
: FMAP_CONSOLE_ENTRY := CONSOLE@$(FMAP_CONSOLE_BASE) $(FMAP_CONSOLE_SIZE)
: else # ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
: FMAP_CONSOLE_ENTRY :=
: FMAP_CONSOLE_BASE := 0
: FMAP_CONSOLE_SIZE := 0
: endif # ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
> It seems to me that this sequence could be used for both branches of the co
I've made both conditions the same. I don't understand what you meant about it being a pain because of :=
https://review.coreboot.org/#/c/19849/10/src/drivers/spi/flashconsole.c
File src/drivers/spi/flashconsole.c:
PS10, Line 19: #include <cbfs.h>
> no longer needed
Done
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Hello Aaron Durbin, Philippe Mathieu-Daudé, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19849
to look at the new patch set (#11).
Change subject: console/flashsconsole: Add spi flash console for debugging
......................................................................
console/flashsconsole: Add spi flash console for debugging
If CONSOLE_SPI_FLASH config is enabled, we write the cbmem
messages to the 'CONSOLE' area in FMAP which allows us to grab the
log when we read the flash.
This is useful when you don't have usb debugging, and
UART lines are hard to find. Since a failure to boot would
require a hardware flasher anyways, we can get the log
at the same time.
This feature should only be used when no alternative is
found and only when we can't boot the system, because
excessive writes to the flash is not recommended.
This has been tested on purism/librem13 v2 and librem 15 v3 which
run Intel Skylake hardware. It has not been tested on other archs
or with a driver other than the fast_spi.
Change-Id: I74a297b94f6881d8c27cbe5168f161d8331c3df3
Signed-off-by: Youness Alaoui <youness.alaoui(a)puri.sm>
---
M Makefile.inc
M src/console/Kconfig
M src/console/console.c
M src/drivers/spi/Makefile.inc
A src/drivers/spi/flashconsole.c
A src/include/console/flash.h
M util/cbfstool/default-x86.fmd
M util/cbfstool/default.fmd
8 files changed, 256 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/19849/11
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Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/19960 )
Change subject: nb/sandybridge:add CBMEM_MEMINFO table when initing RAM
......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/19960/2/src/northbridge/intel/sandybridge/r…
File src/northbridge/intel/sandybridge/raminit_mrc.c:
Line 308: ddr_frequency = (MCHBAR32(0x5e04) * 13333 * 2 + 50)/100;
While the same calculation is used on native raminit it is wrong, as of Change-Id: I780d34ded2c1e3737ae1af685c8c2da832842e7c the ref clock can be 100Mhz, resulting in different DDR frequencies.
That has to be addresses in a separate patch.
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