coreboot-gerrit May 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: util/cbmem: mmap underflow on low addresses
by build bot (Jenkins) (Code Review) 13 May '17

13 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19679 ) Change subject: util/cbmem: mmap underflow on low addresses ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9378/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/53586/ : SUCCESS -- To view, visit https://review.coreboot.org/19679 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I32b0c15b2f1aa43fc57656d5d2d5f0e4e90e94ef Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: mainboard/google/reef: Config needed GPIO for pull-up WA
by build bot (Jenkins) (Code Review) 13 May '17

13 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19577 ) Change subject: mainboard/google/reef: Config needed GPIO for pull-up WA ...................................................................... Patch Set 9: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9377/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/53585/ : SUCCESS -- To view, visit https://review.coreboot.org/19577 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Id82035d8e1fff9fbb8dd3b4125460cdf61a58488 Gerrit-PatchSet: 9 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)intel.com> Gerrit-Reviewer: Freddy Paul <freddy.paul(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: util/intelmetool: Add bootguard information dump support
by Patrick Rudolph (Code Review) 13 May '17

13 May '17

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/16328 ) Change subject: util/intelmetool: Add bootguard information dump support ...................................................................... Patch Set 20: (5 comments) https://review.coreboot.org/#/c/16328/20/util/intelmetool/intelmetool.c File util/intelmetool/intelmetool.c: Line 307: if(msr_bootguard(&bootguard, debug) < 0) { coding style: space and following https://review.coreboot.org/#/c/16328/20/util/intelmetool/msr.c File util/intelmetool/msr.c: Line 27: static int fd_msr = 0; pass fd as argument or open the file in rdmsr, no need to make it static. you are not using it again, and you are closing the fd in rdmsr Line 40: if (read(fd_msr, buf, 8) == 8) { read(fd_msr, &msr, 8) == 8 Line 62: int msr_bootguard(uint64_t *msr, int debug) { coding style: { to next line Line 75: if(!debug) { coding style: space -- To view, visit https://review.coreboot.org/16328 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ifeec8e20fa8efc35d7db4c6a84be1f118dccfc4a Gerrit-PatchSet: 20 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mathias Krause <minipli(a)googlemail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in coreboot[master]: soc/intel/apollolake: Add macro to define IOSTERM for GPIO c...
by build bot (Jenkins) (Code Review) 13 May '17

13 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19576 ) Change subject: soc/intel/apollolake: Add macro to define IOSTERM for GPIO config ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9376/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/53584/ : SUCCESS -- To view, visit https://review.coreboot.org/19576 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I178f6d3055d4620cb3c895245c40f324383873ad Gerrit-PatchSet: 4 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)intel.com> Gerrit-Reviewer: Freddy Paul <freddy.paul(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: qemu/vexpress-a9: Discover RAM size.
by Vladimir Serbinenko (Code Review) 12 May '17

12 May '17

Vladimir Serbinenko has submitted this change and it was merged. ( https://review.coreboot.org/13754 ) Change subject: qemu/vexpress-a9: Discover RAM size. ...................................................................... qemu/vexpress-a9: Discover RAM size. Probe RAM to find its size instead of hardcoding 1024M. Also properly export it to memory map. Change-Id: Ib411f0a068bd247a9e0cd0a59689a3896921483e Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: https://review.coreboot.org/13754 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/emulation/qemu-armv7/Kconfig M src/mainboard/emulation/qemu-armv7/cbmem.c A src/mainboard/emulation/qemu-armv7/mainboard.c A src/mainboard/emulation/qemu-armv7/mainboard.h 4 files changed, 108 insertions(+), 5 deletions(-) Approvals: Arthur Heymans: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/emulation/qemu-armv7/Kconfig b/src/mainboard/emulation/qemu-armv7/Kconfig index f7c4b2d..76bdb32 100644 --- a/src/mainboard/emulation/qemu-armv7/Kconfig +++ b/src/mainboard/emulation/qemu-armv7/Kconfig @@ -49,8 +49,4 @@ string default "ARM Ltd." -config DRAM_SIZE_MB - int - default 1024 - endif # BOARD_EMULATION_QEMU_ARMV7 diff --git a/src/mainboard/emulation/qemu-armv7/cbmem.c b/src/mainboard/emulation/qemu-armv7/cbmem.c index a626ec6..f26ca6c 100644 --- a/src/mainboard/emulation/qemu-armv7/cbmem.c +++ b/src/mainboard/emulation/qemu-armv7/cbmem.c @@ -14,8 +14,52 @@ #include <stddef.h> #include <cbmem.h> #include <symbols.h> +#include <arch/io.h> +#include "mainboard.h" + +#define PATTERN1 0x55 +#define PATTERN2 0xaa + +/* Returns 1 if mebibyte mb is present and 0 otherwise. */ +static int probe_mb(int mb) +{ + char *ptr = (char *) 0x60000000 + (mb << 20) + 0xfffff; + char old; + if (ptr < (char *) &_eprogram) { + /* Don't probe below _end to avoid accidentally clobering + oneself. */ + return 1; + } + + old = read8(ptr); + write8(ptr, PATTERN1); + if (read8(ptr) != PATTERN1) + return 0; + write8(ptr, PATTERN2); + if (read8(ptr) != PATTERN2) + return 0; + write8(ptr, old); + return 1; +} + +int probe_ramsize(void) +{ + int i; + int discovered = 0; + static int saved_result; + if (saved_result) + return saved_result; + /* Compact binary search. */ + /* 1 GiB is the largest supported RAM by this machine. */ + for (i = 9; i >= 0; i--) + if (probe_mb(discovered | (1 << i))) + discovered |= (1 << i); + discovered++; + saved_result = discovered; + return discovered; +} void *cbmem_top(void) { - return _dram + (CONFIG_DRAM_SIZE_MB << 20); + return _dram + (probe_ramsize() << 20); } diff --git a/src/mainboard/emulation/qemu-armv7/mainboard.c b/src/mainboard/emulation/qemu-armv7/mainboard.c new file mode 100644 index 0000000..eced9ae --- /dev/null +++ b/src/mainboard/emulation/qemu-armv7/mainboard.c @@ -0,0 +1,40 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Vladimir Serbinenko <phcoder(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 or, at your option, any later + * version of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <device/device.h> +#include <cbmem.h> +#include <string.h> +#include <halt.h> +#include "mainboard.h" + +static void mainboard_enable(device_t dev) +{ + int discovered; + if (!dev) { + printk(BIOS_EMERG, "No dev0; die\n"); + halt(); + } + + discovered = probe_ramsize(); + printk(BIOS_DEBUG, "%d MiB of RAM discovered\n", discovered); + ram_resource(dev, 0, 0x60000000 >> 10, discovered << 10); + cbmem_recovery(0); +} + +struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/emulation/qemu-armv7/mainboard.h b/src/mainboard/emulation/qemu-armv7/mainboard.h new file mode 100644 index 0000000..87fa3be --- /dev/null +++ b/src/mainboard/emulation/qemu-armv7/mainboard.h @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Vladimir Serbinenko <phcoder(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 or, at your option, any later + * version of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef QEMU_ARMV7_MAINBOARD_H +#define QEMU_ARMV7_MAINBOARD_H + +/* Returns RAM size in mebibytes. */ +int probe_ramsize(void); + +#endif -- To view, visit https://review.coreboot.org/13754 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: merged Gerrit-Change-Id: Ib411f0a068bd247a9e0cd0a59689a3896921483e Gerrit-PatchSet: 7 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Vladimir Serbinenko <phcoder(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: Vladimir Serbinenko <phcoder(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: qemu/vexpress-a9: Discover RAM size.
by Arthur Heymans (Code Review) 12 May '17

12 May '17

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/13754 ) Change subject: qemu/vexpress-a9: Discover RAM size. ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/13754 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ib411f0a068bd247a9e0cd0a59689a3896921483e Gerrit-PatchSet: 6 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Vladimir Serbinenko <phcoder(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: Vladimir Serbinenko <phcoder(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: commonlib: Move drivers/storage into commonlib/storage
by Patrick Georgi (Code Review) 12 May '17

12 May '17

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/19672 ) Change subject: commonlib: Move drivers/storage into commonlib/storage ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/19672 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I4339e4378491db9a0da1f2dc34e1906a5ba31ad6 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: drivers/storage: Delay after SD SWITCH operations
by Patrick Georgi (Code Review) 12 May '17

12 May '17

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/19671 ) Change subject: drivers/storage: Delay after SD SWITCH operations ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/19671 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I938e227a142e43ed6afda80d56af90df0bae1b05 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: qemu/vexpress-a9: Discover RAM size.
by build bot (Jenkins) (Code Review) 12 May '17

12 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/13754 ) Change subject: qemu/vexpress-a9: Discover RAM size. ...................................................................... Patch Set 6: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9375/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/53583/ : SUCCESS -- To view, visit https://review.coreboot.org/13754 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ib411f0a068bd247a9e0cd0a59689a3896921483e Gerrit-PatchSet: 6 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Vladimir Serbinenko <phcoder(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: Vladimir Serbinenko <phcoder(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: arch/arm64: Use variables of the right size for msr/mrs opcodes
by Patrick Georgi (Code Review) 12 May '17

12 May '17

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/19661 ) Change subject: arch/arm64: Use variables of the right size for msr/mrs opcodes ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/19661/1/src/arch/arm64/armv8/lib/clock.c File src/arch/arm64/armv8/lib/clock.c: PS1, Line 24: uint32_t > Clang appears to be right, why not use use(uint64_t freq)? it seems cleaner it's merely a difference in interpretation: gcc does implicit casts in asm input/output specifications, clang does not. As for using uint64_t, that would be wrong: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0488d/ch09s0… specifies cntfrq_el0 to be 32 bit wide. -- To view, visit https://review.coreboot.org/19661 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I9c8b9fe3a1adc521e393c2e2a0216f7f425a2a3e Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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coreboot-gerrit May 2017