coreboot-gerrit May 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/amd/stoneyridge: Add northbridge support
by Marshall Dawson (Code Review) 18 May '17

18 May '17

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/19724 ) Change subject: soc/amd/stoneyridge: Add northbridge support ...................................................................... Patch Set 2: (2 comments) Same complaint as "CPU files" patch regarding BiosCallOuts.h. https://review.coreboot.org/#/c/19724/2/src/soc/amd/common/agesawrapper.c File src/soc/amd/common/agesawrapper.c: PS2, Line 23: #include <northbridge/amd/pi/agesawrapper.h> : #include <northbridge/amd/pi/BiosCallOuts.h> Missed these two. #include <agesawrapper.h> #include <soc/amd/common/BiosCallOuts.h> https://review.coreboot.org/#/c/19724/2/src/soc/amd/stoneyridge/dimmSpd.c File src/soc/amd/stoneyridge/dimmSpd.c: PS2, Line 21: #include "Porting.h" : #include "AGESA.h" : #include "amdlib.h" : #include "chip.h" : #include "northbridge/amd/pi/dimmSpd.h" #include <Porting.h> #include <AGESA.h> #include <amdlib.h> #include <dimmSpd.h> #include "chip.h" -- To view, visit https://review.coreboot.org/19724 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ie86b4d744900f23502068517ece5bcea6c128993 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in coreboot[master]: soc/amd/stoneyridge: Add CPU files
by Marc Jones (Code Review) 18 May '17

18 May '17

Marc Jones has posted comments on this change. ( https://review.coreboot.org/19723 ) Change subject: soc/amd/stoneyridge: Add CPU files ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/19723/2/src/soc/amd/common/heapmanager.c File src/soc/amd/common/heapmanager.c: PS2, Line 15: #include "AGESA.h" : #include "amdlib.h" : #include <northbridge/amd/pi/BiosCallOuts.h> : #include "heapManager.h" > #include <AGESA.h> yea, I found a few places that the paths didn't get updated. I know I cleaned this before. Seems I lost a patch that had this. -- To view, visit https://review.coreboot.org/19723 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I8b6b1991372c2c6a02709777a73615a86e78ac26 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in coreboot[master]: soc/amd/stoneyridge: Add CPU files
by Marshall Dawson (Code Review) 18 May '17

18 May '17

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/19723 ) Change subject: soc/amd/stoneyridge: Add CPU files ...................................................................... Patch Set 2: (1 comment) Other files could probably benefit from the same include file cleanup, but this one's pointing at the wrong BiosCallOuts.h. Also, it would be nice to shorten that, i.e. remove the pathname, but mainboard directory is getting -I included first and it also contains a BiosCallOuts.h. https://review.coreboot.org/#/c/19723/2/src/soc/amd/common/heapmanager.c File src/soc/amd/common/heapmanager.c: PS2, Line 15: #include "AGESA.h" : #include "amdlib.h" : #include <northbridge/amd/pi/BiosCallOuts.h> : #include "heapManager.h" #include <AGESA.h> #include <amdlib.h> #include <soc/amd/common/BiosCallOuts.h> #include <heapManager.h> Also, we've talked about my preference for putting AMD stuff after other includes (the ones below). -- To view, visit https://review.coreboot.org/19723 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I8b6b1991372c2c6a02709777a73615a86e78ac26 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in coreboot[master]: soc: Add AMD StoneyRidge southbridge code
by Marshall Dawson (Code Review) 18 May '17

18 May '17

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/19722 ) Change subject: soc: Add AMD StoneyRidge southbridge code ...................................................................... Patch Set 2: (1 comment) Other files could likely benefit from similar include file cleanup, but we'd missed the path for dimmSpd.h. https://review.coreboot.org/#/c/19722/2/src/soc/amd/stoneyridge/smbus_spd.c File src/soc/amd/stoneyridge/smbus_spd.c: PS2, Line 20: #include "Porting.h" : #include "AGESA.h" : #include "amdlib.h" : : #include <northbridge/amd/pi/dimmSpd.h> #include <Porting.h> #include <AGESA.h> #include <amdlib.h> #include <dimmSpd.h> maybe remove blank line -- To view, visit https://review.coreboot.org/19722 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ib88a868e654ad127be70ecc506f6b90b784f8d1b Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in coreboot[master]: WIP lib/edid.c: Give it its own Kconfig
by build bot (Jenkins) (Code Review) 18 May '17

18 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19764 ) Change subject: WIP lib/edid.c: Give it its own Kconfig ...................................................................... Patch Set 2: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/53952/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/9689/ : SUCCESS -- To view, visit https://review.coreboot.org/19764 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I90634b835bd8e2d150b1c714328a5b2774d891bd Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: mainboard/intel/glkrvp: Add support for GLKRVP
by Martin Roth (Code Review) 18 May '17

18 May '17

Martin Roth has posted comments on this change. ( https://review.coreboot.org/19604 ) Change subject: mainboard/intel/glkrvp: Add support for GLKRVP ...................................................................... Patch Set 26: (7 comments) https://review.coreboot.org/#/c/19604/26/src/mainboard/intel/glkrvp/Kconfig File src/mainboard/intel/glkrvp/Kconfig: PS26, Line 23: help : This option allows you to select the on board EC to use. : Select whether the board has Intel EC or Chrome EC Indent the lines after the 'help' keyword by two additional spaces. This will fix the lint errors. help This option allows you to select the on board EC to use. Select whether the board has Intel EC or Chrome EC PS26, Line 27: change tab to space PS26, Line 28: bool "Chrome EC" : select EC_GOOGLE_CHROMEEC : select EC_GOOGLE_CHROMEEC_LPC outdent by one tab PS26, Line 32: config GLK_INTEL_EC : bool "Intel EC" : select EC_ACPI same as above comments. https://review.coreboot.org/#/c/19604/26/src/mainboard/intel/glkrvp/acpi_ta… File src/mainboard/intel/glkrvp/acpi_tables.c: PS26, Line 1: /* : * This program is free software; you can redistribute it and/or modify : * it under the terms of the GNU General Public License as published by : * the Free Software Foundation; version 2 of the License. : * : * This program is distributed in the hope that it will be useful, : * but WITHOUT ANY WARRANTY; without even the implied warranty of : * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the : * GNU General Public License for more details. : */ Please remove the license from the empty file. https://review.coreboot.org/#/c/19604/26/src/mainboard/intel/glkrvp/bootblo… File src/mainboard/intel/glkrvp/bootblock.c: PS26, Line 22: void mainboard_ec_init(void); Why does this need to be here? Should it go into variant/ec.h instead? https://review.coreboot.org/#/c/19604/26/src/mainboard/intel/glkrvp/dsdt.asl File src/mainboard/intel/glkrvp/dsdt.asl: PS26, Line 51: #if 0 : /* LID and Power button. */ : Scope (\_SB) : { : Device (LID0) : { : Name (_HID, EisaId ("PNP0C0D")) : Method (_LID, 0) : { : Return (\_SB.PCI0.LPCB.EC0.LIDS) : } : Name (_PRW, Package () { GPE_EC_WAKE, 0x3 }) : } : Device (PWRB) : { : Name (_HID, EisaId ("PNP0C0C")) : } : } : /* Chrome OS Embedded Controller */ : Scope (\_SB.PCI0.LPCB) : { : /* ACPI code for EC SuperIO functions */ : #include <ec/google/chromeec/acpi/superio.asl> : /* ACPI code for EC functions */ : #include <ec/google/chromeec/acpi/ec.asl> : } : : /* Dynamic Platform Thermal Framework */ : Scope (\_SB) : { : /* Per board variant specific definitions. */ : #include <variant/acpi/dptf.asl> : /* Include soc specific DPTF changes */ : #include <soc/intel/apollolake/acpi/dptf.asl> : /* Include common dptf ASL files */ : #include <soc/intel/common/acpi/dptf/dptf.asl> : } : #endif remove? -- To view, visit https://review.coreboot.org/19604 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Iab688aca6a4f5c5e32801215ba3a1a440e50fbef Gerrit-PatchSet: 26 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Brenton Dong <brenton.m.dong(a)intel.com> Gerrit-Reviewer: Cole Nelson <colex.nelson(a)intel.com> Gerrit-Reviewer: Han Lim Ng <nhlhanlim93(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in coreboot[master]: drivers/spi/spi_flash: Clean up SPI flash probe
by Julius Werner (Code Review) 18 May '17

18 May '17

Julius Werner has posted comments on this change. ( https://review.coreboot.org/19708 ) Change subject: drivers/spi/spi_flash: Clean up SPI flash probe ...................................................................... Patch Set 14: Code-Review+2 -- To view, visit https://review.coreboot.org/19708 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I35f3bd8ddc5e71515df3ef0c1c4b1a68ee56bf4b Gerrit-PatchSet: 14 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/x4x: Use a struct for dll settings instead of an array
by build bot (Jenkins) (Code Review) 18 May '17

18 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19767 ) Change subject: nb/intel/x4x: Use a struct for dll settings instead of an array ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9687/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/53950/ : SUCCESS -- To view, visit https://review.coreboot.org/19767 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I28377d2d15d0e6a0d12545b837d6369e0dc26b92 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/x4x: Use a struct for dll settings instead of an array
by Arthur Heymans (Code Review) 18 May '17

18 May '17

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/19767 ) Change subject: nb/intel/x4x: Use a struct for dll settings instead of an array ...................................................................... Patch Set 1: I have some WIP patches that calibrate DQ/DQS DLL settings where this makes a lot more sense. -- To view, visit https://review.coreboot.org/19767 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I28377d2d15d0e6a0d12545b837d6369e0dc26b92 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-HasComments: No

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Change in coreboot[master]: detachables: Add invert parameter
by build bot (Jenkins) (Code Review) 18 May '17

18 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19698 ) Change subject: detachables: Add invert parameter ...................................................................... Patch Set 7: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9688/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/53951/ : SUCCESS -- To view, visit https://review.coreboot.org/19698 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ide6893a26f19eb2490377d4d53366ad145a9e6e3 Gerrit-PatchSet: 7 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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coreboot-gerrit May 2017