Hello Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19604
to look at the new patch set (#28).
Change subject: mainboard/intel/glkrvp: Add support for GLKRVP
......................................................................
mainboard/intel/glkrvp: Add support for GLKRVP
using SOC_INTEL_GLK
Signed-off-by: Hannah Williams <hannah.williams(a)intel.com>
Change-Id: Iab688aca6a4f5c5e32801215ba3a1a440e50fbef
---
A src/mainboard/intel/glkrvp/Kconfig
A src/mainboard/intel/glkrvp/Kconfig.name
A src/mainboard/intel/glkrvp/Makefile.inc
A src/mainboard/intel/glkrvp/acpi_tables.c
A src/mainboard/intel/glkrvp/board_info.txt
A src/mainboard/intel/glkrvp/boardid.c
A src/mainboard/intel/glkrvp/bootblock.c
A src/mainboard/intel/glkrvp/chromeos.c
A src/mainboard/intel/glkrvp/chromeos.fmd
A src/mainboard/intel/glkrvp/dsdt.asl
A src/mainboard/intel/glkrvp/ec.c
A src/mainboard/intel/glkrvp/mainboard.c
A src/mainboard/intel/glkrvp/romstage.c
A src/mainboard/intel/glkrvp/smihandler.c
A src/mainboard/intel/glkrvp/touchpad.asl
A src/mainboard/intel/glkrvp/variants/baseboard/Makefile.inc
A src/mainboard/intel/glkrvp/variants/baseboard/boardid.c
A src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
A src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
A src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/acpi/dptf.asl
A src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/ec.h
A src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/gpio.h
A src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h
A src/mainboard/intel/glkrvp/variants/baseboard/memory.c
A src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c
A src/mainboard/intel/glkrvp/variants/glkrvp/include/variant/acpi/dptf.asl
A src/mainboard/intel/glkrvp/variants/glkrvp/include/variant/ec.h
A src/mainboard/intel/glkrvp/variants/glkrvp/include/variant/gpio.h
28 files changed, 1,878 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/19604/28
--
To view, visit https://review.coreboot.org/19604
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Iab688aca6a4f5c5e32801215ba3a1a440e50fbef
Gerrit-PatchSet: 28
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Hannah Williams <hannah.williams(a)intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org>
Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com>
Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com>
Gerrit-Reviewer: Brenton Dong <brenton.m.dong(a)intel.com>
Gerrit-Reviewer: Cole Nelson <colex.nelson(a)intel.com>
Gerrit-Reviewer: Han Lim Ng <nhlhanlim93(a)gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com>
Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Cole Nelson has uploaded a new change for review. ( https://review.coreboot.org/19768 )
Change subject: soc/intel/apollolake: configure RAPL PL1 for GLK
......................................................................
soc/intel/apollolake: configure RAPL PL1 for GLK
Tested on GLK w/kernel 4.11.0 by reading MSR 0x610 at runtime.
Change-Id: Ic4753585c4feea53367fe5a69de25f1f677bbdd4
Signed-off-by: Cole Nelson <colex.nelson(a)intel.com>
---
M src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
1 file changed, 2 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/19768/1
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
index 86bb055..e881a09 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
@@ -52,10 +52,8 @@
# Enable DPTF
register "dptf_enable" = "1"
- # PL1 override 12000 mW: the energy calculation is wrong with the
- # current VR solution. Experiments show that SoC TDP max (6W) can
- # be reached when RAPL PL1 is set to 12W.
- register "tdp_pl1_override_mw" = "12000"
+ # PL1 override
+ register "tdp_pl1_override_mw" = "7500"
# Set RAPL PL2 to 15W.
register "tdp_pl2_override_mw" = "15000"
--
To view, visit https://review.coreboot.org/19768
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic4753585c4feea53367fe5a69de25f1f677bbdd4
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Cole Nelson <colex.nelson(a)intel.com>
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/19431 )
Change subject: rockchip/rk3399: soc: resize reserve memory
......................................................................
rockchip/rk3399: soc: resize reserve memory
Reserve the whole TZRAM area because it will be marked as secure-only
by BL31 and can not be accessed by the non-secure kernel.
CQ-DEPEND=CL:452659
BUG=chrome-os-partner:57361
BRANCH=firmware-gru-8785.B
TEST=the reserve memory is resized
Change-Id: Ie3ab39598f3f7cb96feb0c574e230e7fcb53a1a4
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: f34d254e1dfc9ae95a784aba22503e75a2fa65f1
Original-Change-Id: I39c4cb530f41a7b0f7f3064125072dd85b62276f
Original-Signed-off-by: Xing Zheng <zhengxing(a)rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/418102
Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org>
Original-(cherry picked from commit ea9fe064a9b1e1ce81fca74f829a0fb6e78ce426)
Original-Reviewed-on: https://chromium-review.googlesource.com/452640
Original-Tested-by: Julius Werner <jwerner(a)chromium.org>
Original-Commit-Queue: Julius Werner <jwerner(a)chromium.org>
Reviewed-on: https://review.coreboot.org/19431
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Julius Werner <jwerner(a)chromium.org>
---
M src/soc/rockchip/rk3399/soc.c
1 file changed, 5 insertions(+), 3 deletions(-)
Approvals:
Julius Werner: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/soc/rockchip/rk3399/soc.c b/src/soc/rockchip/rk3399/soc.c
index 4418a27..37de652 100644
--- a/src/soc/rockchip/rk3399/soc.c
+++ b/src/soc/rockchip/rk3399/soc.c
@@ -25,6 +25,7 @@
#include <stdlib.h>
#include <string.h>
#include <symbols.h>
+#include <arm-trusted-firmware/plat/rockchip/rk3399/include/shared/bl31_param.h>
static void soc_read_resources(device_t dev)
{
@@ -33,10 +34,11 @@
static void soc_init(device_t dev)
{
- /* reserve bl31 image, which define in
- * arm-trusted-firmware/plat/rockchip/rk3399/include/platform_def.h
+ /*
+ * Reserve the whole TZRAM area because it will be marked as secure-only
+ * by BL31 and can not be accessed by the non-secure kernel.
*/
- mmio_resource(dev, 1, (0x10000 / KiB), (0x80000 / KiB));
+ mmio_resource(dev, 1, (TZRAM_BASE / KiB), (TZRAM_SIZE / KiB));
if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) && display_init_required())
rk_display_init(dev);
--
To view, visit https://review.coreboot.org/19431
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: merged
Gerrit-Change-Id: Ie3ab39598f3f7cb96feb0c574e230e7fcb53a1a4
Gerrit-PatchSet: 4
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/18954 )
Change subject: 3rdparty/arm-trusted-firmware: Update to upstream master
......................................................................
3rdparty/arm-trusted-firmware: Update to upstream master
Submodule 3rdparty/arm-trusted-firmware 236c27d21f..3944adca59
This brings in 241 new commits from the upstream arm-trusted-firmware
repository, merged to the upstream tree between December 30, 2016 and
March 18, 2017.
3944adca Merge pull request #861 from soby-mathew/sm/aarch32_fixes
..
e0f083a0 fiptool: Prepare ground for expanding the set of images at
runtime
Also setup ATF builds so that unused functions don't break the build.
They're harmless and they don't filter for these like we do.
Change-Id: Ibf5bede79126bcbb62243808a2624d9517015920
Signed-off-by: Martin Roth <martinroth(a)google.com>
Reviewed-on: https://review.coreboot.org/18954
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Julius Werner <jwerner(a)chromium.org>
---
M 3rdparty/arm-trusted-firmware
M src/arch/arm64/Makefile.inc
2 files changed, 2 insertions(+), 2 deletions(-)
Approvals:
Julius Werner: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/3rdparty/arm-trusted-firmware b/3rdparty/arm-trusted-firmware
index 236c27d..3944adc 160000
--- a/3rdparty/arm-trusted-firmware
+++ b/3rdparty/arm-trusted-firmware
@@ -1 +1 @@
-Subproject commit 236c27d21f52ad8f0a998e54774e3d8a4b59129d
+Subproject commit 3944adca5943a050ca7e7e9cc802a9ae04dec186
diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc
index ad3941b..92b26f5 100644
--- a/src/arch/arm64/Makefile.inc
+++ b/src/arch/arm64/Makefile.inc
@@ -166,7 +166,7 @@
# multi line string.
BL31_MAKEARGS += BUILD_MESSAGE_TIMESTAMP='"$(shell grep "\#define COREBOOT_BUILD\>" $(obj)/build.h |cut -d\" -f2 \# \")"'
-BL31_CFLAGS := -fno-pic -fno-stack-protector -Wno-deprecated-declarations
+BL31_CFLAGS := -fno-pic -fno-stack-protector -Wno-deprecated-declarations -Wno-unused-function
BL31_LDFLAGS := --emit-relocs
BL31 := $(obj)/bl31.elf
--
To view, visit https://review.coreboot.org/18954
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: merged
Gerrit-Change-Id: Ibf5bede79126bcbb62243808a2624d9517015920
Gerrit-PatchSet: 4
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>