coreboot-gerrit May 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: drivers/spi/spi_flash: Use boot_device_spi_flash to obtain s...
by build bot (Jenkins) (Code Review) 18 May '17

18 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19703 ) Change subject: drivers/spi/spi_flash: Use boot_device_spi_flash to obtain spi_flash structure ...................................................................... Patch Set 8: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9698/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/53961/ : SUCCESS -- To view, visit https://review.coreboot.org/19703 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Idd50b7644d1a4be8b62d38cc9239feae2215103c Gerrit-PatchSet: 8 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: drivers/spi/spi_flash_internal: Remove unused spi_fram_probe...
by build bot (Jenkins) (Code Review) 18 May '17

18 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19706 ) Change subject: drivers/spi/spi_flash_internal: Remove unused spi_fram_probe_ramtron ...................................................................... Patch Set 9: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9700/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/53963/ : SUCCESS -- To view, visit https://review.coreboot.org/19706 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I05e6c5c2b97d6c8a726c0e443ad855f9bcb703f9 Gerrit-PatchSet: 9 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: drivers/spi/cbfs_spi: Provide implementation of boot_device_...
by build bot (Jenkins) (Code Review) 18 May '17

18 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19726 ) Change subject: drivers/spi/cbfs_spi: Provide implementation of boot_device_spi_flash ...................................................................... Patch Set 6: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9696/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/53959/ : SUCCESS -- To view, visit https://review.coreboot.org/19726 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I1c07327115e0449cbd84d163218da76a6fa2cea0 Gerrit-PatchSet: 6 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: drivers/spi/spi-generic: Make spi_setup_slave strong symbol
by Furquan Shaikh (Code Review) 18 May '17

18 May '17

Furquan Shaikh has uploaded a new change for review. ( https://review.coreboot.org/19781 ) Change subject: drivers/spi/spi-generic: Make spi_setup_slave strong symbol ...................................................................... drivers/spi/spi-generic: Make spi_setup_slave strong symbol Now that all platforms are updated to provide spi bus map, there is no need to keep the spi_setup_slave as a weak symbol. BUG=b:38430839 Change-Id: I59b9bbb5303dad7ce062958a0ab8dee49a4ec1e0 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- M src/drivers/spi/spi-generic.c 1 file changed, 1 insertion(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/19781/1 diff --git a/src/drivers/spi/spi-generic.c b/src/drivers/spi/spi-generic.c index 579ceb1..252f371 100644 --- a/src/drivers/spi/spi-generic.c +++ b/src/drivers/spi/spi-generic.c @@ -115,8 +115,7 @@ const struct spi_ctrlr_buses spi_ctrlr_bus_map[0] __attribute__((weak)); const size_t spi_ctrlr_bus_map_count __attribute__((weak)); -int __attribute__((weak)) spi_setup_slave(unsigned int bus, unsigned int cs, - struct spi_slave *slave) +int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) { size_t i; -- To view, visit https://review.coreboot.org/19781 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: I59b9bbb5303dad7ce062958a0ab8dee49a4ec1e0 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: southbridge/amd: Move spi driver to use spi_bus_map
by Furquan Shaikh (Code Review) 18 May '17

18 May '17

Furquan Shaikh has uploaded a new change for review. ( https://review.coreboot.org/19780 ) Change subject: southbridge/amd: Move spi driver to use spi_bus_map ...................................................................... southbridge/amd: Move spi driver to use spi_bus_map This is in preparation to get rid of the strong spi_setup_slave implemented by different platforms. BUG=b:38430839 Change-Id: I2a789cff40fb0e6bd6d84565531d847afb3f8bed Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- M src/southbridge/amd/agesa/hudson/spi.c M src/southbridge/amd/cimx/sb800/spi.c M src/southbridge/amd/sb700/spi.c 3 files changed, 27 insertions(+), 21 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/19780/1 diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c index 1afe3e0..71fddc6 100644 --- a/src/southbridge/amd/agesa/hudson/spi.c +++ b/src/southbridge/amd/agesa/hudson/spi.c @@ -167,10 +167,12 @@ .deduct_cmd_len = true, }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - slave->bus = bus; - slave->cs = cs; - slave->ctrlr = &spi_ctrlr; - return 0; -} +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 0, + .bus_end = 0, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c index a664925..f2d6214 100644 --- a/src/southbridge/amd/cimx/sb800/spi.c +++ b/src/southbridge/amd/cimx/sb800/spi.c @@ -158,10 +158,12 @@ .deduct_cmd_len = true, }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - slave->bus = bus; - slave->cs = cs; - slave->ctrlr = &spi_ctrlr; - return 0; -} +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 0, + .bus_end = 0, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); diff --git a/src/southbridge/amd/sb700/spi.c b/src/southbridge/amd/sb700/spi.c index 9731896..df44c04 100644 --- a/src/southbridge/amd/sb700/spi.c +++ b/src/southbridge/amd/sb700/spi.c @@ -120,10 +120,12 @@ .deduct_cmd_len = true, }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - slave->bus = bus; - slave->cs = cs; - slave->ctrlr = &spi_ctrlr; - return 0; -} +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 0, + .bus_end = 0, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); -- To view, visit https://review.coreboot.org/19780 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: I2a789cff40fb0e6bd6d84565531d847afb3f8bed Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: soc/intel: Move spi driver to use spi_bus_map
by Furquan Shaikh (Code Review) 18 May '17

18 May '17

Furquan Shaikh has uploaded a new change for review. ( https://review.coreboot.org/19778 ) Change subject: soc/intel: Move spi driver to use spi_bus_map ...................................................................... soc/intel: Move spi driver to use spi_bus_map This is in preparation to get rid of the strong spi_setup_slave implemented by different platforms. BUG=b:38430839 Change-Id: Id3f05a2ea6eb5e31ca607861973d96b507208115 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- M src/soc/intel/baytrail/spi.c M src/soc/intel/braswell/spi.c M src/soc/intel/broadwell/spi.c M src/soc/intel/fsp_baytrail/spi.c M src/soc/intel/fsp_broadwell_de/spi.c 5 files changed, 45 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/19778/1 diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c index 36b542f..6061116 100644 --- a/src/soc/intel/baytrail/spi.c +++ b/src/soc/intel/baytrail/spi.c @@ -612,10 +612,12 @@ .max_xfer_size = member_size(ich9_spi_regs, fdata), }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - slave->bus = bus; - slave->cs = cs; - slave->ctrlr = &spi_ctrlr; - return 0; -} +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 0, + .bus_end = 0, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c index 12bf7d5..4bdcdbf 100644 --- a/src/soc/intel/braswell/spi.c +++ b/src/soc/intel/braswell/spi.c @@ -596,10 +596,12 @@ .max_xfer_size = member_size(ich9_spi_regs, fdata), }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - slave->bus = bus; - slave->cs = cs; - slave->ctrlr = &spi_ctrlr; - return 0; -} +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 0, + .bus_end = 0, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c index 40969bc..a573e32 100644 --- a/src/soc/intel/broadwell/spi.c +++ b/src/soc/intel/broadwell/spi.c @@ -653,10 +653,12 @@ .max_xfer_size = member_size(ich9_spi_regs, fdata), }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - slave->bus = bus; - slave->cs = cs; - slave->ctrlr = &spi_ctrlr; - return 0; -} +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 0, + .bus_end = 0, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c index 236ff74..0a04b9b 100644 --- a/src/soc/intel/fsp_baytrail/spi.c +++ b/src/soc/intel/fsp_baytrail/spi.c @@ -593,10 +593,12 @@ .max_xfer_size = member_size(ich9_spi_regs, fdata), }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - slave->bus = bus; - slave->cs = cs; - slave->ctrlr = &spi_ctrlr; - return 0; -} +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 0, + .bus_end = 0, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); diff --git a/src/soc/intel/fsp_broadwell_de/spi.c b/src/soc/intel/fsp_broadwell_de/spi.c index 01cb281..b917142 100644 --- a/src/soc/intel/fsp_broadwell_de/spi.c +++ b/src/soc/intel/fsp_broadwell_de/spi.c @@ -609,10 +609,12 @@ .max_xfer_size = member_size(ich9_spi_regs, fdata), }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - slave->bus = bus; - slave->cs = cs; - slave->ctrlr = &spi_ctrlr; - return 0; -} +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 0, + .bus_end = 0, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); -- To view, visit https://review.coreboot.org/19778 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Id3f05a2ea6eb5e31ca607861973d96b507208115 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: southbridge/intel: Move spi driver to use spi_bus_map
by Furquan Shaikh (Code Review) 18 May '17

18 May '17

Furquan Shaikh has uploaded a new change for review. ( https://review.coreboot.org/19779 ) Change subject: southbridge/intel: Move spi driver to use spi_bus_map ...................................................................... southbridge/intel: Move spi driver to use spi_bus_map This is in preparation to get rid of the strong spi_setup_slave implemented by different platforms. BUG=b:38430839 Change-Id: I23c1108c85532b7346ff7e0adb0ac90dbf2bb2cc Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- M src/southbridge/intel/common/spi.c M src/southbridge/intel/fsp_rangeley/spi.c 2 files changed, 18 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/19779/1 diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index be9b128..13db224 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -941,10 +941,12 @@ .flash_probe = spi_flash_programmer_probe, }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - slave->bus = bus; - slave->cs = cs; - slave->ctrlr = &spi_ctrlr; - return 0; -} +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 0, + .bus_end = 0, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c index ee60f75..39d67c5 100644 --- a/src/southbridge/intel/fsp_rangeley/spi.c +++ b/src/southbridge/intel/fsp_rangeley/spi.c @@ -724,10 +724,12 @@ .max_xfer_size = member_size(ich10_spi_regs, fdata), }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - slave->bus = bus; - slave->cs = cs; - slave->ctrlr = &spi_ctrlr; - return 0; -} +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 0, + .bus_end = 0, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); -- To view, visit https://review.coreboot.org/19779 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: I23c1108c85532b7346ff7e0adb0ac90dbf2bb2cc Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: soc/qualcomm/ipq*: Move spi driver to use spi_bus_map
by Furquan Shaikh (Code Review) 18 May '17

18 May '17

Furquan Shaikh has uploaded a new change for review. ( https://review.coreboot.org/19776 ) Change subject: soc/qualcomm/ipq*: Move spi driver to use spi_bus_map ...................................................................... soc/qualcomm/ipq*: Move spi driver to use spi_bus_map This is in preparation to get rid of the strong spi_setup_slave implemented by different platforms. BUG=b:38430839 Change-Id: I6cc8c339e008e16449fa143c1d21e23534bdaf0b Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- M src/soc/qualcomm/ipq40xx/spi.c M src/soc/qualcomm/ipq806x/spi.c 2 files changed, 47 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/19776/1 diff --git a/src/soc/qualcomm/ipq40xx/spi.c b/src/soc/qualcomm/ipq40xx/spi.c index b5c1f66..157903c 100644 --- a/src/soc/qualcomm/ipq40xx/spi.c +++ b/src/soc/qualcomm/ipq40xx/spi.c @@ -647,18 +647,12 @@ return ret; } -static const struct spi_ctrlr spi_ctrlr = { - .claim_bus = spi_ctrlr_claim_bus, - .release_bus = spi_ctrlr_release_bus, - .xfer = spi_ctrlr_xfer, - .xfer_vector = spi_xfer_two_vectors, - .max_xfer_size = MAX_PACKET_COUNT, -}; - -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) +static int spi_ctrlr_setup(const struct spi_slave *slave) { struct ipq_spi_slave *ds = NULL; int i; + unsigned int bus = slave->bus; + unsigned int cs = slave->cs; if ((bus < BLSP0_SPI) || (bus > BLSP1_SPI) || ((bus == BLSP0_SPI) && (cs > 2)) @@ -674,9 +668,8 @@ continue; ds = spi_slave_pool + i; - ds->slave.bus = slave->bus = bus; - ds->slave.cs = slave->cs = cs; - slave->ctrlr = &spi_ctrlr; + ds->slave.bus = bus; + ds->slave.cs = cs; ds->regs = &spi_reg[bus]; /* @@ -694,3 +687,22 @@ printk(BIOS_ERR, "SPI error: all %d pools busy\n", i); return -1; } + +static const struct spi_ctrlr spi_ctrlr = { + .setup = spi_ctrlr_setup, + .claim_bus = spi_ctrlr_claim_bus, + .release_bus = spi_ctrlr_release_bus, + .xfer = spi_ctrlr_xfer, + .xfer_vector = spi_xfer_two_vectors, + .max_xfer_size = MAX_PACKET_COUNT, +}; + +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = BLSP0_SPI, + .bus_end = BLSP1_SPI, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); diff --git a/src/soc/qualcomm/ipq806x/spi.c b/src/soc/qualcomm/ipq806x/spi.c index 9a34f7a..c20ad9a 100644 --- a/src/soc/qualcomm/ipq806x/spi.c +++ b/src/soc/qualcomm/ipq806x/spi.c @@ -752,17 +752,12 @@ return ret; } -static const struct spi_ctrlr spi_ctrlr = { - .claim_bus = spi_ctrlr_claim_bus, - .release_bus = spi_ctrlr_release_bus, - .xfer = spi_ctrlr_xfer, - .max_xfer_size = MAX_PACKET_COUNT, -}; - -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) +static int spi_ctrlr_setup(const struct spi_slave *slave) { struct ipq_spi_slave *ds = NULL; int i; + unsigned int bus = slave->bus; + unsigned int cs = slave->cs; /* * IPQ GSBI (Generic Serial Bus Interface) supports SPI Flash @@ -782,9 +777,8 @@ continue; ds = spi_slave_pool + i; - ds->slave.bus = slave->bus = bus; - ds->slave.cs = slave->cs = cs; - slave->ctrlr = &spi_ctrlr; + ds->slave.bus = bus; + ds->slave.cs = cs; ds->regs = &spi_reg[bus]; /* @@ -802,3 +796,21 @@ printk(BIOS_ERR, "SPI error: all %d pools busy\n", i); return -1; } + +static const struct spi_ctrlr spi_ctrlr = { + .setup = spi_ctrlr_setup, + .claim_bus = spi_ctrlr_claim_bus, + .release_bus = spi_ctrlr_release_bus, + .xfer = spi_ctrlr_xfer, + .max_xfer_size = MAX_PACKET_COUNT, +}; + +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = GSBI5_SPI, + .bus_end = GSBI7_SPI, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); -- To view, visit https://review.coreboot.org/19776 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: I6cc8c339e008e16449fa143c1d21e23534bdaf0b Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: soc/samsung/exynos5420: Move spi driver to use spi_bus_map
by Furquan Shaikh (Code Review) 18 May '17

18 May '17

Furquan Shaikh has uploaded a new change for review. ( https://review.coreboot.org/19777 ) Change subject: soc/samsung/exynos5420: Move spi driver to use spi_bus_map ...................................................................... soc/samsung/exynos5420: Move spi driver to use spi_bus_map This is in preparation to get rid of the strong spi_setup_slave implemented by different platforms. BUG=b:38430839 Change-Id: Ic937cbf93b87f5e43f7d70140b47fa97bcd7757e Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- M src/soc/samsung/exynos5420/spi.c 1 file changed, 20 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/19777/1 diff --git a/src/soc/samsung/exynos5420/spi.c b/src/soc/samsung/exynos5420/spi.c index c2a5828..fa53c0f 100644 --- a/src/soc/samsung/exynos5420/spi.c +++ b/src/soc/samsung/exynos5420/spi.c @@ -208,21 +208,10 @@ setbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT); } -static const struct spi_ctrlr spi_ctrlr = { - .claim_bus = spi_ctrlr_claim_bus, - .release_bus = spi_ctrlr_release_bus, - .xfer = spi_ctrlr_xfer, - .max_xfer_size = SPI_CTRLR_DEFAULT_MAX_XFER_SIZE, -}; - -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) +static int spi_ctrlr_setup(const struct spi_slave *slave) { - ASSERT(bus >= 0 && bus < 3); + ASSERT(slave->bus >= 0 && slave->bus < 3); struct exynos_spi_slave *eslave; - - slave->bus = bus; - slave->cs = cs; - slave->ctrlr = &spi_ctrlr; eslave = to_exynos_spi(slave); if (!eslave->initialized) { @@ -232,6 +221,24 @@ return 0; } +static const struct spi_ctrlr spi_ctrlr = { + .setup = spi_ctrlr_setup, + .claim_bus = spi_ctrlr_claim_bus, + .release_bus = spi_ctrlr_release_bus, + .xfer = spi_ctrlr_xfer, + .max_xfer_size = SPI_CTRLR_DEFAULT_MAX_XFER_SIZE, +}; + +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 0, + .bus_end = 2, + }, +}; + +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); + static int exynos_spi_read(struct spi_slave *slave, void *dest, uint32_t len, uint32_t off) { -- To view, visit https://review.coreboot.org/19777 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Ic937cbf93b87f5e43f7d70140b47fa97bcd7757e Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: soc/marvell/bg4cd: Get rid of spi.c
by Furquan Shaikh (Code Review) 18 May '17

18 May '17

Furquan Shaikh has uploaded a new change for review. ( https://review.coreboot.org/19775 ) Change subject: soc/marvell/bg4cd: Get rid of spi.c ...................................................................... soc/marvell/bg4cd: Get rid of spi.c spi driver in marvell bg4cd is dummy. Get rid of this driver. BUG=b:38430839 Change-Id: I53f0782fc8bd75ec569b74e4b199df5af481443d Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- M src/soc/marvell/bg4cd/Makefile.inc D src/soc/marvell/bg4cd/spi.c 2 files changed, 0 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/19775/1 diff --git a/src/soc/marvell/bg4cd/Makefile.inc b/src/soc/marvell/bg4cd/Makefile.inc index 86aa764..2b5f940 100644 --- a/src/soc/marvell/bg4cd/Makefile.inc +++ b/src/soc/marvell/bg4cd/Makefile.inc @@ -21,23 +21,19 @@ bootblock-y += cbmem.c bootblock-y += i2c.c bootblock-y += monotonic_timer.c -bootblock-$(CONFIG_SPI_FLASH) += spi.c verstage-y += i2c.c verstage-y += monotonic_timer.c -verstage-$(CONFIG_SPI_FLASH) += spi.c romstage-y += romstage.S romstage-y += cbmem.c romstage-y += i2c.c romstage-y += monotonic_timer.c romstage-y += sdram.c -romstage-$(CONFIG_SPI_FLASH) += spi.c ramstage-y += cbmem.c ramstage-y += i2c.c ramstage-y += monotonic_timer.c -ramstage-$(CONFIG_SPI_FLASH) += spi.c CPPFLAGS_common += -Isrc/soc/marvell/bg4cd/include/ diff --git a/src/soc/marvell/bg4cd/spi.c b/src/soc/marvell/bg4cd/spi.c deleted file mode 100644 index 188a6bd..0000000 --- a/src/soc/marvell/bg4cd/spi.c +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is part of the coreboot project. - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <stddef.h> -#include <spi-generic.h> - -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - return -1; -} -- To view, visit https://review.coreboot.org/19775 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: I53f0782fc8bd75ec569b74e4b199df5af481443d Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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coreboot-gerrit May 2017