coreboot-gerrit April 2017

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Change in coreboot[master]: lib/edid.c: Return value differentiates absent and non-confo...
by Arthur Heymans (Code Review) 30 Apr '17

30 Apr '17

Arthur Heymans has uploaded a new change for review. ( https://review.coreboot.org/19502 ) Change subject: lib/edid.c: Return value differentiates absent and non-conformant ...................................................................... lib/edid.c: Return value differentiates absent and non-conformant Change-Id: Id90aa210ff72092c4ab638a7bafb82bd11889bdc Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/include/edid.h M src/lib/edid.c 2 files changed, 17 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/19502/1 diff --git a/src/include/edid.h b/src/include/edid.h index cf81258..100dbe9 100644 --- a/src/include/edid.h +++ b/src/include/edid.h @@ -91,6 +91,12 @@ int hdmi_monitor_detected; }; +enum edid_status { + EDID_CONFORMANT, + EDID_NOT_CONFORMANT, + EDID_ABSENT, +}; + /* Defined in src/lib/edid.c */ int decode_edid(unsigned char *edid, int size, struct edid *out); void edid_set_framebuffer_bits_per_pixel(struct edid *edid, int fb_bpp, diff --git a/src/lib/edid.c b/src/lib/edid.c index 58dd813..9de3a24 100644 --- a/src/lib/edid.c +++ b/src/lib/edid.c @@ -1134,7 +1134,7 @@ .has_valid_range_descriptor = 1, .has_valid_max_dotclock = 1, .has_valid_string_termination = 1, - .conformant = 1, + .conformant = EDID_CONFORMANT, }; dump_breakdown(edid); @@ -1143,7 +1143,7 @@ if (!edid || memcmp(edid, "\x00\xFF\xFF\xFF\xFF\xFF\xFF\x00", 8)) { printk(BIOS_SPEW, "No header found\n"); - return 1; + return EDID_ABSENT; } if (manufacturer_name(edid + 0x08)) @@ -1486,7 +1486,7 @@ !c.has_valid_string_termination || !c.has_valid_descriptor_pad || !c.has_preferred_timing) - c.conformant = 0; + c.conformant = EDID_NOT_CONFORMANT; if (!c.conformant) printk(BIOS_ERR, "EDID block does NOT conform to EDID 1.4!\n"); @@ -1507,7 +1507,7 @@ !c.has_valid_string_termination || !c.has_valid_descriptor_pad || !c.has_preferred_timing) { - c.conformant = 0; + c.conformant = EDID_NOT_CONFORMANT; } /** * According to E-EDID (EDIDv1.3), has_name_descriptor and @@ -1543,7 +1543,7 @@ } else if (c.claims_one_point_two) { if (c.nonconformant_digital_display || !c.has_valid_string_termination) - c.conformant = 0; + c.conformant = EDID_NOT_CONFORMANT; if (!c.conformant) printk(BIOS_ERR, "EDID block does NOT conform to EDID 1.2!\n"); @@ -1556,7 +1556,7 @@ "\tDetailed block string not properly terminated\n"); } else if (c.claims_one_point_oh) { if (c.seen_non_detailed_descriptor) - c.conformant = 0; + c.conformant = EDID_NOT_CONFORMANT; if (!c.conformant) printk(BIOS_ERR, "EDID block does NOT conform to EDID 1.0!\n"); @@ -1576,7 +1576,7 @@ !c.has_valid_descriptor_ordering || !c.has_valid_range_descriptor || !c.manufacturer_name_well_formed) { - c.conformant = 0; + c.conformant = EDID_CONFORMANT; printk(BIOS_ERR, "EDID block does not conform at all!\n"); if (c.nonconformant_extension) printk(BIOS_ERR, @@ -1618,7 +1618,10 @@ if (c.warning_zero_preferred_refresh) printk(BIOS_ERR, "Warning: CVT block does not set preferred refresh rate\n"); - return !c.conformant; + if (!c.conformant) + return EDID_NOT_CONFORMANT; + else + return EDID_CONFORMANT; } /* -- To view, visit https://review.coreboot.org/19502 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Id90aa210ff72092c4ab638a7bafb82bd11889bdc Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: nb/intel/gm45/gma.c: Decode EDID before NGI path
by Arthur Heymans (Code Review) 30 Apr '17

30 Apr '17

Arthur Heymans has uploaded a new change for review. ( https://review.coreboot.org/19503 ) Change subject: nb/intel/gm45/gma.c: Decode EDID before NGI path ...................................................................... nb/intel/gm45/gma.c: Decode EDID before NGI path This allows to use EDID data outside of NGI path without needing to fetch it twice. Change-Id: I6a540b1d036a9f38b44fd004309601630861f6e7 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/intel/gm45/gma.c 1 file changed, 53 insertions(+), 59 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/19503/1 diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index cbb8451..be0c077 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -50,12 +50,10 @@ } static void gma_init_lvds(const struct northbridge_intel_gm45_config *info, - u8 *mmio, u32 physbase, u16 piobase, u32 lfb) + u8 *mmio, u32 physbase, u16 piobase, u32 lfb, + struct edid *edid) { - int i; - u8 edid_data[128]; - struct edid edid; struct edid_mode *mode; u32 hactive, vactive, right_border, bottom_border; int hpolarity, vpolarity; @@ -93,17 +91,13 @@ for (i = 0; i <= 0x18; i++) vga_cr_write(i, cr[i]); - intel_gmbus_read_edid(mmio + GMBUS0, 3, 0x50, edid_data, - sizeof(edid_data)); - decode_edid(edid_data, - sizeof(edid_data), &edid); - mode = &edid.mode; - /* Disable screen memory to prevent garbage from appearing. */ vga_sr_write(1, vga_sr_read(1) | 0x20); - hactive = edid.x_resolution; - vactive = edid.y_resolution; + mode = &edid->mode; + + hactive = edid->x_resolution; + vactive = edid->y_resolution; right_border = mode->hborder; bottom_border = mode->vborder; hpolarity = (mode->phsync == '-'); @@ -131,11 +125,11 @@ vga_gr_write(0x10, 0x1); vga_gr_write(0x11, 0); - edid.bytes_per_line = (edid.bytes_per_line + 63) & ~63; + edid->bytes_per_line = (edid->bytes_per_line + 63) & ~63; write32(mmio + DSPCNTR(0), DISPPLANE_BGRX888); write32(mmio + DSPADDR(0), 0); - write32(mmio + DSPSTRIDE(0), edid.bytes_per_line); + write32(mmio + DSPSTRIDE(0), edid->bytes_per_line); write32(mmio + DSPSURF(0), 0); for (i = 0; i < 0x100; i++) write32(mmio + LGC_PALETTE(0) + 4 * i, i * 0x010101); @@ -315,18 +309,17 @@ if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { memset((void *) lfb, 0, - edid.x_resolution * edid.y_resolution * 4); - set_vbe_mode_info_valid(&edid, lfb); + edid->x_resolution * edid->y_resolution * 4); + set_vbe_mode_info_valid(edid, lfb); } } static void gma_init_vga(const struct northbridge_intel_gm45_config *info, - u8 *mmio, u32 physbase, u16 piobase, u32 lfb) + u8 *mmio, u32 physbase, u16 piobase, u32 lfb, + struct edid *edid) { int i; - u8 edid_data[128]; - struct edid edid; struct edid_mode *mode; u32 hactive, vactive, right_border, bottom_border; int hpolarity, vpolarity; @@ -378,19 +371,13 @@ udelay(1); - intel_gmbus_read_edid(mmio + GMBUS0, 2, 0x50, edid_data, - sizeof(edid_data)); - intel_gmbus_stop(mmio + GMBUS0); - decode_edid(edid_data, - sizeof(edid_data), &edid); - mode = &edid.mode; - - /* Disable screen memory to prevent garbage from appearing. */ vga_sr_write(1, vga_sr_read(1) | 0x20); - hactive = edid.x_resolution; - vactive = edid.y_resolution; + mode = &edid->mode; + + hactive = edid->x_resolution; + vactive = edid->y_resolution; right_border = mode->hborder; bottom_border = mode->vborder; hpolarity = (mode->phsync == '-'); @@ -419,12 +406,12 @@ vga_gr_write(0x10, 0x1); vga_gr_write(0x11, 0); - edid.bytes_per_line = (edid.bytes_per_line + 63) & ~63; + edid->bytes_per_line = (edid->bytes_per_line + 63) & ~63; write32(mmio + DSPCNTR(0), DISPLAY_PLANE_ENABLE | DISPPLANE_BGRX888); write32(mmio + DSPADDR(0), 0); - write32(mmio + DSPSTRIDE(0), edid.bytes_per_line); + write32(mmio + DSPSTRIDE(0), edid->bytes_per_line); write32(mmio + DSPSURF(0), 0); for (i = 0; i < 0x100; i++) write32(mmio + LGC_PALETTE(0) + 4 * i, i * 0x010101); @@ -584,30 +571,11 @@ if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { memset((void *) lfb, 0, - edid.x_resolution * edid.y_resolution * 4); - set_vbe_mode_info_valid(&edid, lfb); + edid->x_resolution * edid->y_resolution * 4); + set_vbe_mode_info_valid(edid, lfb); } -} - -/* compare the header of the vga edid header */ -/* if vga is not connected it should not have a correct header */ -static u8 vga_connected(u8 *mmio) -{ - u8 vga_edid[128]; - u8 header[8] = {0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00}; - intel_gmbus_read_edid(mmio + GMBUS0, 2, 0x50, vga_edid, - sizeof(vga_edid)); - intel_gmbus_stop(mmio + GMBUS0); - for (int i = 0; i < 8; i++) { - if (vga_edid[i] != header[i]) { - printk(BIOS_DEBUG, "VGA not connected. Using LVDS display\n"); - return 0; - } - } - printk(BIOS_SPEW, "VGA display connected\n"); - return 1; } static u32 get_cdclk(struct device *const dev) @@ -687,6 +655,10 @@ static void gma_func0_init(struct device *dev) { u32 reg32; + u8 *mmio; + u8 edid_data_vga[128], edid_data_lvds[128]; + struct edid edid_vga, edid_lvds; + int lvds_edid_status, vga_edid_status; /* IGD needs to be Bus Master */ reg32 = pci_read_config32(dev, PCI_COMMAND); @@ -695,13 +667,29 @@ /* Init graphics power management */ gtt_res = find_resource(dev, PCI_BASE_ADDRESS_0); + mmio = res2mmio(gtt_res, 0, 0); struct northbridge_intel_gm45_config *conf = dev->chip_info; if (!IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) { /* PCI Init, will run VBIOS */ + printk(BIOS_DEBUG, "Initialising IGD using VBIOS\n"); pci_dev_init(dev); } + + printk(BIOS_DEBUG, "LVDS EDID\n"); + intel_gmbus_read_edid(mmio + GMBUS0, 3, 0x50, edid_data_lvds, + sizeof(edid_data_lvds)); + intel_gmbus_stop(mmio + GMBUS0); + lvds_edid_status = decode_edid(edid_data_lvds, + sizeof(edid_data_lvds), &edid_lvds); + + printk(BIOS_DEBUG, "VGA EDID\n"); + intel_gmbus_read_edid(mmio + GMBUS0, 2, 0x50, edid_data_vga, + sizeof(edid_data_vga)); + intel_gmbus_stop(mmio + GMBUS0); + vga_edid_status = decode_edid(edid_data_vga, + sizeof(edid_data_vga), &edid_vga); /* Post VBIOS init */ gma_pm_init_post_vbios(dev); @@ -719,14 +707,20 @@ if (gtt_res && gtt_res->base && physbase && pio_res && pio_res->base && lfb_res && lfb_res->base) { printk(BIOS_SPEW, - "Initializing VGA without OPROM. MMIO 0x%llx\n", + "Initializing display without OPROM. MMIO 0x%llx\n", gtt_res->base); - if (vga_connected(res2mmio(gtt_res, 0, 0))) - gma_init_vga(conf, res2mmio(gtt_res, 0, 0), - physbase, pio_res->base, lfb_res->base); - else - gma_init_lvds(conf, res2mmio(gtt_res, 0, 0), - physbase, pio_res->base, lfb_res->base); + if (vga_edid_status != EDID_ABSENT) { + printk(BIOS_DEBUG, + "Initialising display on VGA output\n"); + gma_init_vga(conf, mmio, physbase, + pio_res->base, lfb_res->base, &edid_vga); + } else { + printk(BIOS_DEBUG, + "Initialising display on LVDS output\n"); + gma_init_lvds(conf, mmio, physbase, + pio_res->base, lfb_res->base, + &edid_lvds); + } } /* Linux relies on VBT for panel info. */ -- To view, visit https://review.coreboot.org/19503 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: I6a540b1d036a9f38b44fd004309601630861f6e7 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: lib/edid.c: Allow use of when not NGI
by Arthur Heymans (Code Review) 30 Apr '17

30 Apr '17

Arthur Heymans has uploaded a new change for review. ( https://review.coreboot.org/19501 ) Change subject: lib/edid.c: Allow use of when not NGI ...................................................................... lib/edid.c: Allow use of when not NGI Change-Id: I8709e3e61686979137b08d24efad903700d18e0b Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/device/Kconfig M src/lib/Makefile.inc 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/19501/1 diff --git a/src/device/Kconfig b/src/device/Kconfig index 83f0f9f..2cdd27b 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -24,8 +24,8 @@ # FIXME Ugly hack to allow Z9s driver native framebuffer configuration config NATIVE_VGA_INIT_USE_EDID bool - default n if DRIVERS_XGI_Z9S || MAINBOARD_USE_LIBGFXINIT default y if !DRIVERS_XGI_Z9S + default n if DRIVERS_XGI_Z9S || MAINBOARD_USE_LIBGFXINIT || !GFX_GMA config MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG bool diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 8f92b29..55f5960 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -130,7 +130,7 @@ ramstage-$(CONFIG_TRACE) += trace.c ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c ramstage-$(CONFIG_COVERAGE) += libgcov.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += edid.c +ramstage-y += edid.c ramstage-y += memrange.c ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c ramstage-$(CONFIG_TIMER_QUEUE) += timer_queue.c -- To view, visit https://review.coreboot.org/19501 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: I8709e3e61686979137b08d24efad903700d18e0b Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: nb/gm45/gma.c: Decode edid before doing native graphic init
by build bot (Jenkins) (Code Review) 30 Apr '17

30 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18179 ) Change subject: nb/gm45/gma.c: Decode edid before doing native graphic init ...................................................................... Patch Set 2: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/52974/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/8819/ : SUCCESS -- To view, visit https://review.coreboot.org/18179 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I062b42e282beb88bee46aa17934a01845b9b50bf Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ronald G. Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-Reviewer: ron minnich <rminnich(a)chromium.org> Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/gm45: Set display backlight according to EDID string
by build bot (Jenkins) (Code Review) 30 Apr '17

30 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19500 ) Change subject: nb/intel/gm45: Set display backlight according to EDID string ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/52973/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/8818/ : SUCCESS -- To view, visit https://review.coreboot.org/19500 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Id7bc0d453fac31e806852206ba2c895720b2c843 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: lib/edid: Save the display ASCII string
by build bot (Jenkins) (Code Review) 30 Apr '17

30 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19499 ) Change subject: lib/edid: Save the display ASCII string ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/52972/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/8817/ : SUCCESS -- To view, visit https://review.coreboot.org/19499 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ic31af53dcb9947e2264c809ee8f80ea4f89f347d Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/gm45: Set display backlight according to EDID string
by Arthur Heymans (Code Review) 30 Apr '17

30 Apr '17

Arthur Heymans has uploaded a new change for review. ( https://review.coreboot.org/19500 ) Change subject: nb/intel/gm45: Set display backlight according to EDID string ...................................................................... nb/intel/gm45: Set display backlight according to EDID string Add some known good values for some thinkpads displays. Known good means that at this pwm frequency the display is evenly lit on all duty cycles, the display makes minimal to no noise at lower duty cycles and the display does not flicker. This values differs from vendor (which uses an obviously wrong display clock (190MHz instead of 320MHz) resulting in frequency more than 60% off the intended value. Change-Id: Id7bc0d453fac31e806852206ba2c895720b2c843 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/drivers/intel/gma/edid.h M src/lib/edid.c M src/mainboard/lenovo/t400/Makefile.inc A src/mainboard/lenovo/t400/blc.c M src/mainboard/lenovo/x200/Makefile.inc A src/mainboard/lenovo/x200/blc.c M src/mainboard/roda/rk9/Makefile.inc A src/mainboard/roda/rk9/blc.c M src/northbridge/intel/gm45/gma.c 9 files changed, 142 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/19500/1 diff --git a/src/drivers/intel/gma/edid.h b/src/drivers/intel/gma/edid.h index d8214cf..ff5f40e 100644 --- a/src/drivers/intel/gma/edid.h +++ b/src/drivers/intel/gma/edid.h @@ -1,2 +1,9 @@ void intel_gmbus_read_edid(u8 *gmbus_mmio, u8 bus, u8 slave, u8 *edid, u32 edid_size); void intel_gmbus_stop(u8 *gmbus_mmio); +typedef struct { + char ascii_string[13]; + int pwm_freq; /* In Hz */ +} blc_pwm_t ; +int get_blc_values(blc_pwm_t **entries); + + diff --git a/src/lib/edid.c b/src/lib/edid.c index 43449d9..6dd928b 100644 --- a/src/lib/edid.c +++ b/src/lib/edid.c @@ -1481,7 +1481,6 @@ c.nonconformant_extension += parse_extension(out, &edid[i], &c); - printk(BIOS_DEBUG,"ASCII string: %s\n", out->ascii_string); if (c.claims_one_point_four) { if (c.nonconformant_digital_display || !c.has_valid_string_termination || diff --git a/src/mainboard/lenovo/t400/Makefile.inc b/src/mainboard/lenovo/t400/Makefile.inc index 3aa94b5..8ac61bb 100644 --- a/src/mainboard/lenovo/t400/Makefile.inc +++ b/src/mainboard/lenovo/t400/Makefile.inc @@ -18,3 +18,4 @@ ramstage-y += dock.c ramstage-y += cstates.c romstage-y += hybrid_graphics.c +ramstage-y += blc.c diff --git a/src/mainboard/lenovo/t400/blc.c b/src/mainboard/lenovo/t400/blc.c new file mode 100644 index 0000000..a270007 --- /dev/null +++ b/src/mainboard/lenovo/t400/blc.c @@ -0,0 +1,38 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 arthur(a)aheymans.xyz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <commonlib/helpers.h> +#include <drivers/intel/gma/edid.h> + +static blc_pwm_t blc_entries[] = { + /* Vendor bios seems intends to PWM freq set 220Hz */ + /* T400 */ + {"B141EW04 V7 ", 110}, + {"LP141WX3-TLR1", 110}, + {"LP141WX5-TLP2", 450}, + {"LTN141AT12401", 450}, + {"LTN141W1-L05", 110}, + {"LTN141WD-L05", 110}, + /* T500 */ + {"LP154W02-TL06", 110}, + {"LTN154P3-L02", 110}, +}; + +int get_blc_values(blc_pwm_t **entries) +{ + *entries = blc_entries; + return ARRAY_SIZE(blc_entries); +} diff --git a/src/mainboard/lenovo/x200/Makefile.inc b/src/mainboard/lenovo/x200/Makefile.inc index b382efb..c16aa6a 100644 --- a/src/mainboard/lenovo/x200/Makefile.inc +++ b/src/mainboard/lenovo/x200/Makefile.inc @@ -15,3 +15,4 @@ ramstage-y += dock.c ramstage-y += cstates.c +ramstage-y += blc.c \ No newline at end of file diff --git a/src/mainboard/lenovo/x200/blc.c b/src/mainboard/lenovo/x200/blc.c new file mode 100644 index 0000000..77bc383 --- /dev/null +++ b/src/mainboard/lenovo/x200/blc.c @@ -0,0 +1,40 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 arthur(a)aheymans.xyz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <commonlib/helpers.h> +#include <drivers/intel/gma/edid.h> + +static blc_pwm_t blc_entries[] = { + {"LTD121EWVB", 165}, + {"B121EW03 V6 ", 165}, + {"B121EW09 V3 ", 450}, + {"HV121WX4-120", 110}, /* Aftermarket AFFS lcd, works well at low pwm */ + {"LTN121AT03001", 110}, + {"LTN121AP03001", 750}, + /* TODO: from thinkwiki, untested, generally CCFL run best at lower PWM */ + /* {"B121EW09 V2 ", 450}, */ + /* {"N121IB-L05", 450}, */ + /* {"LP121WX3-TLC1" 450}, */ + /* {"LP121WX3-TLA1" 450}, */ + /* {"B121EW03 V3 " 110}, */ + /* {"LTN121AP02001" 110}, */ +}; + +int get_blc_values(blc_pwm_t **entries) +{ + *entries = blc_entries; + return ARRAY_SIZE(blc_entries); +} diff --git a/src/mainboard/roda/rk9/Makefile.inc b/src/mainboard/roda/rk9/Makefile.inc index 5a16ed8..f92382e 100644 --- a/src/mainboard/roda/rk9/Makefile.inc +++ b/src/mainboard/roda/rk9/Makefile.inc @@ -15,3 +15,4 @@ ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += ti_pci7xx1.c ramstage-y += cstates.c +ramstage-y += blc.c diff --git a/src/mainboard/roda/rk9/blc.c b/src/mainboard/roda/rk9/blc.c new file mode 100644 index 0000000..63bf632 --- /dev/null +++ b/src/mainboard/roda/rk9/blc.c @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 arthur(a)aheymans.xyz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <commonlib/helpers.h> +#include <drivers/intel/gma/edid.h> + +static blc_pwm_t blc_entries[] = { }; + +int get_blc_values(blc_pwm_t **entries) +{ + *entries = blc_entries; + return ARRAY_SIZE(blc_entries); +} diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index be0c077..e24fa51 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -609,12 +609,17 @@ return (blc_mod << 16) | blc_mod; } -static void gma_pm_init_post_vbios(struct device *const dev) +static void gma_pm_init_post_vbios(struct device *const dev, + const char *ascii_sting) { const struct northbridge_intel_gm45_config *const conf = dev->chip_info; u32 reg32; u8 reg8; + blc_pwm_t *blc_pwm; + int blc_array_len, i; + u16 pwm_freq = 0; + u8 found_edid = 0; /* Setup Panel Power On Delays */ reg32 = gtt_read(PP_ON_DELAYS); @@ -645,11 +650,29 @@ reg8 = 100; if (conf->duty_cycle != 0) reg8 = conf->duty_cycle; - if (conf->pwm_freq == 0) + blc_array_len = get_blc_values(&blc_pwm); + if (conf->pwm_freq != 0) + pwm_freq = conf->pwm_freq; + + /* Find EDID string and pwm freq in lookup table */ + for (i = 0; i < blc_array_len; i++) { + if (!strncmp(blc_pwm[i].ascii_string, ascii_sting, + strlen(blc_pwm[i].ascii_string))) { + pwm_freq = blc_pwm[i].pwm_freq; + printk(BIOS_DEBUG, "Found EDID string: %s in lookup table, pwm: %dHz\n", + blc_pwm[i].ascii_string ,pwm_freq); + found_edid = 1; + break; + } + } + if (!found_edid) + printk(BIOS_DEBUG, "EDID string not found in lookup table, please report.\n"); + + if (pwm_freq == 0) gtt_write(BLC_PWM_CTL, 0x06100610); else - gtt_write(BLC_PWM_CTL, freq_to_blc_pwm_ctl(dev, - conf->pwm_freq, reg8)); + gtt_write(BLC_PWM_CTL, freq_to_blc_pwm_ctl(dev, pwm_freq, + reg8)); } static void gma_func0_init(struct device *dev) @@ -692,7 +715,7 @@ sizeof(edid_data_vga), &edid_vga); /* Post VBIOS init */ - gma_pm_init_post_vbios(dev); + gma_pm_init_post_vbios(dev, edid_lvds.ascii_string); if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) { u32 physbase; -- To view, visit https://review.coreboot.org/19500 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Id7bc0d453fac31e806852206ba2c895720b2c843 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: lib/edid: Save the display ASCII string
by Arthur Heymans (Code Review) 30 Apr '17

30 Apr '17

Arthur Heymans has uploaded a new change for review. ( https://review.coreboot.org/19499 ) Change subject: lib/edid: Save the display ASCII string ...................................................................... lib/edid: Save the display ASCII string Change-Id: Ic31af53dcb9947e2264c809ee8f80ea4f89f347d Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/include/edid.h M src/lib/edid.c 2 files changed, 5 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/19499/1 diff --git a/src/include/edid.h b/src/include/edid.h index 100dbe9..834f5f2 100644 --- a/src/include/edid.h +++ b/src/include/edid.h @@ -89,6 +89,7 @@ u32 bytes_per_line; int hdmi_monitor_detected; + char ascii_string[13]; }; enum edid_status { diff --git a/src/lib/edid.c b/src/lib/edid.c index 9de3a24..43449d9 100644 --- a/src/lib/edid.c +++ b/src/lib/edid.c @@ -470,9 +470,9 @@ * slots, seems to be specified by SPWG: * http://www.spwg.org/ */ - printk(BIOS_SPEW, "ASCII string: %s\n", - extract_string(x + 5, - &c->has_valid_string_termination, 13)); + memcpy(result_edid->ascii_string, extract_string(x + 5, + &c->has_valid_string_termination, 13), 13); + printk(BIOS_SPEW, "ASCII string: %s\n", result_edid->ascii_string); return 1; case 0xFF: printk(BIOS_SPEW, "Serial number: %s\n", @@ -1481,6 +1481,7 @@ c.nonconformant_extension += parse_extension(out, &edid[i], &c); + printk(BIOS_DEBUG,"ASCII string: %s\n", out->ascii_string); if (c.claims_one_point_four) { if (c.nonconformant_digital_display || !c.has_valid_string_termination || -- To view, visit https://review.coreboot.org/19499 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Ic31af53dcb9947e2264c809ee8f80ea4f89f347d Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: nb/gm45/gma.c: Decode edid before doing native graphic init
by Arthur Heymans (Code Review) 30 Apr '17

30 Apr '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/18179 to look at the new patch set (#2). Change subject: nb/gm45/gma.c: Decode edid before doing native graphic init ...................................................................... nb/gm45/gma.c: Decode edid before doing native graphic init This allows the EDID data to be used outside of the native graphic init path without having to fetch it again. This extends return values of decode_edid to make the distinction between invalid EDID and 'not connected' EDID. TESTED on Lenovo X200 Change-Id: I062b42e282beb88bee46aa17934a01845b9b50bf Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/include/edid.h M src/lib/Makefile.inc M src/lib/edid.c M src/northbridge/intel/gm45/gma.c 4 files changed, 71 insertions(+), 68 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/18179/2 -- To view, visit https://review.coreboot.org/18179 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I062b42e282beb88bee46aa17934a01845b9b50bf Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ronald G. Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-Reviewer: ron minnich <rminnich(a)chromium.org>

1 0

Change in coreboot[master]: acpi: fix FADT header version for ChromeOS devices
by build bot (Jenkins) (Code Review) 30 Apr '17

30 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19498 ) Change subject: acpi: fix FADT header version for ChromeOS devices ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/52971/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/8816/ : SUCCESS -- To view, visit https://review.coreboot.org/19498 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I689d2f848f4b8e5750742ea07f31162ee36ff64d Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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