Hello Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/18241
to look at the new patch set (#15).
Change subject: [WIP] mainboards/hp: Add HP Elitebook 2760p
......................................................................
[WIP] mainboards/hp: Add HP Elitebook 2760p
The code is generated by autoport.
The flash chip is socketed beside the WLAN slot. The EHCI debug port
is on right side of the laptop beside the RJ11 connector.
Things that work:
- memory: 0+8G, 4G+8G
- Linux (Linux Mint 18.1 with Linux 4.4)
- native graphics init + SeaBIOS payload with SeaVGABIOS
- all 3 USB ports
- WLAN
- WWAN
- expresscard
- S3 suspend and resume
- internal flashing after IFD is unlocked and coreboot is flashed
- keyboard, trackpoint and touchpad
- fan control
Things that don't work:
- AC and battery status
- wacom digitizer
Things that are not tested:
- WWAN
- SD card reader
- smart card reader
- cable modem
(EC) blobs:
This laptop uses SMSC KBC1126-NU as EC. It needs two blobs in the
flash chip. You can use the tools in util/kbc1126 to extract them
from OEM firmware, and use the following configuration to insert
them to coreboot image:
-> Chipset
-> Add firmware images for KBC1126 firmware
Change-Id: I3ffdb9f9c71f6c9a84e896abc3c424c8dd4bed0e
Signed-off-by: Iru Cai <mytbk920423(a)gmail.com>
---
A src/mainboard/hp/2760p/Kconfig
A src/mainboard/hp/2760p/Kconfig.name
A src/mainboard/hp/2760p/Makefile.inc
A src/mainboard/hp/2760p/acpi/ec.asl
A src/mainboard/hp/2760p/acpi/platform.asl
A src/mainboard/hp/2760p/acpi/superio.asl
A src/mainboard/hp/2760p/acpi_tables.c
A src/mainboard/hp/2760p/board_info.txt
A src/mainboard/hp/2760p/devicetree.cb
A src/mainboard/hp/2760p/dsdt.asl
A src/mainboard/hp/2760p/gpio.c
A src/mainboard/hp/2760p/hda_verb.c
A src/mainboard/hp/2760p/mainboard.c
A src/mainboard/hp/2760p/romstage.c
14 files changed, 738 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/18241/15
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I3ffdb9f9c71f6c9a84e896abc3c424c8dd4bed0e
Gerrit-PatchSet: 15
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Iru Cai <mytbk920423(a)gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
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Gerrit-Reviewer: build bot (Jenkins)
Martin Roth has posted comments on this change. ( https://review.coreboot.org/19024 )
Change subject: AGESA: Move EmptyHeap() call
......................................................................
Patch Set 2: Code-Review+2
The argument makes sense. I'm assuming this has been tested.
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Gerrit-Change-Id: I3a5d497d0e25ec291f722e9f089bc8928238c3f9
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/19033 )
Change subject: util/abuild: Save checksums of build files
......................................................................
Patch Set 4:
Yay, the experimental grammar checker just helped me find a doubled space and a misspelling:
2.) Line 3, column 7, Rule ID: WHITESPACE_RULE
Message: Possible typo: you repeated a whitespace
Suggestion:
...me for the checksums to be saved into. - Save checkums of each
platform into the specified ...
^^
3.) Line 3, column 9, Rule ID: MORFOLOGIK_RULE_EN_US
Message: Possible spelling mistake found
Suggestion: checkups
... for the checksums to be saved into. - Save checkums of each
platform into the specified file app...
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Gerrit-Change-Id: Id24dc4b10afbd35cdb8750f75b934419e6e80290
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Hello Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19033
to look at the new patch set (#4).
Change subject: util/abuild: Save checksums of build files
......................................................................
util/abuild: Save checksums of build files
- Add --checksum command line parameter to specify a base path and
filename for the checksums to be saved into.
- Save checksums of each platform into the specified file appended
with "_platform"
- Save a sha256 checksum of the sorted config.h into the base file
appended with "_config"
Change-Id: Id24dc4b10afbd35cdb8750f75b934419e6e80290
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
---
M util/abuild/abuild
1 file changed, 11 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/19033/4
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Gerrit-Change-Id: Id24dc4b10afbd35cdb8750f75b934419e6e80290
Gerrit-PatchSet: 4
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/19054 )
Change subject: Documentation: Describe libgfxinit hook-up
......................................................................
Patch Set 2:
(3 comments)
Maybe say something about building the Ada compiler? Should we enable it by default in the makefile target for crossgcc-i386?
https://review.coreboot.org/#/c/19054/2/Documentation/gfx/libgfxinit.md
File Documentation/gfx/libgfxinit.md:
PS2, Line 13: Core i
This looks awkward - maybe "Intel Core i3/i5/i7 processor line"
PS2, Line 57:
This indentation causes a code block with just the rest of this line in it.
https://daringfireball.net/projects/markdown/syntax#precode
PS2, Line 59: failed `0`. Currently, only the case that no display
: could be found counts as failure. A failure at a la-
: ter stage (e.g. failure to train a DP) is not propa-
: gated.
same - indentation causes a code block containing the rest of this text.
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