coreboot-gerrit March 2017

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Change in coreboot[master]: HOLD 3rdparty/blobs: Update for AMD Stoney Ridge
by Martin Roth (Code Review) 26 Mar '17

26 Mar '17

Martin Roth has posted comments on this change. ( https://review.coreboot.org/18988 ) Change subject: HOLD 3rdparty/blobs: Update for AMD Stoney Ridge ...................................................................... Patch Set 2: This will have to be re-pushed because of the license update patch. -- To view, visit https://review.coreboot.org/18988 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I1c9b5ded6b494fac1553cc2ec7756a7a47386ecf Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: ec: Use EC_ENABLE_LID_SWITCH for all mainboards with LID usi...
by Martin Roth (Code Review) 26 Mar '17

26 Mar '17

Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/18964 ) Change subject: ec: Use EC_ENABLE_LID_SWITCH for all mainboards with LID using chromeec ...................................................................... ec: Use EC_ENABLE_LID_SWITCH for all mainboards with LID using chromeec Instead of defining a separate LID device for mainboards using chromeec, define EC_ENABLE_LID_SWITCH for these boards. Change-Id: Iac58847c2055fa27c19d02b2dbda6813d6dec3ec Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> Reviewed-on: https://review.coreboot.org/18964 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> --- M src/ec/google/chromeec/acpi/ec.asl M src/mainboard/google/auron/acpi/ec.asl M src/mainboard/google/auron/acpi/mainboard.asl M src/mainboard/google/chell/acpi/ec.asl M src/mainboard/google/chell/acpi/mainboard.asl M src/mainboard/google/cyan/acpi/ec.asl M src/mainboard/google/cyan/acpi/mainboard.asl M src/mainboard/google/glados/acpi/ec.asl M src/mainboard/google/glados/acpi/mainboard.asl M src/mainboard/google/lars/acpi/ec.asl M src/mainboard/google/lars/acpi/mainboard.asl M src/mainboard/google/link/acpi/ec.asl M src/mainboard/google/link/acpi/mainboard.asl M src/mainboard/google/link/acpi/platform.asl M src/mainboard/google/rambi/acpi/ec.asl M src/mainboard/google/rambi/acpi/mainboard.asl M src/mainboard/google/slippy/acpi/ec.asl M src/mainboard/google/slippy/acpi/mainboard.asl M src/mainboard/google/slippy/acpi/platform.asl M src/mainboard/intel/kblrvp/acpi/ec.asl M src/mainboard/intel/kblrvp/acpi/mainboard.asl M src/mainboard/intel/kunimitsu/acpi/ec.asl M src/mainboard/intel/kunimitsu/acpi/mainboard.asl M src/mainboard/intel/strago/acpi/ec.asl M src/mainboard/intel/strago/acpi/mainboard.asl 25 files changed, 57 insertions(+), 144 deletions(-) Approvals: Aaron Durbin: Looks good to me, approved build bot (Jenkins): Verified Patrick Georgi: Looks good to me, but someone else must approve diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl index 67cee27..43520f7 100644 --- a/src/ec/google/chromeec/acpi/ec.asl +++ b/src/ec/google/chromeec/acpi/ec.asl @@ -26,9 +26,6 @@ External (\_SB.DPTF.TCHG, DeviceObj) #endif External (\_SB.DPTF.TPET, MethodObj) -#ifndef EC_ENABLE_LID_SWITCH -External (\_SB.LID0, DeviceObj) -#endif Device (EC0) { @@ -171,10 +168,6 @@ Store (LIDS, \LIDS) #ifdef EC_ENABLE_LID_SWITCH Notify (LID0, 0x80) -#else - If (CondRefOf (\_SB.LID0)) { - Notify (\_SB.LID0, 0x80) - } #endif } @@ -185,10 +178,6 @@ Store (LIDS, \LIDS) #ifdef EC_ENABLE_LID_SWITCH Notify (LID0, 0x80) -#else - If (CondRefOf (\_SB.LID0)) { - Notify (\_SB.LID0, 0x80) - } #endif } diff --git a/src/mainboard/google/auron/acpi/ec.asl b/src/mainboard/google/auron/acpi/ec.asl index e25cd29..5740c27 100644 --- a/src/mainboard/google/auron/acpi/ec.asl +++ b/src/mainboard/google/auron/acpi/ec.asl @@ -19,5 +19,13 @@ /* variant configuration */ #include <variant/acpi/ec.asl> +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH +/* + * There is no GPIO for LID, the EC pulses WAKE# pin instead. + * There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE. + */ +#define EC_ENABLE_WAKE_PIN 0x69 + /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> diff --git a/src/mainboard/google/auron/acpi/mainboard.asl b/src/mainboard/google/auron/acpi/mainboard.asl index c5b9a83..7910b6e 100644 --- a/src/mainboard/google/auron/acpi/mainboard.asl +++ b/src/mainboard/google/auron/acpi/mainboard.asl @@ -18,20 +18,6 @@ Scope (\_SB) { - Device (LID0) - { - Name(_HID, EisaId("PNP0C0D")) - Method(_LID, 0) - { - Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS) - Return (\LIDS) - } - - // There is no GPIO for LID, the EC pulses WAKE# pin instead. - // There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE - Name (_PRW, Package(){ 0x69, 5 }) // PCI_EXP - } - Device (PWRB) { Name(_HID, EisaId("PNP0C0C")) diff --git a/src/mainboard/google/chell/acpi/ec.asl b/src/mainboard/google/chell/acpi/ec.asl index e4a35c8..3f5a4ac 100644 --- a/src/mainboard/google/chell/acpi/ec.asl +++ b/src/mainboard/google/chell/acpi/ec.asl @@ -23,5 +23,9 @@ /* Enable EC backed PD MCU device in ACPI */ #define EC_ENABLE_PD_MCU_DEVICE +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH +#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE + /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> diff --git a/src/mainboard/google/chell/acpi/mainboard.asl b/src/mainboard/google/chell/acpi/mainboard.asl index f2503a8..8817ea7 100644 --- a/src/mainboard/google/chell/acpi/mainboard.asl +++ b/src/mainboard/google/chell/acpi/mainboard.asl @@ -17,17 +17,6 @@ Scope (\_SB) { - Device (LID0) - { - Name (_HID, EisaId ("PNP0C0D")) - Method (_LID, 0) - { - Return (\_SB.PCI0.LPCB.EC0.LIDS) - } - - Name (_PRW, Package () { GPE_EC_WAKE, 5 }) - } - Device (PWRB) { Name (_HID, EisaId ("PNP0C0C")) diff --git a/src/mainboard/google/cyan/acpi/ec.asl b/src/mainboard/google/cyan/acpi/ec.asl index d2de775..ab89841 100644 --- a/src/mainboard/google/cyan/acpi/ec.asl +++ b/src/mainboard/google/cyan/acpi/ec.asl @@ -17,5 +17,8 @@ /* mainboard configuration */ #include <ec.h> +/* Enable LID switch */ +#define EC_ENABLE_LID_SWITCH + /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> diff --git a/src/mainboard/google/cyan/acpi/mainboard.asl b/src/mainboard/google/cyan/acpi/mainboard.asl index c9f4017..ff73be3 100644 --- a/src/mainboard/google/cyan/acpi/mainboard.asl +++ b/src/mainboard/google/cyan/acpi/mainboard.asl @@ -19,16 +19,6 @@ Scope (\_SB) { - Device (LID0) - { - Name (_HID, EisaId ("PNP0C0D")) - Method (_LID, 0) - { - Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS) - Return (\LIDS) - } - } - Device (PWRB) { Name (_HID, EisaId ("PNP0C0C")) diff --git a/src/mainboard/google/glados/acpi/ec.asl b/src/mainboard/google/glados/acpi/ec.asl index b012827..d90d87d 100644 --- a/src/mainboard/google/glados/acpi/ec.asl +++ b/src/mainboard/google/glados/acpi/ec.asl @@ -26,5 +26,9 @@ /* Enable EC backed PD MCU device in ACPI */ #define EC_ENABLE_PD_MCU_DEVICE +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH +#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE + /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> diff --git a/src/mainboard/google/glados/acpi/mainboard.asl b/src/mainboard/google/glados/acpi/mainboard.asl index f2503a8..8817ea7 100644 --- a/src/mainboard/google/glados/acpi/mainboard.asl +++ b/src/mainboard/google/glados/acpi/mainboard.asl @@ -17,17 +17,6 @@ Scope (\_SB) { - Device (LID0) - { - Name (_HID, EisaId ("PNP0C0D")) - Method (_LID, 0) - { - Return (\_SB.PCI0.LPCB.EC0.LIDS) - } - - Name (_PRW, Package () { GPE_EC_WAKE, 5 }) - } - Device (PWRB) { Name (_HID, EisaId ("PNP0C0C")) diff --git a/src/mainboard/google/lars/acpi/ec.asl b/src/mainboard/google/lars/acpi/ec.asl index b012827..d90d87d 100644 --- a/src/mainboard/google/lars/acpi/ec.asl +++ b/src/mainboard/google/lars/acpi/ec.asl @@ -26,5 +26,9 @@ /* Enable EC backed PD MCU device in ACPI */ #define EC_ENABLE_PD_MCU_DEVICE +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH +#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE + /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> diff --git a/src/mainboard/google/lars/acpi/mainboard.asl b/src/mainboard/google/lars/acpi/mainboard.asl index 4fe3365..7f62637 100644 --- a/src/mainboard/google/lars/acpi/mainboard.asl +++ b/src/mainboard/google/lars/acpi/mainboard.asl @@ -18,17 +18,6 @@ Scope (\_SB) { - Device (LID0) - { - Name (_HID, EisaId ("PNP0C0D")) - Method (_LID, 0) - { - Return (\_SB.PCI0.LPCB.EC0.LIDS) - } - - Name (_PRW, Package () { GPE_EC_WAKE, 5 }) - } - Device (PWRB) { Name (_HID, EisaId ("PNP0C0C")) diff --git a/src/mainboard/google/link/acpi/ec.asl b/src/mainboard/google/link/acpi/ec.asl index 2e898ed..f94d8ca 100644 --- a/src/mainboard/google/link/acpi/ec.asl +++ b/src/mainboard/google/link/acpi/ec.asl @@ -19,5 +19,11 @@ /* Enable EC backed Keyboard Backlight in ACPI */ #define EC_ENABLE_KEYBOARD_BACKLIGHT +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH + +/* EC_LID_OUT is GPIO15 */ +#define EC_ENABLE_WAKE_PIN 0x1f + /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> diff --git a/src/mainboard/google/link/acpi/mainboard.asl b/src/mainboard/google/link/acpi/mainboard.asl index 01e99fa..aa33d14 100644 --- a/src/mainboard/google/link/acpi/mainboard.asl +++ b/src/mainboard/google/link/acpi/mainboard.asl @@ -17,19 +17,6 @@ #include <mainboard/google/link/onboard.h> Scope (\_SB) { - Device (LID0) - { - Name(_HID, EisaId("PNP0C0D")) - Method(_LID, 0) - { - Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS) - Return (\LIDS) - } - - // EC_LID_OUT is GPIO15 - Name(_PRW, Package(){0x1f, 0x05}) - } - Device (PWRB) { Name(_HID, EisaId("PNP0C0C")) diff --git a/src/mainboard/google/link/acpi/platform.asl b/src/mainboard/google/link/acpi/platform.asl index c84736a..5c4a6da 100644 --- a/src/mainboard/google/link/acpi/platform.asl +++ b/src/mainboard/google/link/acpi/platform.asl @@ -38,7 +38,7 @@ Store (\_SB.PCI0.LPCB.EC0.LIDS, Local0) if (LNotEqual (Local0, \LIDS)) { Store (Local0, \LIDS) - Notify (\_SB.LID0, 0x80) + Notify (\_SB.PCI0.LPCB.EC0.LID0, 0x80) } Return(Package(){0,0}) diff --git a/src/mainboard/google/rambi/acpi/ec.asl b/src/mainboard/google/rambi/acpi/ec.asl index 93745b4..febe102 100644 --- a/src/mainboard/google/rambi/acpi/ec.asl +++ b/src/mainboard/google/rambi/acpi/ec.asl @@ -16,5 +16,11 @@ /* mainboard configuration */ #include <mainboard/google/rambi/ec.h> +#include <variant/onboard.h> + +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH +#define EC_ENABLE_WAKE_PIN BOARD_PCH_WAKE_GPIO + /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> diff --git a/src/mainboard/google/rambi/acpi/mainboard.asl b/src/mainboard/google/rambi/acpi/mainboard.asl index 520f3e1..84136d9 100644 --- a/src/mainboard/google/rambi/acpi/mainboard.asl +++ b/src/mainboard/google/rambi/acpi/mainboard.asl @@ -18,17 +18,6 @@ Scope (\_SB) { - Device (LID0) - { - Name (_HID, EisaId ("PNP0C0D")) - Name (_PRW, Package() { BOARD_PCH_WAKE_GPIO, 0x5 }) - Method (_LID, 0) - { - Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS) - Return (\LIDS) - } - } - Device (PWRB) { Name (_HID, EisaId ("PNP0C0C")) diff --git a/src/mainboard/google/slippy/acpi/ec.asl b/src/mainboard/google/slippy/acpi/ec.asl index 58b9a55..d4f62c4 100644 --- a/src/mainboard/google/slippy/acpi/ec.asl +++ b/src/mainboard/google/slippy/acpi/ec.asl @@ -16,5 +16,13 @@ /* mainboard configuration */ #include "../ec.h" +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH +/* + * There is no GPIO for LID, the EC pulses WAKE# pin instead. + * There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE. + */ +#define EC_ENABLE_WAKE_PIN 0x69 + /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> diff --git a/src/mainboard/google/slippy/acpi/mainboard.asl b/src/mainboard/google/slippy/acpi/mainboard.asl index 35bc1b4..7605e9e 100644 --- a/src/mainboard/google/slippy/acpi/mainboard.asl +++ b/src/mainboard/google/slippy/acpi/mainboard.asl @@ -16,20 +16,6 @@ Scope (\_SB) { - Device (LID0) - { - Name(_HID, EisaId("PNP0C0D")) - Method(_LID, 0) - { - Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS) - Return (\LIDS) - } - - // There is no GPIO for LID, the EC pulses WAKE# pin instead. - // There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE - Name (_PRW, Package(){ 0x69, 5 }) // PCI_EXP - } - Device (PWRB) { Name(_HID, EisaId("PNP0C0C")) diff --git a/src/mainboard/google/slippy/acpi/platform.asl b/src/mainboard/google/slippy/acpi/platform.asl index 1bd054d..7074336 100644 --- a/src/mainboard/google/slippy/acpi/platform.asl +++ b/src/mainboard/google/slippy/acpi/platform.asl @@ -75,7 +75,7 @@ Store (\_SB.PCI0.LPCB.EC0.LIDS, Local0) if (LNotEqual (Local0, \LIDS)) { Store (Local0, \LIDS) - Notify (\_SB.LID0, 0x80) + Notify (\_SB.PCI0.LPCB.EC0.LID0, 0x80) } Return(Package(){0,0}) diff --git a/src/mainboard/intel/kblrvp/acpi/ec.asl b/src/mainboard/intel/kblrvp/acpi/ec.asl index 01fa75c..a9a61dd 100644 --- a/src/mainboard/intel/kblrvp/acpi/ec.asl +++ b/src/mainboard/intel/kblrvp/acpi/ec.asl @@ -23,6 +23,11 @@ /* Enable EC backed PD MCU device in ACPI */ #define EC_ENABLE_PD_MCU_DEVICE #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) + +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH +#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE + /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> #endif diff --git a/src/mainboard/intel/kblrvp/acpi/mainboard.asl b/src/mainboard/intel/kblrvp/acpi/mainboard.asl index 4764372..0041ee6 100644 --- a/src/mainboard/intel/kblrvp/acpi/mainboard.asl +++ b/src/mainboard/intel/kblrvp/acpi/mainboard.asl @@ -14,22 +14,9 @@ * GNU General Public License for more details. */ -#include <variant/gpio.h> - #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) Scope (\_SB) { - Device (LID0) - { - Name (_HID, EisaId ("PNP0C0D")) - Method (_LID, 0) - { - Return (\_SB.PCI0.LPCB.EC0.LIDS) - } - - Name (_PRW, Package () { GPE_EC_WAKE, 5 }) - } - Device (PWRB) { Name (_HID, EisaId ("PNP0C0C")) diff --git a/src/mainboard/intel/kunimitsu/acpi/ec.asl b/src/mainboard/intel/kunimitsu/acpi/ec.asl index 2203e2f..4599e12 100644 --- a/src/mainboard/intel/kunimitsu/acpi/ec.asl +++ b/src/mainboard/intel/kunimitsu/acpi/ec.asl @@ -23,5 +23,9 @@ /* Enable EC backed PD MCU device in ACPI */ #define EC_ENABLE_PD_MCU_DEVICE +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH +#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE + /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> diff --git a/src/mainboard/intel/kunimitsu/acpi/mainboard.asl b/src/mainboard/intel/kunimitsu/acpi/mainboard.asl index 4fe3365..c615dc3 100644 --- a/src/mainboard/intel/kunimitsu/acpi/mainboard.asl +++ b/src/mainboard/intel/kunimitsu/acpi/mainboard.asl @@ -14,21 +14,8 @@ * GNU General Public License for more details. */ -#include "../gpio.h" - Scope (\_SB) { - Device (LID0) - { - Name (_HID, EisaId ("PNP0C0D")) - Method (_LID, 0) - { - Return (\_SB.PCI0.LPCB.EC0.LIDS) - } - - Name (_PRW, Package () { GPE_EC_WAKE, 5 }) - } - Device (PWRB) { Name (_HID, EisaId ("PNP0C0C")) diff --git a/src/mainboard/intel/strago/acpi/ec.asl b/src/mainboard/intel/strago/acpi/ec.asl index f4ac295..e023f3b 100644 --- a/src/mainboard/intel/strago/acpi/ec.asl +++ b/src/mainboard/intel/strago/acpi/ec.asl @@ -17,5 +17,8 @@ /* mainboard configuration */ #include "ec.h" +/* Enable LID switch */ +#define EC_ENABLE_LID_SWITCH + /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> diff --git a/src/mainboard/intel/strago/acpi/mainboard.asl b/src/mainboard/intel/strago/acpi/mainboard.asl index 0353eed..17c83bf 100644 --- a/src/mainboard/intel/strago/acpi/mainboard.asl +++ b/src/mainboard/intel/strago/acpi/mainboard.asl @@ -19,16 +19,6 @@ Scope (\_SB) { - Device (LID0) - { - Name (_HID, EisaId ("PNP0C0D")) - Method (_LID, 0) - { - Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS) - Return (\LIDS) - } - } - Device (PWRB) { Name (_HID, EisaId ("PNP0C0C")) -- To view, visit https://review.coreboot.org/18964 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: merged Gerrit-Change-Id: Iac58847c2055fa27c19d02b2dbda6813d6dec3ec Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: mainboard/google/rambi: Move SIO_EC_ENABLE_PS2K to onboard.h
by Martin Roth (Code Review) 26 Mar '17

26 Mar '17

Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/18965 ) Change subject: mainboard/google/rambi: Move SIO_EC_ENABLE_PS2K to onboard.h ...................................................................... mainboard/google/rambi: Move SIO_EC_ENABLE_PS2K to onboard.h Instead of defining SIO_EC_ENABLE_PS2K by default for all boards and doing an undef in variant/onboard.h, move the definition of SIO_EC_ENABLE_PS2K to variant/onboard.h. This avoids dependency between different *.asl files. Change-Id: I83e4ce42a594e952a443c618d7ef9840113027b9 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> Reviewed-on: https://review.coreboot.org/18965 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> --- M src/mainboard/google/rambi/acpi/superio.asl M src/mainboard/google/rambi/variants/banjo/include/variant/onboard.h M src/mainboard/google/rambi/variants/candy/include/variant/onboard.h M src/mainboard/google/rambi/variants/clapper/include/variant/onboard.h M src/mainboard/google/rambi/variants/enguarde/include/variant/onboard.h M src/mainboard/google/rambi/variants/glimmer/include/variant/onboard.h M src/mainboard/google/rambi/variants/gnawty/include/variant/onboard.h M src/mainboard/google/rambi/variants/heli/include/variant/onboard.h M src/mainboard/google/rambi/variants/kip/include/variant/onboard.h M src/mainboard/google/rambi/variants/ninja/include/variant/onboard.h M src/mainboard/google/rambi/variants/orco/include/variant/onboard.h M src/mainboard/google/rambi/variants/quawks/include/variant/onboard.h M src/mainboard/google/rambi/variants/rambi/include/variant/onboard.h M src/mainboard/google/rambi/variants/squawks/include/variant/onboard.h M src/mainboard/google/rambi/variants/sumo/include/variant/onboard.h M src/mainboard/google/rambi/variants/swanky/include/variant/onboard.h M src/mainboard/google/rambi/variants/winky/include/variant/onboard.h 17 files changed, 28 insertions(+), 7 deletions(-) Approvals: Aaron Durbin: Looks good to me, approved build bot (Jenkins): Verified Patrick Georgi: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/rambi/acpi/superio.asl b/src/mainboard/google/rambi/acpi/superio.asl index adc34aa..e3557d9 100644 --- a/src/mainboard/google/rambi/acpi/superio.asl +++ b/src/mainboard/google/rambi/acpi/superio.asl @@ -18,7 +18,6 @@ #define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources #define SIO_EC_HOST_ENABLE // EC Host Interface Resources -#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard /* Variant configuration */ #include <variant/onboard.h> diff --git a/src/mainboard/google/rambi/variants/banjo/include/variant/onboard.h b/src/mainboard/google/rambi/variants/banjo/include/variant/onboard.h index 38410e1..617fe02 100644 --- a/src/mainboard/google/rambi/variants/banjo/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/banjo/include/variant/onboard.h @@ -30,4 +30,6 @@ #define BOARD_I8042_IRQ GPIO_S0_DED_IRQ(I8042_IRQ_OFFSET) #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif diff --git a/src/mainboard/google/rambi/variants/candy/include/variant/onboard.h b/src/mainboard/google/rambi/variants/candy/include/variant/onboard.h index 9a69821..22372d7 100644 --- a/src/mainboard/google/rambi/variants/candy/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/candy/include/variant/onboard.h @@ -36,4 +36,6 @@ #define BOARD_I8042_IRQ GPIO_S0_DED_IRQ(I8042_IRQ_OFFSET) #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif diff --git a/src/mainboard/google/rambi/variants/clapper/include/variant/onboard.h b/src/mainboard/google/rambi/variants/clapper/include/variant/onboard.h index 016f657..cd5052d 100644 --- a/src/mainboard/google/rambi/variants/clapper/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/clapper/include/variant/onboard.h @@ -36,4 +36,6 @@ #define BOARD_I8042_IRQ GPIO_S0_DED_IRQ(I8042_IRQ_OFFSET) #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif diff --git a/src/mainboard/google/rambi/variants/enguarde/include/variant/onboard.h b/src/mainboard/google/rambi/variants/enguarde/include/variant/onboard.h index 2a1045d..f146067 100644 --- a/src/mainboard/google/rambi/variants/enguarde/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/enguarde/include/variant/onboard.h @@ -31,4 +31,6 @@ #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) #define BOARD_ALS_IRQ GPIO_S0_DED_IRQ(ALS_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif diff --git a/src/mainboard/google/rambi/variants/glimmer/include/variant/onboard.h b/src/mainboard/google/rambi/variants/glimmer/include/variant/onboard.h index 121da36..3fbd77f 100644 --- a/src/mainboard/google/rambi/variants/glimmer/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/glimmer/include/variant/onboard.h @@ -36,4 +36,6 @@ #define BOARD_I8042_IRQ GPIO_S0_DED_IRQ(I8042_IRQ_OFFSET) #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif diff --git a/src/mainboard/google/rambi/variants/gnawty/include/variant/onboard.h b/src/mainboard/google/rambi/variants/gnawty/include/variant/onboard.h index 86ca488..c188ccf 100644 --- a/src/mainboard/google/rambi/variants/gnawty/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/gnawty/include/variant/onboard.h @@ -36,4 +36,6 @@ #define BOARD_I8042_IRQ GPIO_S0_DED_IRQ(I8042_IRQ_OFFSET) #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif diff --git a/src/mainboard/google/rambi/variants/heli/include/variant/onboard.h b/src/mainboard/google/rambi/variants/heli/include/variant/onboard.h index f4ffed5..8134ab4 100644 --- a/src/mainboard/google/rambi/variants/heli/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/heli/include/variant/onboard.h @@ -30,4 +30,6 @@ #define BOARD_I8042_IRQ GPIO_S0_DED_IRQ(I8042_IRQ_OFFSET) #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif diff --git a/src/mainboard/google/rambi/variants/kip/include/variant/onboard.h b/src/mainboard/google/rambi/variants/kip/include/variant/onboard.h index 4bb37be..684aac8 100644 --- a/src/mainboard/google/rambi/variants/kip/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/kip/include/variant/onboard.h @@ -31,4 +31,6 @@ #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) #define BOARD_ALS_IRQ GPIO_S0_DED_IRQ(ALS_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif diff --git a/src/mainboard/google/rambi/variants/ninja/include/variant/onboard.h b/src/mainboard/google/rambi/variants/ninja/include/variant/onboard.h index ec8bcd6..6a91314 100644 --- a/src/mainboard/google/rambi/variants/ninja/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/ninja/include/variant/onboard.h @@ -34,7 +34,4 @@ #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) -/* Disable PS2 keyboard */ -#undef SIO_EC_ENABLE_PS2K - #endif diff --git a/src/mainboard/google/rambi/variants/orco/include/variant/onboard.h b/src/mainboard/google/rambi/variants/orco/include/variant/onboard.h index b4a6c6e..ba316e9 100644 --- a/src/mainboard/google/rambi/variants/orco/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/orco/include/variant/onboard.h @@ -30,4 +30,6 @@ #define BOARD_I8042_IRQ GPIO_S0_DED_IRQ(I8042_IRQ_OFFSET) #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif diff --git a/src/mainboard/google/rambi/variants/quawks/include/variant/onboard.h b/src/mainboard/google/rambi/variants/quawks/include/variant/onboard.h index 4bb37be..684aac8 100644 --- a/src/mainboard/google/rambi/variants/quawks/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/quawks/include/variant/onboard.h @@ -31,4 +31,6 @@ #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) #define BOARD_ALS_IRQ GPIO_S0_DED_IRQ(ALS_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif diff --git a/src/mainboard/google/rambi/variants/rambi/include/variant/onboard.h b/src/mainboard/google/rambi/variants/rambi/include/variant/onboard.h index b3332a3..a424f2f 100644 --- a/src/mainboard/google/rambi/variants/rambi/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/rambi/include/variant/onboard.h @@ -37,4 +37,6 @@ #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) #define BOARD_ALS_IRQ GPIO_S0_DED_IRQ(ALS_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif diff --git a/src/mainboard/google/rambi/variants/squawks/include/variant/onboard.h b/src/mainboard/google/rambi/variants/squawks/include/variant/onboard.h index 4bb37be..684aac8 100644 --- a/src/mainboard/google/rambi/variants/squawks/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/squawks/include/variant/onboard.h @@ -31,4 +31,6 @@ #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) #define BOARD_ALS_IRQ GPIO_S0_DED_IRQ(ALS_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif diff --git a/src/mainboard/google/rambi/variants/sumo/include/variant/onboard.h b/src/mainboard/google/rambi/variants/sumo/include/variant/onboard.h index 1fb268a..7003b9d 100644 --- a/src/mainboard/google/rambi/variants/sumo/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/sumo/include/variant/onboard.h @@ -41,7 +41,4 @@ #define BOARD_I8042_IRQ GPIO_S0_DED_IRQ(I8042_IRQ_OFFSET) #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) -/* Disable PS2 keyboard */ -#undef SIO_EC_ENABLE_PS2K - #endif diff --git a/src/mainboard/google/rambi/variants/swanky/include/variant/onboard.h b/src/mainboard/google/rambi/variants/swanky/include/variant/onboard.h index f4ffed5..8134ab4 100644 --- a/src/mainboard/google/rambi/variants/swanky/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/swanky/include/variant/onboard.h @@ -30,4 +30,6 @@ #define BOARD_I8042_IRQ GPIO_S0_DED_IRQ(I8042_IRQ_OFFSET) #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif diff --git a/src/mainboard/google/rambi/variants/winky/include/variant/onboard.h b/src/mainboard/google/rambi/variants/winky/include/variant/onboard.h index 9771179..065ec17 100644 --- a/src/mainboard/google/rambi/variants/winky/include/variant/onboard.h +++ b/src/mainboard/google/rambi/variants/winky/include/variant/onboard.h @@ -31,4 +31,6 @@ #define BOARD_CODEC_IRQ GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET) #define BOARD_ALS_IRQ GPIO_S0_DED_IRQ(ALS_IRQ_OFFSET) +#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard + #endif -- To view, visit https://review.coreboot.org/18965 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: merged Gerrit-Change-Id: I83e4ce42a594e952a443c618d7ef9840113027b9 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: 3rdparty/vboot: Update to upstream master
by Martin Roth (Code Review) 26 Mar '17

26 Mar '17

Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/18953 ) Change subject: 3rdparty/vboot: Update to upstream master ...................................................................... 3rdparty/vboot: Update to upstream master This brings in 70 new commits from the upstream vboot repository, dated October 31, 2016 to March 2, 2017 Change-Id: Iac9c2b0389afbfa02c1cccc38d39a12dac4a5ac4 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/18953 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> --- M 3rdparty/vboot 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Paul Menzel: Looks good to me, but someone else must approve build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved diff --git a/3rdparty/vboot b/3rdparty/vboot index adfafba..a1c5f7c 160000 --- a/3rdparty/vboot +++ b/3rdparty/vboot @@ -1 +1 @@ -Subproject commit adfafba793684ed92965dfbd86b3fb3463975d8c +Subproject commit a1c5f7c006b7bb3d5894f132f70ba3bbadfd9d6b -- To view, visit https://review.coreboot.org/18953 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: merged Gerrit-Change-Id: Iac9c2b0389afbfa02c1cccc38d39a12dac4a5ac4 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins)

1 0

Change in coreboot[master]: util/scripts: Add script that generates all kconfigs
by coreboot org (Code Review) 26 Mar '17

26 Mar '17

coreboot org has posted comments on this change. ( https://review.coreboot.org/14379 ) Change subject: util/scripts: Add script that generates all kconfigs ...................................................................... Patch Set 2: Verified+1 Gigabyte GA-G41M-ES2L: Boot and extended test successful.Asus P5GC-MX: Boot and extended test successful. -- To view, visit https://review.coreboot.org/14379 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I4321d006a935d4ad220ef946be782e14709da5fd Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com> Gerrit-HasComments: No

1 0

Change in coreboot[master]: util/scripts: Add script that generates all kconfigs
by Martin Roth (Code Review) 26 Mar '17

26 Mar '17

Martin Roth has removed a vote on this change. Change subject: util/scripts: Add script that generates all kconfigs ...................................................................... Removed Verified+1 by coreboot org <coreboot.org(a)gmail.com> -- To view, visit https://review.coreboot.org/14379 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: deleteVote Gerrit-Change-Id: I4321d006a935d4ad220ef946be782e14709da5fd Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com>

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Change in coreboot[master]: util/scripts: Add script that generates all kconfigs
by coreboot org (Code Review) 26 Mar '17

26 Mar '17

coreboot org has posted comments on this change. ( https://review.coreboot.org/14379 ) Change subject: util/scripts: Add script that generates all kconfigs ...................................................................... Patch Set 2: Verified+1 Gigabyte GA-G41M-ES2L: Target OFFLINE. Test ABORTED. Asus P5GC-MX: Boot and extended test successful. -- To view, visit https://review.coreboot.org/14379 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I4321d006a935d4ad220ef946be782e14709da5fd Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com> Gerrit-HasComments: No

1 0

Change in coreboot[master]: amd/torpedo: Switch away from AGESA_LEGACY
by build bot (Jenkins) (Code Review) 26 Mar '17

26 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18994 ) Change subject: amd/torpedo: Switch away from AGESA_LEGACY ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/6672/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/50689/ : SUCCESS -- To view, visit https://review.coreboot.org/18994 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Id074f3656801d412efb9485a6e2578beb9782259 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

1 0

Change in coreboot[master]: amd/torpedo: Switch away from AGESA_LEGACY
by Martin Roth (Code Review) 26 Mar '17

26 Mar '17

Hello Kyösti Mälkki, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/18994 to look at the new patch set (#2). Change subject: amd/torpedo: Switch away from AGESA_LEGACY ...................................................................... amd/torpedo: Switch away from AGESA_LEGACY Change-Id: Id074f3656801d412efb9485a6e2578beb9782259 Signed-off-by: Martin Roth <gaumless(a)gmail.com> --- M src/mainboard/amd/torpedo/Kconfig M src/mainboard/amd/torpedo/romstage.c 2 files changed, 4 insertions(+), 74 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/18994/2 -- To view, visit https://review.coreboot.org/18994 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Id074f3656801d412efb9485a6e2578beb9782259 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins)

1 0

Change in coreboot[master]: amd/torpedo: Switch away from AGESA_LEGACY
by Martin Roth (Code Review) 26 Mar '17

26 Mar '17

Martin Roth has posted comments on this change. ( https://review.coreboot.org/18994 ) Change subject: amd/torpedo: Switch away from AGESA_LEGACY ...................................................................... Patch Set 1: I did this while I was reviewing the top level AGESA_LEGACY patch, so I figured I'd push it. I didn't test it on torpedo, and honestly I'm not even sure it's worthwhile, as family12 agesa is the one platform that I find myself in agreement with Alex - Let's just delete it. I've got a torpedo, but I wasn't able to get it tested since it needs a 15 volt, 130 watt power supply. Not something I have handy. -- To view, visit https://review.coreboot.org/18994 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Id074f3656801d412efb9485a6e2578beb9782259 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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