coreboot-gerrit March 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: vboot: Remove VBOOT_DYNAMIC_WORK_BUFFER Kconfig option
by build bot (Jenkins) (Code Review) 28 Mar '17

28 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18979 ) Change subject: vboot: Remove VBOOT_DYNAMIC_WORK_BUFFER Kconfig option ...................................................................... Patch Set 7: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/50833/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/6809/ : SUCCESS -- To view, visit https://review.coreboot.org/18979 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I3f953c8d2a8dcb3f65b07f548184d6dd0eb688fe Gerrit-PatchSet: 7 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: vboot: Remove CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL Kconfig ...
by build bot (Jenkins) (Code Review) 28 Mar '17

28 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18978 ) Change subject: vboot: Remove CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL Kconfig option ...................................................................... Patch Set 7: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/50832/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/6810/ : SUCCESS -- To view, visit https://review.coreboot.org/18978 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: If42c9c4fbab51fbd474e1530023a30b69495d1d6 Gerrit-PatchSet: 7 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: vboot: Select SoC-specific configuration for all Chrome OS b...
by build bot (Jenkins) (Code Review) 28 Mar '17

28 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19022 ) Change subject: vboot: Select SoC-specific configuration for all Chrome OS boards ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/50831/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/6808/ : SUCCESS -- To view, visit https://review.coreboot.org/19022 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ibddf413568630f2e5d6e286b9eca6378d7170104 Gerrit-PatchSet: 5 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: AGESA: Move guard on S3 support functions
by build bot (Jenkins) (Code Review) 28 Mar '17

28 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19025 ) Change subject: AGESA: Move guard on S3 support functions ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/50829/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/6807/ : SUCCESS -- To view, visit https://review.coreboot.org/19025 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ie9c1fb3f3f0ab1951771ed829d4acdd8a59d8fbf Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: Remove libverstage as separate library and source file class
by Julius Werner (Code Review) 28 Mar '17

28 Mar '17

Hello Aaron Durbin, Paul Menzel, build bot (Jenkins), Patrick Georgi, Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/18302 to look at the new patch set (#13). Change subject: Remove libverstage as separate library and source file class ...................................................................... Remove libverstage as separate library and source file class In builds without CONFIG_VBOOT_SEPARATE_VERSTAGE, verstage files are linked directly into the bootblock or the romstage. However, they're still compiled with a separate "libverstage" source file class, linked into an intermediate library and then linked into the final destination stage. There is no obvious benefit to doing it this way and it's unclear why it was chosen in the first place... there are, however, obvious disadvantages: it can result in code that is used by both libverstage and the host stage to occur twice in the output binary. It also means that libverstage files have their separate compiler flags that are not necessarily aligned with the host stage, which can lead to weird effects like <rules.h> macros not being set the way you would expect. In fact, VBOOT_STARTS_IN_ROMSTAGE configurations are currently broken on x86 because their libverstage code that gets compiled into the romstage sets ENV_VERSTAGE, but CAR migration code expects all ENV_VERSTAGE code to run pre-migration. This patch resolves these problems by removing the separate library. There is no more difference between the 'verstage' and 'libverstage' classes, and the source files added to them are just treated the same way a bootblock or romstage source files in configurations where the verstage is linked into either of these respective stages (allowing for the normal object code deduplication and causing those files to be compiled with the same flags as the host stage's files). Tested this whole series by booting a Kevin, an Elm (both with and without SEPARATE_VERSTAGE) and a Falco in normal and recovery mode. Change-Id: I6bb84a9bf1cd54f2e02ca1f665740a9c88d88df4 Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M Makefile M Makefile.inc M src/arch/arm/Makefile.inc M src/arch/arm/armv4/Makefile.inc M src/arch/arm/armv7/Makefile.inc M src/arch/arm64/Makefile.inc M src/arch/arm64/armv8/Makefile.inc M src/arch/x86/Makefile.inc M src/drivers/i2c/ww_ring/Makefile.inc M src/drivers/intel/fsp1_1/Makefile.inc M src/lib/Makefile.inc M src/soc/qualcomm/ipq40xx/Makefile.inc M src/soc/qualcomm/ipq806x/Makefile.inc M src/soc/rockchip/rk3288/Makefile.inc M src/vboot/Makefile.inc M toolchain.inc 16 files changed, 37 insertions(+), 48 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/18302/13 -- To view, visit https://review.coreboot.org/18302 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6bb84a9bf1cd54f2e02ca1f665740a9c88d88df4 Gerrit-PatchSet: 13 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: vboot: Move remaining features out of vendorcode/google/chro...
by Julius Werner (Code Review) 28 Mar '17

28 Mar '17

Hello Aaron Durbin, Paul Menzel, build bot (Jenkins), Patrick Georgi, Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/18984 to look at the new patch set (#10). Change subject: vboot: Move remaining features out of vendorcode/google/chromeos ...................................................................... vboot: Move remaining features out of vendorcode/google/chromeos This patch attempts to finish the separation between CONFIG_VBOOT and CONFIG_CHROMEOS by moving the remaining options and code (including image generation code for things like FWID and GBB flags, which are intrinsic to vboot itself) from src/vendorcode/google/chromeos to src/vboot. Also taking this opportunity to namespace all VBOOT Kconfig options, and clean up menuconfig visibility for them (i.e. some options were visible even though they were tied to the hardware while others were invisible even though it might make sense to change them). CQ-DEPEND=CL:459088 Change-Id: I3e2e31150ebf5a96b6fe507ebeb53a41ecf88122 Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M src/arch/x86/assembly_entry.S M src/arch/x86/bootblock_simple.c M src/arch/x86/car.ld M src/ec/google/chromeec/Kconfig M src/ec/google/chromeec/switches.c M src/include/memlayout.h M src/lib/Makefile.inc M src/mainboard/google/auron/Kconfig M src/mainboard/google/beltino/Kconfig M src/mainboard/google/butterfly/Kconfig M src/mainboard/google/chell/Kconfig M src/mainboard/google/cosmos/Kconfig M src/mainboard/google/cyan/Kconfig M src/mainboard/google/daisy/Kconfig M src/mainboard/google/eve/Kconfig M src/mainboard/google/fizz/Kconfig M src/mainboard/google/foster/Kconfig M src/mainboard/google/gale/Kconfig M src/mainboard/google/glados/Kconfig M src/mainboard/google/gru/Kconfig M src/mainboard/google/jecht/Kconfig M src/mainboard/google/lars/Kconfig M src/mainboard/google/link/Kconfig M src/mainboard/google/nyan/Kconfig M src/mainboard/google/nyan_big/Kconfig M src/mainboard/google/nyan_blaze/Kconfig M src/mainboard/google/oak/Kconfig M src/mainboard/google/parrot/Kconfig M src/mainboard/google/peach_pit/Kconfig M src/mainboard/google/poppy/Kconfig M src/mainboard/google/purin/Kconfig M src/mainboard/google/rambi/Kconfig M src/mainboard/google/reef/Kconfig M src/mainboard/google/rotor/Kconfig M src/mainboard/google/slippy/Kconfig M src/mainboard/google/smaug/Kconfig M src/mainboard/google/storm/Kconfig M src/mainboard/google/stout/Kconfig M src/mainboard/google/veyron/Kconfig M src/mainboard/google/veyron_mickey/Kconfig M src/mainboard/google/veyron_rialto/Kconfig M src/mainboard/intel/baskingridge/Kconfig M src/mainboard/intel/emeraldlake2/Kconfig M src/mainboard/intel/galileo/Kconfig M src/mainboard/intel/kblrvp/Kconfig M src/mainboard/intel/kunimitsu/Kconfig M src/mainboard/intel/strago/Kconfig M src/mainboard/intel/wtm2/Kconfig M src/mainboard/samsung/lumpy/Kconfig M src/mainboard/samsung/stumpy/Kconfig M src/soc/broadcom/cygnus/Kconfig M src/soc/intel/apollolake/Kconfig M src/soc/intel/quark/romstage/fsp1_1.c M src/soc/intel/skylake/Kconfig M src/soc/marvell/armada38x/Kconfig M src/soc/marvell/bg4cd/Kconfig M src/soc/marvell/mvmap2315/Kconfig M src/soc/mediatek/mt8173/Kconfig M src/soc/nvidia/tegra124/Kconfig M src/soc/nvidia/tegra210/Kconfig M src/soc/qualcomm/ipq40xx/Kconfig M src/soc/qualcomm/ipq806x/Kconfig M src/soc/rockchip/rk3288/Kconfig M src/soc/rockchip/rk3399/Kconfig M src/vboot/Kconfig M src/vboot/Makefile.inc M src/vboot/bootmode.c M src/vboot/vboot_handoff.c M src/vboot/vboot_loader.c M src/vboot/vboot_logic.c M src/vboot/verstage.c M src/vendorcode/google/chromeos/Kconfig M src/vendorcode/google/chromeos/Makefile.inc D src/vendorcode/google/chromeos/chromeos.c 74 files changed, 562 insertions(+), 575 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/18984/10 -- To view, visit https://review.coreboot.org/18984 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I3e2e31150ebf5a96b6fe507ebeb53a41ecf88122 Gerrit-PatchSet: 10 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: vboot: Select SoC-specific configuration for all Chrome OS b...
by Julius Werner (Code Review) 28 Mar '17

28 Mar '17

Hello Aaron Durbin, build bot (Jenkins), Patrick Georgi, Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/19022 to look at the new patch set (#5). Change subject: vboot: Select SoC-specific configuration for all Chrome OS boards ...................................................................... vboot: Select SoC-specific configuration for all Chrome OS boards Some Chrome OS boards previously didn't have a hardcoded vboot configuration (e.g. STARTS_IN_BOOTBLOCK/_ROMSTAGE, SEPARATE_VERSTAGE, etc.) selected from their SoC and mainboard Kconfig files, and instead relied on the Chrome OS build system to pass in those options separately. Since there is usually only one "best" vboot configuration for a certain board and there is often board or SoC code specifically written with that configuration in mind (e.g. memlayout), these options should not be adjustable in menuconfig and instead always get selected by board and SoC Makefiles (as opposed to some external build system). (Removing MAINBOARD_HAS_CHROMEOS from Urara because vboot support for Pistachio/MIPS was never finished. Trying to enable even post-romstage vboot leads to weird compiler errors that I don't want to track down now. Let's stop pretending this board has working Chrome OS support because it never did.) Change-Id: Ibddf413568630f2e5d6e286b9eca6378d7170104 Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M src/mainboard/google/urara/Kconfig M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/sandybridge/Kconfig M src/soc/broadcom/cygnus/Kconfig M src/soc/intel/baytrail/Kconfig M src/soc/intel/braswell/Kconfig M src/soc/intel/broadwell/Kconfig M src/soc/nvidia/tegra210/Kconfig M src/soc/qualcomm/ipq40xx/Kconfig M src/soc/qualcomm/ipq806x/Kconfig M src/soc/samsung/exynos5250/Kconfig M src/soc/samsung/exynos5420/Kconfig 12 files changed, 34 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/19022/5 -- To view, visit https://review.coreboot.org/19022 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ibddf413568630f2e5d6e286b9eca6378d7170104 Gerrit-PatchSet: 5 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: AGESA: Simplify parameters for S3 support functions
by build bot (Jenkins) (Code Review) 27 Mar '17

27 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19026 ) Change subject: AGESA: Simplify parameters for S3 support functions ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/50830/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/6806/ : SUCCESS -- To view, visit https://review.coreboot.org/19026 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I6e1f176adc2addbf2659c724f94c1b8d46d4838f Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: AGESA: Move EmptyHeap() call
by build bot (Jenkins) (Code Review) 27 Mar '17

27 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19024 ) Change subject: AGESA: Move EmptyHeap() call ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/50828/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/6805/ : SUCCESS -- To view, visit https://review.coreboot.org/19024 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I3a5d497d0e25ec291f722e9f089bc8928238c3f9 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/common/block: Add cache as ram init and teardown code
by Subrata Banik (Code Review) 27 Mar '17

27 Mar '17

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/18381 ) Change subject: soc/intel/common/block: Add cache as ram init and teardown code ...................................................................... Patch Set 36: (12 comments) https://review.coreboot.org/#/c/18381/36//COMMIT_MSG Commit Message: PS36, Line 11: ENHACED > ENHANCED? Done Line 13: by reading MSR. > Where can these configurations be found? Paul, those registers are part of x86 MTRR software volume. Normally we do read MSR 0x200-0x201 & 0x202-0x203, right after CAR init done through ITP or any debug mechanism to ensure we have correct range programmed. More over if this line looks nasty "ensure to have CAR done by reading MSR." then i will remove this. https://review.coreboot.org/#/c/18381/36/src/soc/intel/common/block/cpu/Kco… File src/soc/intel/common/block/cpu/Kconfig: PS36, Line 13: mode > remove "mode" so we're not saying "non-evict mode mode" Done PS36, Line 13: block > blocked Done PS36, Line 20: set up portion > set up a portion Done PS36, Line 21: use remainder > use the remainder Done PS36, Line 27: Current limitation NEM mode is that code and data size is derive : from the need not to spill out any modified line: as in NEM mode : there is no memory behind, the modified data will be lost and NEM : results will be inconsistent, hence NEM ENHANCED mode ensure to : have, some “magic” way to guarantee that modified data is always : kept in cache while clean data is replaced. > Maybe: thanks for rephrasing it well https://review.coreboot.org/#/c/18381/36/src/soc/intel/common/block/cpu/Mak… File src/soc/intel/common/block/cpu/Makefile.inc: Line 4: > Please remove the blank line at the end of the file. Done https://review.coreboot.org/#/c/18381/36/src/soc/intel/common/block/cpu/car… File src/soc/intel/common/block/cpu/car/cache_as_ram.S: PS36, Line 108: /* Configure CAR region as write-back (WB) */ : mov $MTRR_PHYS_BASE(0), %ecx : mov $CONFIG_DCACHE_RAM_BASE, %eax : or $MTRR_TYPE_WRBACK, %eax : xor %edx,%edx : > indent with tabs Done PS36, Line 124: /* Configure CAR region as write-back (WB) */ : mov $MTRR_PHYS_BASE(0), %ecx : mov $CONFIG_DCACHE_RAM_BASE, %eax : or $MTRR_TYPE_WRBACK, %eax : xor %edx,%edx : wrmsr > indent with tabs Done https://review.coreboot.org/#/c/18381/36/src/soc/intel/skylake/Kconfig File src/soc/intel/skylake/Kconfig: PS36, Line 269: Current limitation NEM mode is that code and data size is derive : from the need not to spill out any modified line: as in NEM mode : there is no memory behind, the modified data will be lost and NEM : results will be inconsistent, hence NEM ENHANCED mode ensure to : have, some “magic” way to guarantee that modified data is always : kept in cache while clean data is replaced. > see previous comment Done PS36, Line 280: Tear Down > lowercase - tear down Done -- To view, visit https://review.coreboot.org/18381 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Iffd0c3e3ca81a3d283d5f1da115222a222e6b157 Gerrit-PatchSet: 36 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-HasComments: Yes

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coreboot-gerrit March 2017