the following patch was just integrated into master:
commit 03e9d6aa13f474ab980779366b7a6c8593721be6
Author: Martin Roth <martinroth(a)google.com>
Date: Thu Feb 9 16:44:24 2017 -0800
util/lint: Don't check license text for files with under 5 lines
Change-Id: I7c1e3cf558d447838819b4d6a63d93d48d5f13e0
Signed-off-by: Martin Roth <martinroth(a)google.com>
Reviewed-on: https://review.coreboot.org/18316
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>
Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com>
See https://review.coreboot.org/18316 for details.
-gerrit
the following patch was just integrated into master:
commit 7a0044bf985941671725f8be94f0f1e04749a11f
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Feb 13 20:45:54 2017 +0100
Revert: soc/intel/skylake: Set FSP-S UPD PchHdaIDispCodecDisconnect to 1
This reverts commit 32997fb0bcb9f4183789331a91fd83138776b96f.
This change is breaking I2S audio on Kabylake platforms so
revert the change to fix audio.
BUG=chrome-os-partner:61548,chrome-os-partner:61009
TEST=manual testing on Eve P1 system
Change-Id: I3212c8be83078ed57e38501386605e67b87d5bd0
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/18360
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Tested-by: build bot (Jenkins)
See https://review.coreboot.org/18360 for details.
-gerrit
the following patch was just integrated into master:
commit e9a22958f0cc35ae28f36614b940ff1cfcb5df6f
Author: Wei-Ning Huang <wnhuang(a)google.com>
Date: Tue Feb 7 14:14:39 2017 +0800
google/eve: change touchpad HID
Change touchpad HID to use with the Google Centroiding Touchpad driver.
BUG=chrome-os-partner:61088
TEST=`emerge-eve coreboot`
Change-Id: I199ff46f1a93d3eccc8c694742585dcf37b2373f
Signed-off-by: Wei-Ning Huang <wnhuang(a)google.com>
Reviewed-on: https://review.coreboot.org/18359
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/18359 for details.
-gerrit
Denis 'GNUtoo' Carikli (GNUtoo(a)no-log.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/11889
-gerrit
commit 4ddc5183b8eb5d83a687348948e56030df3f7142
Author: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org>
Date: Tue Feb 14 17:31:26 2017 +0100
boardstatus: wiki: Update XiVO's coreboot fork source address.
This company doesn't do custom hardware anymore and doesn't
host the sources anymore. We therefore point to the archived
sources instead.
Change-Id: I5ce4f6a468b852fc1d0947fe2b28a5297f14c437
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org>
---
util/board_status/to-wiki/foreword.wiki | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/util/board_status/to-wiki/foreword.wiki b/util/board_status/to-wiki/foreword.wiki
index 631cca4..1774f15 100644
--- a/util/board_status/to-wiki/foreword.wiki
+++ b/util/board_status/to-wiki/foreword.wiki
@@ -35,5 +35,5 @@ code for boards that are not yet merged.
= Vendor trees =
Some vendors have their own coreboot trees/fork, like for instance:
-* [http://git.xivo.fr/?p=official/xioh/coreboot.git;a=summary xivo's tree]
+* [http://mirror.wazo.community/iso/archives/git/xioh/coreboot.git.tar.bz2 xivo's tree]
* [http://git.chromium.org/gitweb/?p=chromiumos/third_party/coreboot.git;a=sum… chrome/chromium's tree]
Boon Tiong Teo (boon.tiong.teo(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18364
-gerrit
commit 93986660e2da1b22c25e0f182fd921050ce887bc
Author: Teo Boon Tiong <boon.tiong.teo(a)intel.com>
Date: Tue Feb 14 22:16:58 2017 +0800
soc/intel/skylake: Expand USB OC pins definition to support PCH-H
Currently the USB OC pins definition only being defined up to OC3.
For PCH-H, OC4 and OC5 are needed, without these, it will causes
build fail for Rvp11 or Saddle Brook platform.
Changes is being verified and booted to Yocto with Saddle Brook.
Change-Id: Idaed6fa7dcddb9c688966e8bc59f656aec2b26eb
Signed-off-by: Teo Boon Tiong <boon.tiong.teo(a)intel.com>
---
src/soc/intel/skylake/include/soc/usb.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/soc/intel/skylake/include/soc/usb.h b/src/soc/intel/skylake/include/soc/usb.h
index 77a94a8..d4f7cc5 100644
--- a/src/soc/intel/skylake/include/soc/usb.h
+++ b/src/soc/intel/skylake/include/soc/usb.h
@@ -51,6 +51,8 @@ enum {
OC1,
OC2,
OC3,
+ OC4,
+ OC5,
OC_SKIP = 8, /* Skip OC programming */
};
the following patch was just integrated into master:
commit 474a7c51cecfd2e37b315da9cfb25607f3ad84f1
Author: Matt DeVillier <matt.devillier(a)gmail.com>
Date: Tue Feb 7 22:07:56 2017 -0600
google/rambi: add explicit pull-down for ram-id
Some variants need the internal pull resistor on GPIO_SSUS_40
set explicitly to pull down rather than disabling the pull,
in order for the ram-id to be read correctly via GPIO.
Correct this by adding a function to enable and set the internal pull
and define its use as needed in the board's variant.h.
Chromium source:
branch: firmware-gnawty-5216.239.B
/src/soc/intel/baytrail/baytrail/gpio.h#418
/src/mainboard/google/gnawty/romstage.c#60
Test: boot 4GB Candy board and observe correct RAM id, amount detected
Change-Id: I8823c27385f4422184b5afa57f6048f7ff2a25ab
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
Reviewed-on: https://review.coreboot.org/18309
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h(a)gmx.de>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See https://review.coreboot.org/18309 for details.
-gerrit
the following patch was just integrated into master:
commit d81078d944bd78b1dca559444d938f18d4004205
Author: Arthur Heymans <arthur(a)aheymans.xyz>
Date: Mon Feb 6 15:08:04 2017 +0100
nb/i945/gma.c: Remove writes to FIFO Watermark registers
Those are the result from tracing what linux or the option rom do
but are not needed here.
TESTED on Thinkpad X60.
Change-Id: I4297a78c4ab6a19ef6161778c993fc3f3fb08c7e
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18294
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h(a)gmx.de>
See https://review.coreboot.org/18294 for details.
-gerrit