the following patch was just integrated into master:
commit 20a91c9830eaa74ee58cfccb59193671949eb086
Author: Furquan Shaikh <furquan(a)chromium.org>
Date: Sat Feb 11 11:16:18 2017 -0800
drivers/spi: Add support for generating SPI device in SSDT
Similar to I2C driver, add support for generating SPI device and
required properties in SSDT for ACPI.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles succesfully. Verified SPI device generated in SSDT on
poppy.
Change-Id: Ic4da79c823131d54d9eb3652b86f6e40fe643ab5
Signed-off-by: Furquan Shaikh <furquan(a)chromium.org>
Reviewed-on: https://review.coreboot.org/18342
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org>
See https://review.coreboot.org/18342 for details.
-gerrit
the following patch was just integrated into master:
commit 0de80da24cc39003f61f86452f46c9b48c95ae4d
Author: Furquan Shaikh <furquan(a)chromium.org>
Date: Sat Feb 11 11:06:19 2017 -0800
soc/intel/skylake: Add support for SPI device
Add a new PCI driver for SPI devices with supported PCI ids. Also,
provide a translation table to convert struct device structure into SPI
bus number.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully
Change-Id: If860eb819f2ce5ae5443f808b356af57f86c52be
Signed-off-by: Furquan Shaikh <furquan(a)chromium.org>
Reviewed-on: https://review.coreboot.org/18341
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org>
See https://review.coreboot.org/18341 for details.
-gerrit
the following patch was just integrated into master:
commit 4e084796886259133d9226c40822e44599a41302
Author: Furquan Shaikh <furquan(a)chromium.org>
Date: Mon Feb 13 13:22:19 2017 -0800
device: Add scan_generic_bus support
scan_smbus routine does not perform any smbus specific operation. Thus,
rename the routine to scan_generic_bus so that it can be used by other
buses like SPI. Add a wrapper scan_smbus to allow other users of smbus
scan to continue working as before.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully
Change-Id: I8ca1a2b7f2906d186ec39e9223ce18b8a1f27196
Signed-off-by: Furquan Shaikh <furquan(a)chromium.org>
Reviewed-on: https://review.coreboot.org/18363
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See https://review.coreboot.org/18363 for details.
-gerrit
the following patch was just integrated into master:
commit 7606c377f56ab68421aa482b1ded6840d426e197
Author: Furquan Shaikh <furquan(a)chromium.org>
Date: Sat Feb 11 10:57:23 2017 -0800
device: Add a new "SPI" device type
Add support for a new "SPI" device type in the devicetree to bind a
device on the SPI bus. Allow device to provide chip select number for
the device as a parameter.
Add spi_bus_operations with operation dev_to_bus which allows SoCs to
define a translation method for converting "struct device" into a unique
SPI bus number.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully.
Change-Id: I86f09516d3cddd619fef23a4659c9e4eadbcf3fa
Signed-off-by: Furquan Shaikh <furquan(a)chromium.org>
Reviewed-on: https://review.coreboot.org/18340
Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org>
Tested-by: build bot (Jenkins)
See https://review.coreboot.org/18340 for details.
-gerrit
the following patch was just integrated into master:
commit e67002968b6ebc69c5a94fb2cee17af3845268c9
Author: Furquan Shaikh <furquan(a)chromium.org>
Date: Sat Feb 11 00:50:38 2017 -0800
sconfig: Add a new "SPI" device type
Update sconfig lex and yacc files to add support for a new "SPI" device
type in the devicetree. SPI device takes only parameter i.e. chip select
number for the device on the SPI bus.
Re-generate the shipped files for sconfig using flex 2.6.0 and bison
3.0.4 (make CONFIG_SCONFIG_GENPARSER=1). Clean up local paths that leak
into generated files.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully.
Change-Id: If0831e25b3e4ed87827ad92356d7bf47b6387884
Signed-off-by: Furquan Shaikh <furquan(a)chromium.org>
Reviewed-on: https://review.coreboot.org/18339
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org>
See https://review.coreboot.org/18339 for details.
-gerrit
the following patch was just integrated into master:
commit dc1b294bfbf3de0b4b14c77e872bd62c66b19535
Author: Furquan Shaikh <furquan(a)chromium.org>
Date: Sun Jan 8 13:39:08 2017 -0800
soc/intel/skylake: Add GSPI controller get_config support
Provide implementation of get_config routine for GSPI controller on
skylake platforms.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully.
Change-Id: I5170076c15d72a7f29acd0989acef5b9149e2ba0
Signed-off-by: Furquan Shaikh <furquan(a)chromium.org>
Reviewed-on: https://review.coreboot.org/18338
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org>
See https://review.coreboot.org/18338 for details.
-gerrit
the following patch was just integrated into master:
commit 3e01b633d6e18ae72e71e198671890d6accbda25
Author: Furquan Shaikh <furquan(a)chromium.org>
Date: Sun Jan 8 13:32:30 2017 -0800
spi: Add function callback to get configuration of SPI bus
Add a new callback to spi_ctrlr structure - get_config - to obtain
configuration of SPI bus from the controller driver. Also, move common
config definitions from acpi_device.h to spi-generic.h
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully
Change-Id: I412c8c70167d18058a32041c2310bc1c884043ce
Signed-off-by: Furquan Shaikh <furquan(a)chromium.org>
Reviewed-on: https://review.coreboot.org/18337
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org>
See https://review.coreboot.org/18337 for details.
-gerrit