Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18405
-gerrit
commit 299a7347fee6e8cf04a7ec006822021479225640
Author: Martin Roth <martinroth(a)google.com>
Date: Thu Feb 9 17:51:20 2017 -0800
src/cpu/x86: Update/Add license headers to all files
Change-Id: I436bf0e7db008ea78e29eaeef10bea101e6c8922
Signed-off-by: Martin Roth <martinroth(a)google.com>
---
src/cpu/x86/16bit/reset16.inc | 13 +++++++++++++
src/cpu/x86/16bit/reset16.ld | 13 +++++++++++++
src/cpu/x86/32bit/entry32.inc | 13 +++++++++++++
src/cpu/x86/cache/cache.c | 13 +++++++++++++
src/cpu/x86/lapic/boot_cpu.c | 13 +++++++++++++
src/cpu/x86/lapic/lapic.c | 13 +++++++++++++
src/cpu/x86/lapic/secondary.S | 13 +++++++++++++
src/cpu/x86/mtrr/earlymtrr.c | 13 +++++++++++++
src/cpu/x86/pae/pgtbl.c | 15 +++++++++++++--
src/cpu/x86/smm/smm.ld | 12 ++++++++++++
src/cpu/x86/tsc/delay_tsc.c | 13 +++++++++++++
11 files changed, 142 insertions(+), 2 deletions(-)
diff --git a/src/cpu/x86/16bit/reset16.inc b/src/cpu/x86/16bit/reset16.inc
index 48cb275..272f089 100644
--- a/src/cpu/x86/16bit/reset16.inc
+++ b/src/cpu/x86/16bit/reset16.inc
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
.section ".reset", "ax", %progbits
.code16
.globl _start
diff --git a/src/cpu/x86/16bit/reset16.ld b/src/cpu/x86/16bit/reset16.ld
index d3c618a..c57cc96 100644
--- a/src/cpu/x86/16bit/reset16.ld
+++ b/src/cpu/x86/16bit/reset16.ld
@@ -1,4 +1,17 @@
/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
* _ROMTOP : The top of the ROM used where we
* need to put the reset vector.
*/
diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc
index 8c39008..2caeb40 100644
--- a/src/cpu/x86/32bit/entry32.inc
+++ b/src/cpu/x86/32bit/entry32.inc
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
/* For starting coreboot in protected mode */
#include <arch/rom_segs.h>
diff --git a/src/cpu/x86/cache/cache.c b/src/cpu/x86/cache/cache.c
index 1df9e08..2313c4d 100644
--- a/src/cpu/x86/cache/cache.c
+++ b/src/cpu/x86/cache/cache.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include <console/console.h>
#include <cpu/x86/cache.h>
diff --git a/src/cpu/x86/lapic/boot_cpu.c b/src/cpu/x86/lapic/boot_cpu.c
index d45ed3a..2942ff6 100644
--- a/src/cpu/x86/lapic/boot_cpu.c
+++ b/src/cpu/x86/lapic/boot_cpu.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include <smp/node.h>
#include <cpu/x86/msr.h>
diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c
index f6cbe17..12fad57 100644
--- a/src/cpu/x86/lapic/lapic.c
+++ b/src/cpu/x86/lapic/lapic.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S
index 6edcd0a..0c4c0d0 100644
--- a/src/cpu/x86/lapic/secondary.S
+++ b/src/cpu/x86/lapic/secondary.S
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include <cpu/x86/mtrr.h>
#include <cpu/x86/lapic_def.h>
diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c
index eae6ba6..3198df3 100644
--- a/src/cpu/x86/mtrr/earlymtrr.c
+++ b/src/cpu/x86/mtrr/earlymtrr.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include <cpu/x86/cache.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
diff --git a/src/cpu/x86/pae/pgtbl.c b/src/cpu/x86/pae/pgtbl.c
index 2dacc10..2c2f99d 100644
--- a/src/cpu/x86/pae/pgtbl.c
+++ b/src/cpu/x86/pae/pgtbl.c
@@ -1,6 +1,17 @@
/*
- 2005.12 yhlu add ramstage cross the vga font buffer handling
-*/
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2005 Yinghai Lu
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
#include <console/console.h>
#include <cpu/cpu.h>
diff --git a/src/cpu/x86/smm/smm.ld b/src/cpu/x86/smm/smm.ld
index 3fde36e..17996af 100644
--- a/src/cpu/x86/smm/smm.ld
+++ b/src/cpu/x86/smm/smm.ld
@@ -1,3 +1,15 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
/* Maximum number of CPUs/cores */
CPUS = 4;
diff --git a/src/cpu/x86/tsc/delay_tsc.c b/src/cpu/x86/tsc/delay_tsc.c
index 816e07f..3f98a1f 100644
--- a/src/cpu/x86/tsc/delay_tsc.c
+++ b/src/cpu/x86/tsc/delay_tsc.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include <arch/early_variables.h>
#include <console/console.h>
#include <arch/io.h>
Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18404
-gerrit
commit 24654df8a631409243234b943903af3bf2535b7a
Author: Martin Roth <martinroth(a)google.com>
Date: Thu Feb 9 17:26:06 2017 -0800
src/cpu/intel: Add license headers to all files
Change-Id: I5ba8b186972fb59686dcbe11358cd26408cbaf05
Signed-off-by: Martin Roth <martinroth(a)google.com>
---
src/cpu/intel/model_69x/model_69x_init.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/src/cpu/intel/model_69x/model_69x_init.c b/src/cpu/intel/model_69x/model_69x_init.c
index 2f12224..ba0af24 100644
--- a/src/cpu/intel/model_69x/model_69x_init.c
+++ b/src/cpu/intel/model_69x/model_69x_init.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include <console/console.h>
#include <device/device.h>
#include <string.h>
Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18403
-gerrit
commit 857d43b064305dd5b4760cf73b199ded180ca6aa
Author: Martin Roth <martinroth(a)google.com>
Date: Thu Feb 9 17:23:55 2017 -0800
src/cpu/amd: Update/Add license headers to all files
Change-Id: I1e0b2b9086db6b3c2f716d9400a83eb60b2ce222
Signed-off-by: Martin Roth <martinroth(a)google.com>
---
src/cpu/amd/agesa/family15tn/udelay.c | 21 +++++++++++++++++----
src/cpu/amd/dualcore/dualcore.c | 15 ++++++++++++++-
src/cpu/amd/dualcore/dualcore_id.c | 15 ++++++++++++++-
src/cpu/amd/geode_gx2/geode_gx2_init.c | 13 +++++++++++++
src/cpu/amd/model_fxx/fidvid.c | 13 +++++++++++++
5 files changed, 71 insertions(+), 6 deletions(-)
diff --git a/src/cpu/amd/agesa/family15tn/udelay.c b/src/cpu/amd/agesa/family15tn/udelay.c
index 5873237..cc673e2 100644
--- a/src/cpu/amd/agesa/family15tn/udelay.c
+++ b/src/cpu/amd/agesa/family15tn/udelay.c
@@ -1,10 +1,23 @@
/*
- * udelay() impementation for SMI handlers
- * This is neat in that it never writes to hardware registers, and thus does not
- * modify the state of the hardware while servicing SMIs.
+ * This file is part of the coreboot project.
*
* Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
- * Subject to the GNU GPL v2, or (at your option) any later version.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * udelay() impementation for SMI handlers
+ * This is neat in that it never writes to hardware registers, and thus does
+ * not modify the state of the hardware while servicing SMIs.
*/
#include <cpu/x86/msr.h>
diff --git a/src/cpu/amd/dualcore/dualcore.c b/src/cpu/amd/dualcore/dualcore.c
index b53a6c4..83302ca 100644
--- a/src/cpu/amd/dualcore/dualcore.c
+++ b/src/cpu/amd/dualcore/dualcore.c
@@ -1,4 +1,17 @@
-/* 2004.12 yhlu add dual core support */
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2004 Yinghai Lu
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
#include "cpu/amd/dualcore/dualcore_id.c"
#include <pc80/mc146818rtc.h>
diff --git a/src/cpu/amd/dualcore/dualcore_id.c b/src/cpu/amd/dualcore/dualcore_id.c
index 665f256..80ce1c7 100644
--- a/src/cpu/amd/dualcore/dualcore_id.c
+++ b/src/cpu/amd/dualcore/dualcore_id.c
@@ -1,4 +1,17 @@
-/* 2004.12 yhlu add dual core support */
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2004 Yinghai Lu
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
#include <arch/cpu.h>
#include <cpu/amd/multicore.h>
diff --git a/src/cpu/amd/geode_gx2/geode_gx2_init.c b/src/cpu/amd/geode_gx2/geode_gx2_init.c
index 531a362..2aa9c8d 100644
--- a/src/cpu/amd/geode_gx2/geode_gx2_init.c
+++ b/src/cpu/amd/geode_gx2/geode_gx2_init.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include <console/console.h>
#include <device/device.h>
#include <string.h>
diff --git a/src/cpu/amd/model_fxx/fidvid.c b/src/cpu/amd/model_fxx/fidvid.c
index 9e6dfa0..20d0906 100644
--- a/src/cpu/amd/model_fxx/fidvid.c
+++ b/src/cpu/amd/model_fxx/fidvid.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#if CONFIG_SET_FIDVID
#ifndef SB_VFSMAF
Subrata Banik (subrata.banik(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18221
-gerrit
commit 1d745806e529039f6cfb432086712606154e330f
Author: Subrata Banik <subrata.banik(a)intel.com>
Date: Thu Feb 16 16:08:49 2017 +0530
soc/intel/common/block: Add Intel XHCI driver support
Create sample model for common Intel XHCI driver.
Change-Id: I81f57bc713900c96d998bae924fc4d38a9024fe3
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
.../intel/common/block/include/intelblocks/xhci.h | 22 +++++++++++
src/soc/intel/common/block/xhci/Kconfig | 4 ++
src/soc/intel/common/block/xhci/Makefile.inc | 7 ++++
src/soc/intel/common/block/xhci/xhci.c | 44 ++++++++++++++++++++++
4 files changed, 77 insertions(+)
diff --git a/src/soc/intel/common/block/include/intelblocks/xhci.h b/src/soc/intel/common/block/include/intelblocks/xhci.h
new file mode 100644
index 0000000..9ea2312
--- /dev/null
+++ b/src/soc/intel/common/block/include/intelblocks/xhci.h
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SOC_INTEL_XHCI_H
+#define SOC_INTEL_XHCI_H
+
+void xhci_init(struct device *dev);
+
+#endif /* SOC_INTEL_XHCI_H */
+
diff --git a/src/soc/intel/common/block/xhci/Kconfig b/src/soc/intel/common/block/xhci/Kconfig
new file mode 100644
index 0000000..7070dd3
--- /dev/null
+++ b/src/soc/intel/common/block/xhci/Kconfig
@@ -0,0 +1,4 @@
+config SOC_INTEL_XHCI_DRIVER
+ bool
+ help
+ Intel Processor XHCI Driver support
diff --git a/src/soc/intel/common/block/xhci/Makefile.inc b/src/soc/intel/common/block/xhci/Makefile.inc
new file mode 100644
index 0000000..826f3da
--- /dev/null
+++ b/src/soc/intel/common/block/xhci/Makefile.inc
@@ -0,0 +1,7 @@
+ifeq ($(CONFIG_SOC_INTEL_XHCI_DRIVER),y)
+
+ramstage-y += xhci.c
+
+CPPFLAGS_common += -I$(src)/soc/intel/common/block/include
+
+endif
diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c
new file mode 100644
index 0000000..ca90376
--- /dev/null
+++ b/src/soc/intel/common/block/xhci/xhci.c
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ * Copyright (C) 2015 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <arch/io.h>
+#include <intelblocks/xhci.h>
+
+__attribute__((weak)) void xhci_init(struct device *dev) { /* no-op */ }
+
+static struct device_operations usb_xhci_ops = {
+ .read_resources = &pci_dev_read_resources,
+ .set_resources = &pci_dev_set_resources,
+ .enable_resources = &pci_dev_enable_resources,
+ .init = xhci_init,
+};
+
+static const unsigned short pci_device_ids[] = {
+ 0x5aa8, /* ApolloLake */
+ 0x31a8, /* GLK */
+ 0x9d2f, /* SunRisePoint LP */
+ 0
+};
+
+static const struct pci_driver pch_usb_xhci __pci_driver = {
+ .ops = &usb_xhci_ops,
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .devices = pci_device_ids,
+};