Youness Alaoui (snifikino(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18409
-gerrit
commit a49a9cca9ff31e8ee0dd6b2265cf685259bbffe3
Author: Youness Alaoui <kakaroto(a)kakaroto.homelinux.net>
Date: Tue Feb 7 13:59:29 2017 -0500
purism/librem13: Fix M.2 issues.
The M.2 SSD is on the SATA port 3, which also required the DTLE setting
to be set.
This fixes issues with the M.2 SSD not being detected/stable.
Change-Id: Id39d9ec395a2d9d32be4c079678d0708f08b3935
---
src/mainboard/purism/librem13/devicetree.cb | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mainboard/purism/librem13/devicetree.cb b/src/mainboard/purism/librem13/devicetree.cb
index 6bc5521..072e212 100644
--- a/src/mainboard/purism/librem13/devicetree.cb
+++ b/src/mainboard/purism/librem13/devicetree.cb
@@ -24,6 +24,7 @@ chip soc/intel/broadwell
# Port 0 tuning for link stability
register "sata_port0_gen3_dtle" = "9"
+ register "sata_port3_gen3_dtle" = "9"
device cpu_cluster 0 on
device lapic 0 on end
the following patch was just integrated into master:
commit 658a6dc78de74509d977f71664592e8a77cdec97
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Fri Feb 17 17:27:51 2017 -0800
google/eve: Set touchscreen I2C bus speed to 1MHz
Enable Fast-Plus speed for the touchscreen device so it can
be used at 1MHz instead of 400KHz.
BUG=chrome-os-partner:61277
TEST=manual testing on Eve P1, needs backported kernel patches
to actually make use of any I2C speed other than 400KHz
Change-Id: I3f44ff4a02a02a7b05e69ad54d4c6d60e5878393
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/18397
Reviewed-by: Furquan Shaikh <furquan(a)google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See https://review.coreboot.org/18397 for details.
-gerrit
the following patch was just integrated into master:
commit 5492bfb55c5cec410a78a6050e8b27a2419ff914
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Fri Feb 17 17:40:10 2017 -0800
google/eve: Add audio devices
Add the audio devices to Eve mainboard:
- Describe Maxim 98927 speaker amps and RT5663 headphone codec
in ACPI so they can be enumerated by the OS.
- Supply NHLT binaries for MAX98927, RT5663, and DMIC_4CH.
BUG=chrome-os-partner:61009
TEST=manual testing on Eve P1 with updated kernel to ensure that
both speakers and headset are functional. DMIC support is
is still being worked on and is not yet functional.
Change-Id: I5243e35d159a0ed15c6004e94ba5a50b28cff0a9
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/18398
Reviewed-by: Furquan Shaikh <furquan(a)google.com>
Tested-by: build bot (Jenkins)
See https://review.coreboot.org/18398 for details.
-gerrit
Duncan Laurie (dlaurie(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18397
-gerrit
commit dfba2951494807d07adbcad60d85288bc259563f
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Fri Feb 17 17:27:51 2017 -0800
google/eve: Set touchscreen I2C bus speed to 1MHz
Enable Fast-Plus speed for the touchscreen device so it can
be used at 1MHz instead of 400KHz.
BUG=chrome-os-partner:61277
TEST=manual testing on Eve P1, needs backported kernel patches
to actually make use of any I2C speed other than 400KHz
Change-Id: I3f44ff4a02a02a7b05e69ad54d4c6d60e5878393
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
---
src/mainboard/google/eve/devicetree.cb | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb
index 9d46915..e5744e3 100644
--- a/src/mainboard/google/eve/devicetree.cb
+++ b/src/mainboard/google/eve/devicetree.cb
@@ -210,6 +210,7 @@ chip soc/intel/skylake
register "generic.cid" = "PNP0C50_CID"
register "generic.desc" = "WCOM_DT_DESC"
register "generic.irq" = "IRQ_LEVEL_LOW(GPP_E7_IRQ)"
+ register "generic.speed" = "I2C_SPEED_FAST_PLUS"
register "hid_desc_reg_offset" = "0x1"
device i2c 0a on end
end
the following patch was just integrated into master:
commit cee930a39b183260ea83ac72fc9ca59d61353d8d
Author: Tobias Diedrich <ranma+openocd(a)tdiedrich.de>
Date: Sun Feb 12 14:09:06 2017 +0100
lenovo/s230u: Add Thinkpad Twist (S230U)
Created using autoport plus some manual work and copying from G505S to
account for the non-H8 EC.
This model uses the same ENE KB9012 EC as the G505S.
Tested:
- Mainboard variant with 8GB Elpida DDR3
- SeaBIOS payload
- Booting into Linux 4.9.6 with Debian/unstable installed on the
internal HDD/SDD slot
- Native raminit
- Both native VGA init and option rom VGA init
- Basic TPM functionality (auto-detection and RNG)
- Battery status readout
- Basic ACPI functions (power button event; power-off; reboot)
- thinkpad-acpi hotkey functions
- thinkpad-acpi LED control (red thinkpad LED)
- Suspend to RAM and resume works
- Mini displayport output works
Known issues:
- Patches needed for EC battery support
https://review.coreboot.org/#/c/18348/https://review.coreboot.org/#/c/18349/
- No thermal zone since temperature sensing is not H8-compatible
and needs to be reverse engineered.
Not tested:
- msata/wwan (probably works)
Signed-off-by: Tobias Diedrich <ranma+coreboot(a)tdiedrich.de>
Change-Id: I52bc4515277e5c18afbb14a80a9ac788049f485c
Reviewed-on: https://review.coreboot.org/18351
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Rudolph <siro(a)das-labor.org>
See https://review.coreboot.org/18351 for details.
-gerrit
Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18407
-gerrit
commit b6f8a050448fa36742006a978aab6ee59e1a7066
Author: Martin Roth <martinroth(a)google.com>
Date: Thu Feb 9 18:06:16 2017 -0800
src/vboot: add valid license headers to all files
Change-Id: I77d7d6048fee9b378aa04c1a62b830e08f95ec22
Signed-off-by: Martin Roth <martinroth(a)google.com>
---
src/vboot/secdata_mock.c | 16 ++++++++++++++--
src/vboot/secdata_tpm.c | 16 ++++++++++++++--
2 files changed, 28 insertions(+), 4 deletions(-)
diff --git a/src/vboot/secdata_mock.c b/src/vboot/secdata_mock.c
index 31fa598..70454db 100644
--- a/src/vboot/secdata_mock.c
+++ b/src/vboot/secdata_mock.c
@@ -1,7 +1,19 @@
/* Copyright (c) 2015 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
*
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE..
+ */
+
+/*
* Functions for querying, manipulating and locking rollback indices
* stored in the TPM NVRAM.
*/
diff --git a/src/vboot/secdata_tpm.c b/src/vboot/secdata_tpm.c
index 4c1e128..0fdee85 100644
--- a/src/vboot/secdata_tpm.c
+++ b/src/vboot/secdata_tpm.c
@@ -1,7 +1,19 @@
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
*
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE..
+ */
+
+/*
* Functions for querying, manipulating and locking rollback indices
* stored in the TPM NVRAM.
*/
Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18406
-gerrit
commit dc386ee6504fd0c3a0e6db26aaad580242de8d62
Author: Martin Roth <martinroth(a)google.com>
Date: Thu Feb 9 18:05:08 2017 -0800
src/mainboard/digitallogic: Add license headers to all files
Change-Id: I6a1810360b5c3210038670aea6e80312798a63cd
Signed-off-by: Martin Roth <martinroth(a)google.com>
---
src/mainboard/digitallogic/msm800sev/romstage.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c
index 93c00cc..059c49b 100644
--- a/src/mainboard/digitallogic/msm800sev/romstage.c
+++ b/src/mainboard/digitallogic/msm800sev/romstage.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include <stdint.h>
#include <stdlib.h>
#include <device/pci_def.h>