coreboot-gerrit December 2017

coreboot-gerrit@coreboot.org

1 participants
1557 discussions

Change in coreboot[master]: soc/amd/common: Make reading AGESA event log static
by build bot (Jenkins) (Code Review) 15 Dec '17

15 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22884 ) Change subject: soc/amd/common: Make reading AGESA event log static ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19344/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64555/ : SUCCESS -- To view, visit https://review.coreboot.org/22884 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I402c75e4d65a592b9d1557c5852df03e48e206b9 Gerrit-Change-Number: 22884 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Dec 2017 00:48:35 +0000 Gerrit-HasComments: No

1 0

Change in coreboot[master]: soc/amd/common: Move InitPost printed results
by build bot (Jenkins) (Code Review) 15 Dec '17

15 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22887 ) Change subject: soc/amd/common: Move InitPost printed results ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19347/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64558/ : SUCCESS -- To view, visit https://review.coreboot.org/22887 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6d288e76e7510528659436e61fdfa1d5db01f06c Gerrit-Change-Number: 22887 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Dec 2017 00:47:28 +0000 Gerrit-HasComments: No

1 0

Change in coreboot[master]: soc/amd/common/block/pi: Format files to standards
by build bot (Jenkins) (Code Review) 15 Dec '17

15 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22823 ) Change subject: soc/amd/common/block/pi: Format files to standards ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19343/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64554/ : SUCCESS -- To view, visit https://review.coreboot.org/22823 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iefe741cd62bc41a7975c3dd10ac9355352de3abb Gerrit-Change-Number: 22823 Gerrit-PatchSet: 3 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshall.dawson(a)se-eng.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Dec 2017 00:40:02 +0000 Gerrit-HasComments: No

1 0

Change in coreboot[master]: soc/amd/common: Improve misc. formatting in AGESA wrapper
by Marshall Dawson (Code Review) 15 Dec '17

15 Dec '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22889 Change subject: soc/amd/common: Improve misc. formatting in AGESA wrapper ...................................................................... soc/amd/common: Improve misc. formatting in AGESA wrapper Improve the file with: * C99 inializations for structures * reorder include files for aesthetics * remove extraneous whitespace * update comments This change clears up all remaining checkpatch issues with the wrapper with the exception of errors created with AMD definitions, e.g. ERROR: need consistent spacing around '*' (ctx:WxV) #32: FILE: src/soc/amd/common/block/pi/agesawrapper.c:32: void __attribute__((weak)) SetFchMidParams(FCH_INTERFACE *params) {} BUG=b:62240746 TEST=Build and boot Kahlee Change-Id: I40985e0cf50df6aa4d830937e7f6b6e7908f72fe Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/common/block/pi/agesawrapper.c 1 file changed, 69 insertions(+), 98 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/22889/1 diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c index 87dfd56..5e07939 100644 --- a/src/soc/amd/common/block/pi/agesawrapper.c +++ b/src/soc/amd/common/block/pi/agesawrapper.c @@ -13,15 +13,16 @@ * GNU General Public License for more details. */ -#include <amdblocks/agesawrapper.h> #include <arch/early_variables.h> #include <cbfs.h> #include <cbmem.h> #include <delay.h> -#include <cpu/x86/mtrr.h> -#include <amdblocks/BiosCallOuts.h> #include <string.h> #include <timestamp.h> +#include <cpu/x86/mtrr.h> +#include <soc/iomap.h> +#include <amdblocks/agesawrapper.h> +#include <amdblocks/BiosCallOuts.h> void __attribute__((weak)) SetFchResetParams(FCH_RESET_INTERFACE *params) {} void __attribute__((weak)) SetMemParams(AMD_POST_PARAMS *PostParams) {} @@ -73,22 +74,15 @@ AGESA_STATUS agesawrapper_amdinitreset(void) { AGESA_STATUS status; - AMD_INTERFACE_PARAMS AmdParamStruct; AMD_RESET_PARAMS AmdResetParams; - - memset(&AmdParamStruct, 0, sizeof(AmdParamStruct)); - memset(&AmdResetParams, 0, sizeof(AmdResetParams)); - - AmdParamStruct.AgesaFunctionName = AMD_INIT_RESET; - AmdParamStruct.AllocationMethod = ByHost; - AmdParamStruct.NewStructSize = sizeof(AMD_RESET_PARAMS); - AmdParamStruct.NewStructPtr = &AmdResetParams; - AmdParamStruct.StdHeader.AltImageBasePtr = 0; - AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout; - AmdParamStruct.StdHeader.Func = 0; - AmdParamStruct.StdHeader.ImageBasePtr = 0; - AmdCreateStruct (&AmdParamStruct); - + AMD_INTERFACE_PARAMS AmdParamStruct = { + .AgesaFunctionName = AMD_INIT_RESET, + .AllocationMethod = ByHost, + .NewStructSize = sizeof(AMD_RESET_PARAMS), + .NewStructPtr = &AmdResetParams, + .StdHeader.CalloutPtr = &GetBiosCallout + }; + AmdCreateStruct(&AmdParamStruct); SetFchResetParams(&AmdResetParams.FchInterface); timestamp_add_now(TS_AGESA_INIT_RESET_START); @@ -97,38 +91,34 @@ if (status != AGESA_SUCCESS) agesawrapper_readeventlog(AmdParamStruct.StdHeader.HeapStatus); - AmdReleaseStruct (&AmdParamStruct); + AmdReleaseStruct(&AmdParamStruct); return status; } AGESA_STATUS agesawrapper_amdinitearly(void) { AGESA_STATUS status; - AMD_INTERFACE_PARAMS AmdParamStruct; - AMD_EARLY_PARAMS *AmdEarlyParamsPtr; + AMD_EARLY_PARAMS *AmdEarlyParamsPtr; + AMD_INTERFACE_PARAMS AmdParamStruct = { + .AgesaFunctionName = AMD_INIT_EARLY, + .AllocationMethod = PreMemHeap, + .StdHeader.CalloutPtr = &GetBiosCallout, + }; - memset(&AmdParamStruct, 0, sizeof(AmdParamStruct)); - - AmdParamStruct.AgesaFunctionName = AMD_INIT_EARLY; - AmdParamStruct.AllocationMethod = PreMemHeap; - AmdParamStruct.StdHeader.AltImageBasePtr = 0; - AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout; - AmdParamStruct.StdHeader.Func = 0; - AmdParamStruct.StdHeader.ImageBasePtr = 0; - AmdCreateStruct (&AmdParamStruct); + AmdCreateStruct(&AmdParamStruct); AmdEarlyParamsPtr = (AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr; - OemCustomizeInitEarly (AmdEarlyParamsPtr); + OemCustomizeInitEarly(AmdEarlyParamsPtr); AmdEarlyParamsPtr->GnbConfig.PsppPolicy = PsppDisabled; timestamp_add_now(TS_AGESA_INIT_EARLY_START); - status = AmdInitEarly ((AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr); + status = AmdInitEarly((AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr); timestamp_add_now(TS_AGESA_INIT_EARLY_DONE); if (status != AGESA_SUCCESS) agesawrapper_readeventlog(AmdParamStruct.StdHeader.HeapStatus); - AmdReleaseStruct (&AmdParamStruct); + AmdReleaseStruct(&AmdParamStruct); return status; } @@ -173,21 +163,16 @@ AGESA_STATUS agesawrapper_amdinitpost(void) { AGESA_STATUS status; - AMD_INTERFACE_PARAMS AmdParamStruct; - AMD_POST_PARAMS *PostParams; + AMD_INTERFACE_PARAMS AmdParamStruct = { + .AgesaFunctionName = AMD_INIT_POST, + .AllocationMethod = PreMemHeap, + .StdHeader.CalloutPtr = &GetBiosCallout, + }; + AMD_POST_PARAMS *PostParams; - memset(&AmdParamStruct, 0, sizeof(AmdParamStruct)); + AmdCreateStruct(&AmdParamStruct); - AmdParamStruct.AgesaFunctionName = AMD_INIT_POST; - AmdParamStruct.AllocationMethod = PreMemHeap; - AmdParamStruct.StdHeader.AltImageBasePtr = 0; - AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout; - AmdParamStruct.StdHeader.Func = 0; - AmdParamStruct.StdHeader.ImageBasePtr = 0; - - AmdCreateStruct (&AmdParamStruct); PostParams = (AMD_POST_PARAMS *)AmdParamStruct.NewStructPtr; - PostParams->MemConfig.UmaMode = CONFIG_GFXUMA ? UMA_AUTO : UMA_NONE; PostParams->MemConfig.UmaSize = 0; PostParams->MemConfig.BottomIo = (UINT16) @@ -202,7 +187,7 @@ ); timestamp_add_now(TS_AGESA_INIT_POST_START); - status = AmdInitPost (PostParams); + status = AmdInitPost(PostParams); timestamp_add_now(TS_AGESA_INIT_POST_DONE); /* @@ -221,7 +206,7 @@ if (status != AGESA_SUCCESS) agesawrapper_readeventlog(PostParams->StdHeader.HeapStatus); - AmdReleaseStruct (&AmdParamStruct); + AmdReleaseStruct(&AmdParamStruct); return status; } @@ -229,38 +214,37 @@ AGESA_STATUS agesawrapper_amdinitenv(void) { AGESA_STATUS status; - AMD_INTERFACE_PARAMS AmdParamStruct; - AMD_ENV_PARAMS *EnvParam; + AMD_INTERFACE_PARAMS AmdParamStruct = { + .AgesaFunctionName = AMD_INIT_ENV, + .AllocationMethod = PostMemDram, + .StdHeader.CalloutPtr = &GetBiosCallout, + }; + AMD_ENV_PARAMS *EnvParam; - memset(&AmdParamStruct, 0, sizeof(AmdParamStruct)); - - AmdParamStruct.AgesaFunctionName = AMD_INIT_ENV; - AmdParamStruct.AllocationMethod = PostMemDram; - AmdParamStruct.StdHeader.AltImageBasePtr = 0; - AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout; - AmdParamStruct.StdHeader.Func = 0; - AmdParamStruct.StdHeader.ImageBasePtr = 0; - status = AmdCreateStruct (&AmdParamStruct); + status = AmdCreateStruct(&AmdParamStruct); EnvParam = (AMD_ENV_PARAMS *)AmdParamStruct.NewStructPtr; SetFchEnvParams(&EnvParam->FchInterface); SetNbEnvParams(&EnvParam->GnbEnvConfiguration); timestamp_add_now(TS_AGESA_INIT_ENV_START); - status = AmdInitEnv (EnvParam); + status = AmdInitEnv(EnvParam); timestamp_add_now(TS_AGESA_INIT_ENV_DONE); if (status != AGESA_SUCCESS) agesawrapper_readeventlog(EnvParam->StdHeader.HeapStatus); - /* Initialize Subordinate Bus Number and Secondary Bus Number + /* + * FIXME: what is this old comment? D18F0x18 is the Graphics Doorbell + * Base Address + * Initialize Subordinate Bus Number and Secondary Bus Number * In platform BIOS this address is allocated by PCI enumeration code - Modify D1F0x18 - */ + * Modify D1F0x18 + */ return status; } -VOID* agesawrapper_getlateinitptr (int pick) +VOID *agesawrapper_getlateinitptr(int pick) { switch (pick) { case PICK_DMI: @@ -289,34 +273,29 @@ AGESA_STATUS agesawrapper_amdinitmid(void) { AGESA_STATUS status; - AMD_INTERFACE_PARAMS AmdParamStruct; + AMD_INTERFACE_PARAMS AmdParamStruct = { + .AgesaFunctionName = AMD_INIT_MID, + .AllocationMethod = PostMemDram, + .StdHeader.CalloutPtr = &GetBiosCallout, + }; AMD_MID_PARAMS *MidParam; /* Enable MMIO on AMD CPU Address Map Controller */ - amd_initcpuio (); + amd_initcpuio(); - memset(&AmdParamStruct, 0, sizeof(AmdParamStruct)); - - AmdParamStruct.AgesaFunctionName = AMD_INIT_MID; - AmdParamStruct.AllocationMethod = PostMemDram; - AmdParamStruct.StdHeader.AltImageBasePtr = 0; - AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout; - AmdParamStruct.StdHeader.Func = 0; - AmdParamStruct.StdHeader.ImageBasePtr = 0; - - AmdCreateStruct (&AmdParamStruct); + AmdCreateStruct(&AmdParamStruct); MidParam = (AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr; SetFchMidParams(&MidParam->FchInterface); SetNbMidParams(&MidParam->GnbMidConfiguration); timestamp_add_now(TS_AGESA_INIT_MID_START); - status = AmdInitMid ((AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr); + status = AmdInitMid((AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr); timestamp_add_now(TS_AGESA_INIT_MID_DONE); if (status != AGESA_SUCCESS) agesawrapper_readeventlog(AmdParamStruct.StdHeader.HeapStatus); - AmdReleaseStruct (&AmdParamStruct); + AmdReleaseStruct(&AmdParamStruct); return status; } @@ -324,21 +303,16 @@ AGESA_STATUS agesawrapper_amdinitlate(void) { AGESA_STATUS Status; - AMD_INTERFACE_PARAMS AmdParamStruct; + AMD_INTERFACE_PARAMS AmdParamStruct = { + .AgesaFunctionName = AMD_INIT_LATE, + .AllocationMethod = PostMemDram, + .StdHeader.CalloutPtr = &GetBiosCallout, + .StdHeader.HeapStatus = HEAP_SYSTEM_MEM, + }; AMD_LATE_PARAMS *AmdLateParams; - memset(&AmdParamStruct, 0, sizeof(AmdParamStruct)); - - AmdParamStruct.AgesaFunctionName = AMD_INIT_LATE; - AmdParamStruct.AllocationMethod = PostMemDram; - AmdParamStruct.StdHeader.AltImageBasePtr = 0; - AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout; - AmdParamStruct.StdHeader.HeapStatus = HEAP_SYSTEM_MEM; - AmdParamStruct.StdHeader.Func = 0; - AmdParamStruct.StdHeader.ImageBasePtr = 0; - - /* NOTE: if not call amdcreatestruct, the initializer(AmdInitLateInitializer) would not be called */ AmdCreateStruct(&AmdParamStruct); + AmdLateParams = (AMD_LATE_PARAMS *)AmdParamStruct.NewStructPtr; timestamp_add_now(TS_AGESA_INIT_LATE_START); @@ -369,11 +343,8 @@ return Status; } -AGESA_STATUS agesawrapper_amdlaterunaptask ( - UINT32 Func, - UINTN Data, - VOID *ConfigPtr - ) +AGESA_STATUS agesawrapper_amdlaterunaptask(UINT32 Func, UINTN Data, + VOID *ConfigPtr) { AGESA_STATUS Status; AP_EXE_PARAMS ApExeParams; @@ -387,7 +358,7 @@ ApExeParams.FunctionNumber = Func; ApExeParams.RelatedDataBlock = ConfigPtr; - Status = AmdLateRunApTask (&ApExeParams); + Status = AmdLateRunApTask(&ApExeParams); if (Status != AGESA_SUCCESS) { /* agesawrapper_readeventlog(); */ ASSERT(Status == AGESA_SUCCESS); @@ -425,10 +396,10 @@ region_device_sz(rdev) - metadata_sz); } -const void *agesawrapper_locate_module (const CHAR8 name[8]) +const void *agesawrapper_locate_module(const CHAR8 name[8]) { - const void* agesa; - const AMD_IMAGE_HEADER* image; + const void *agesa; + const AMD_IMAGE_HEADER *image; struct region_device rdev; size_t file_size; const char *fname = CONFIG_AGESA_CBFS_NAME; -- To view, visit https://review.coreboot.org/22889 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I40985e0cf50df6aa4d830937e7f6b6e7908f72fe Gerrit-Change-Number: 22889 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

1 0

Change in coreboot[master]: soc/amd/common: Move InitPost printed results
by Marshall Dawson (Code Review) 15 Dec '17

15 Dec '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22887 Change subject: soc/amd/common: Move InitPost printed results ...................................................................... soc/amd/common: Move InitPost printed results Make a static function that can report the AmdInitPost() results. This makes it easier to keep lines within 80 columns. Clean up surrounding source. BUG=b:62240746 TEST=Build and boot Kahlee Change-Id: I6d288e76e7510528659436e61fdfa1d5db01f06c Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/common/block/pi/agesawrapper.c 1 file changed, 46 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/22887/1 diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c index 4a3e527..a4e1a17 100644 --- a/src/soc/amd/common/block/pi/agesawrapper.c +++ b/src/soc/amd/common/block/pi/agesawrapper.c @@ -133,6 +133,43 @@ return status; } +static void print_init_post_settings(AMD_POST_PARAMS *parms) +{ + u64 syslimit, bottomio, uma_size, uma_start; + const char *uma_auto = "UMA_AUTO"; + const char *uma_specified = "UMA_SPECIFIED"; + const char *uma_none = "UMA_NONE"; + const char *uma_unknown = "unknown"; + const char *mode; + + switch (parms->MemConfig.UmaMode) { + case UMA_AUTO: + mode = uma_auto; + break; + case UMA_SPECIFIED: + mode = uma_specified; + break; + case UMA_NONE: + mode = uma_none; + break; + default: + mode = uma_unknown; + break; + } + + syslimit = (u64)parms->MemConfig.SysLimit * 64 * KiB; + bottomio = (u64)parms->MemConfig.BottomIo * 64 * KiB; + + uma_size = (u64)parms->MemConfig.UmaSize * 64 * KiB; + uma_start = (u64)parms->MemConfig.UmaBase * 64 * KiB; + + printk(BIOS_SPEW, "AGESA set: umamode %s\n", mode); + printk(BIOS_SPEW, " : syslimit 0x%llx, bottomio 0x%08llx\n", + syslimit, bottomio); + printk(BIOS_SPEW, " : uma size %lluMB, uma start 0x%08llx\n", + uma_size / MiB, uma_start); +} + AGESA_STATUS agesawrapper_amdinitpost(void) { AGESA_STATUS status; @@ -168,35 +205,19 @@ status = AmdInitPost (PostParams); timestamp_add_now(TS_AGESA_INIT_POST_DONE); - /* If UMA is enabled we currently have it below TOP_MEM as well. + /* + * If UMA is enabled we currently have it below TOP_MEM as well. * UMA may or may not be cacheable, so Sub4GCacheTop could be - * higher than UmaBase. With UMA_NONE we see UmaBase==0. */ + * higher than UmaBase. With UMA_NONE we see UmaBase==0. + */ + uintptr_t top; if (PostParams->MemConfig.UmaBase) - backup_top_of_low_cacheable(PostParams->MemConfig.UmaBase << 16); + top = PostParams->MemConfig.UmaBase << 16; else - backup_top_of_low_cacheable(PostParams->MemConfig.Sub4GCacheTop); + top = PostParams->MemConfig.Sub4GCacheTop; + backup_top_of_low_cacheable(top); - - printk( - BIOS_SPEW, - "setup_uma_memory: umamode %s\n", - (PostParams->MemConfig.UmaMode == UMA_AUTO) ? "UMA_AUTO" : - (PostParams->MemConfig.UmaMode == UMA_SPECIFIED) ? "UMA_SPECIFIED" : - (PostParams->MemConfig.UmaMode == UMA_NONE) ? "UMA_NONE" : - "unknown" - ); - printk( - BIOS_SPEW, - "setup_uma_memory: syslimit 0x%08llX, bottomio 0x%08lx\n", - (unsigned long long)(PostParams->MemConfig.SysLimit) << 16, - (unsigned long)(PostParams->MemConfig.BottomIo) << 16 - ); - printk( - BIOS_SPEW, - "setup_uma_memory: uma size %luMB, uma start 0x%08lx\n", - (unsigned long)(PostParams->MemConfig.UmaSize) >> (20 - 16), - (unsigned long)(PostParams->MemConfig.UmaBase) << 16 - ); + print_init_post_settings(PostParams); if (status != AGESA_SUCCESS) agesawrapper_readeventlog(PostParams->StdHeader.HeapStatus); -- To view, visit https://review.coreboot.org/22887 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I6d288e76e7510528659436e61fdfa1d5db01f06c Gerrit-Change-Number: 22887 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

1 0

Change in coreboot[master]: soc/amd/common: Uncomment InitLate AmdReleaseStruct()
by Marshall Dawson (Code Review) 15 Dec '17

15 Dec '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22888 Change subject: soc/amd/common: Uncomment InitLate AmdReleaseStruct() ...................................................................... soc/amd/common: Uncomment InitLate AmdReleaseStruct() The AGESA spec states that "Failure to release a structure can cause undesired outcomes." Uncomment the call so that the structure is released. BUG=b:70671742 TEST=Build and boot Kahlee, inspect console log Change-Id: Ib1ff94ec2acdc845c5e4b4ed7088061cfc0c55f3 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/common/block/pi/agesawrapper.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/22888/1 diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c index a4e1a17..87dfd56 100644 --- a/src/soc/amd/common/block/pi/agesawrapper.c +++ b/src/soc/amd/common/block/pi/agesawrapper.c @@ -365,7 +365,7 @@ car_get_var(AcpiWheaMce), car_get_var(AcpiWheaCmc), car_get_var(AcpiAlib), car_get_var(AcpiIvrs)); - /* AmdReleaseStruct (&AmdParamStruct); */ + AmdReleaseStruct(&AmdParamStruct); return Status; } -- To view, visit https://review.coreboot.org/22888 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ib1ff94ec2acdc845c5e4b4ed7088061cfc0c55f3 Gerrit-Change-Number: 22888 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

1 0

Change in coreboot[master]: soc/amd: Move stoneyridge features out of agesawrapper
by Marshall Dawson (Code Review) 15 Dec '17

15 Dec '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22886 Change subject: soc/amd: Move stoneyridge features out of agesawrapper ...................................................................... soc/amd: Move stoneyridge features out of agesawrapper The AGESA wrapper should not use and CONFIG_STONEY* values, nor should it make any assumptions about the capabilities of a particular device. Move these into stoneyridge northbridge and southbridge files. BUG=b:70670425 TEST=Build and run Kahlee Change-Id: I706edbb6a048b64389ba3077d5df0fe6155070b3 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/common/block/include/amdblocks/agesawrapper.h M src/soc/amd/common/block/pi/agesawrapper.c M src/soc/amd/stoneyridge/northbridge.c M src/soc/amd/stoneyridge/southbridge.c 4 files changed, 59 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/22886/1 diff --git a/src/soc/amd/common/block/include/amdblocks/agesawrapper.h b/src/soc/amd/common/block/include/amdblocks/agesawrapper.h index d16e9ff..70e6830 100644 --- a/src/soc/amd/common/block/include/amdblocks/agesawrapper.h +++ b/src/soc/amd/common/block/include/amdblocks/agesawrapper.h @@ -54,7 +54,12 @@ VOID amd_initcpuio(void); const void *agesawrapper_locate_module(const CHAR8 name[8]); +void SetFchResetParams(FCH_RESET_INTERFACE *params); void OemPostParams(AMD_POST_PARAMS *PostParams); void SetMemParams(AMD_POST_PARAMS *PostParams); +void SetFchEnvParams(FCH_INTERFACE *params); +void SetNbEnvParams(GNB_ENV_CONFIGURATION *params); +void SetFchMidParams(FCH_INTERFACE *params); +void SetNbMidParams(GNB_MID_CONFIGURATION *params); #endif /* __AGESAWRAPPER_H__ */ diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c index c6ff89e..4a3e527 100644 --- a/src/soc/amd/common/block/pi/agesawrapper.c +++ b/src/soc/amd/common/block/pi/agesawrapper.c @@ -23,8 +23,13 @@ #include <string.h> #include <timestamp.h> +void __attribute__((weak)) SetFchResetParams(FCH_RESET_INTERFACE *params) {} void __attribute__((weak)) SetMemParams(AMD_POST_PARAMS *PostParams) {} void __attribute__((weak)) OemPostParams(AMD_POST_PARAMS *PostParams) {} +void __attribute__((weak)) SetFchEnvParams(FCH_INTERFACE *params) {} +void __attribute__((weak)) SetNbEnvParams(GNB_ENV_CONFIGURATION *params) {} +void __attribute__((weak)) SetFchMidParams(FCH_INTERFACE *params) {} +void __attribute__((weak)) SetNbMidParams(GNB_MID_CONFIGURATION *params) {} /* ACPI table pointers returned by AmdInitLate */ static void *DmiTable CAR_GLOBAL; @@ -84,10 +89,7 @@ AmdParamStruct.StdHeader.ImageBasePtr = 0; AmdCreateStruct (&AmdParamStruct); - AmdResetParams.FchInterface.Xhci0Enable = IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE); - - AmdResetParams.FchInterface.SataEnable = !((CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3)); - AmdResetParams.FchInterface.IdeEnable = (CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3); + SetFchResetParams(&AmdResetParams.FchInterface); timestamp_add_now(TS_AGESA_INIT_RESET_START); status = AmdInitReset(&AmdResetParams); @@ -218,14 +220,10 @@ AmdParamStruct.StdHeader.Func = 0; AmdParamStruct.StdHeader.ImageBasePtr = 0; status = AmdCreateStruct (&AmdParamStruct); - EnvParam = (AMD_ENV_PARAMS *)AmdParamStruct.NewStructPtr; - EnvParam->FchInterface.AzaliaController = AzEnable; - EnvParam->FchInterface.SataClass = CONFIG_STONEYRIDGE_SATA_MODE; - EnvParam->FchInterface.SataEnable = !((CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3)); - EnvParam->FchInterface.IdeEnable = (CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3); - EnvParam->FchInterface.SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE == 3); - EnvParam->GnbEnvConfiguration.IommuSupport = FALSE; + EnvParam = (AMD_ENV_PARAMS *)AmdParamStruct.NewStructPtr; + SetFchEnvParams(&EnvParam->FchInterface); + SetNbEnvParams(&EnvParam->GnbEnvConfiguration); timestamp_add_now(TS_AGESA_INIT_ENV_START); status = AmdInitEnv (EnvParam); @@ -286,16 +284,10 @@ AmdParamStruct.StdHeader.ImageBasePtr = 0; AmdCreateStruct (&AmdParamStruct); + MidParam = (AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr; - - MidParam->GnbMidConfiguration.iGpuVgaMode = 0;/* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */ - MidParam->GnbMidConfiguration.GnbIoapicAddress = 0xFEC20000; - - MidParam->FchInterface.AzaliaController = AzEnable; - MidParam->FchInterface.SataClass = CONFIG_STONEYRIDGE_SATA_MODE; - MidParam->FchInterface.SataEnable = !((CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3)); - MidParam->FchInterface.IdeEnable = (CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3); - MidParam->FchInterface.SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE == 3); + SetFchMidParams(&MidParam->FchInterface); + SetNbMidParams(&MidParam->GnbMidConfiguration); timestamp_add_now(TS_AGESA_INIT_MID_START); status = AmdInitMid ((AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr); diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 27b5388..aa33118 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -30,9 +30,11 @@ #include <device/pci_ids.h> #include <amdblocks/agesawrapper.h> #include <amdblocks/agesawrapper_call.h> +#include <agesa_headers.h> #include <soc/northbridge.h> #include <soc/southbridge.h> #include <soc/pci_devs.h> +#include <soc/iomap.h> #include <stdint.h> #include <stdlib.h> #include <string.h> @@ -556,3 +558,15 @@ return new_vendev; } + +void SetNbEnvParams(GNB_ENV_CONFIGURATION *params) +{ + params->IommuSupport = FALSE; +} + +void SetNbMidParams(GNB_MID_CONFIGURATION *params) +{ + /* 0=Primary and decode all VGA resources, 1=Secondary - decode none */ + params->iGpuVgaMode = 0; + params->GnbIoapicAddress = IO_APIC2_ADDR; +} diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index a9081f8..ea17a39 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -31,6 +31,34 @@ #include <fchec.h> #include <delay.h> #include <soc/pci_devs.h> +#include <agesa_headers.h> + +static int is_sata_config(void) +{ + return !((CONFIG_STONEYRIDGE_SATA_MODE == SataNativeIde) + || (CONFIG_STONEYRIDGE_SATA_MODE == SataLegacyIde)); +} + +void SetFchResetParams(FCH_RESET_INTERFACE *params) +{ + params->Xhci0Enable = IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE); + params->SataEnable = is_sata_config(); + params->IdeEnable = !is_sata_config(); +} + +void SetFchEnvParams(FCH_INTERFACE *params) +{ + params->AzaliaController = AzEnable; + params->SataClass = CONFIG_STONEYRIDGE_SATA_MODE; + params->SataEnable = is_sata_config(); + params->IdeEnable = !is_sata_config(); + params->SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE == SataLegacyIde); +} + +void SetFchMidParams(FCH_INTERFACE *params) +{ + SetFchEnvParams(params); +} /* * Table of APIC register index and associated IRQ name. Using IDX_XXX_NAME -- To view, visit https://review.coreboot.org/22886 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I706edbb6a048b64389ba3077d5df0fe6155070b3 Gerrit-Change-Number: 22886 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

1 0

Change in coreboot[master]: soc/amd/common: Make AGESA wrapper build in any stage
by Marshall Dawson (Code Review) 15 Dec '17

15 Dec '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22885 Change subject: soc/amd/common: Make AGESA wrapper build in any stage ...................................................................... soc/amd/common: Make AGESA wrapper build in any stage Convert the global variables to CAR_GLOBALs and modify their access methods. Remove all checks for __PRE_RAM__. BUG=b:70671590 TEST=Build and boot Kahlee Change-Id: I7a35141f212f340c157d57fde8daf93c0c383af8 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/common/block/pi/agesawrapper.c 1 file changed, 31 insertions(+), 39 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/22885/1 diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c index b9931d2..c6ff89e 100644 --- a/src/soc/amd/common/block/pi/agesawrapper.c +++ b/src/soc/amd/common/block/pi/agesawrapper.c @@ -26,19 +26,16 @@ void __attribute__((weak)) SetMemParams(AMD_POST_PARAMS *PostParams) {} void __attribute__((weak)) OemPostParams(AMD_POST_PARAMS *PostParams) {} -#ifndef __PRE_RAM__ /* ACPI table pointers returned by AmdInitLate */ -static void *DmiTable; -static void *AcpiPstate; -static void *AcpiSrat; -static void *AcpiSlit; - -static void *AcpiWheaMce; -static void *AcpiWheaCmc; -static void *AcpiAlib; -static void *AcpiIvrs; -static void *AcpiCrat; -#endif /* #ifndef __PRE_RAM__ */ +static void *DmiTable CAR_GLOBAL; +static void *AcpiPstate CAR_GLOBAL; +static void *AcpiSrat CAR_GLOBAL; +static void *AcpiSlit CAR_GLOBAL; +static void *AcpiWheaMce CAR_GLOBAL; +static void *AcpiWheaCmc CAR_GLOBAL; +static void *AcpiAlib CAR_GLOBAL; +static void *AcpiIvrs CAR_GLOBAL; +static void *AcpiCrat CAR_GLOBAL; static AGESA_STATUS agesawrapper_readeventlog(UINT8 HeapStatus) { @@ -244,33 +241,31 @@ return status; } -#ifndef __PRE_RAM__ VOID* agesawrapper_getlateinitptr (int pick) { switch (pick) { case PICK_DMI: - return DmiTable; + return car_get_var(DmiTable); case PICK_PSTATE: - return AcpiPstate; + return car_get_var(AcpiPstate); case PICK_SRAT: - return AcpiSrat; + return car_get_var(AcpiSrat); case PICK_SLIT: - return AcpiSlit; + return car_get_var(AcpiSlit); case PICK_WHEA_MCE: - return AcpiWheaMce; + return car_get_var(AcpiWheaMce); case PICK_WHEA_CMC: - return AcpiWheaCmc; + return car_get_var(AcpiWheaCmc); case PICK_ALIB: - return AcpiAlib; + return car_get_var(AcpiAlib); case PICK_IVRS: - return AcpiIvrs; + return car_get_var(AcpiIvrs); case PICK_CRAT: - return AcpiCrat; + return car_get_var(AcpiCrat); default: return NULL; } } -#endif /* #ifndef __PRE_RAM__ */ AGESA_STATUS agesawrapper_amdinitmid(void) { @@ -313,7 +308,6 @@ return status; } -#ifndef __PRE_RAM__ AGESA_STATUS agesawrapper_amdinitlate(void) { AGESA_STATUS Status; @@ -343,26 +337,24 @@ ASSERT(Status == AGESA_SUCCESS); } - DmiTable = AmdLateParams->DmiTable; - AcpiPstate = AmdLateParams->AcpiPState; + car_set_var(DmiTable, AmdLateParams->DmiTable); + car_set_var(AcpiPstate, AmdLateParams->AcpiPState); + car_set_var(AcpiWheaMce, AmdLateParams->AcpiWheaMce); + car_set_var(AcpiWheaCmc, AmdLateParams->AcpiWheaCmc); + car_set_var(AcpiAlib, AmdLateParams->AcpiAlib); + car_set_var(AcpiIvrs, AmdLateParams->AcpiIvrs); + car_set_var(AcpiCrat, AmdLateParams->AcpiCrat); - AcpiWheaMce = AmdLateParams->AcpiWheaMce; - AcpiWheaCmc = AmdLateParams->AcpiWheaCmc; - AcpiAlib = AmdLateParams->AcpiAlib; - AcpiIvrs = AmdLateParams->AcpiIvrs; - AcpiCrat = AmdLateParams->AcpiCrat; - - printk(BIOS_DEBUG, "DmiTable:%x, AcpiPstatein: %x, AcpiSrat:%x," - "AcpiSlit:%x, Mce:%x, Cmc:%x," - "Alib:%x, AcpiIvrs:%x in %s\n", - (unsigned int)DmiTable, (unsigned int)AcpiPstate, (unsigned int)AcpiSrat, - (unsigned int)AcpiSlit, (unsigned int)AcpiWheaMce, (unsigned int)AcpiWheaCmc, - (unsigned int)AcpiAlib, (unsigned int)AcpiIvrs, __func__); + printk(BIOS_SPEW, "\tDmiTable %p, AcpiPstatein %p, AcpiSrat %p\n\t" + "AcpiSlit %p, Mce %p, Cmc %p, Alib %p, AcpiIvrs %p\n", + car_get_var(DmiTable), car_get_var(AcpiPstate), + car_get_var(AcpiSrat), car_get_var(AcpiSlit), + car_get_var(AcpiWheaMce), car_get_var(AcpiWheaCmc), + car_get_var(AcpiAlib), car_get_var(AcpiIvrs)); /* AmdReleaseStruct (&AmdParamStruct); */ return Status; } -#endif /* #ifndef __PRE_RAM__ */ AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, -- To view, visit https://review.coreboot.org/22885 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I7a35141f212f340c157d57fde8daf93c0c383af8 Gerrit-Change-Number: 22885 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

1 0

Change in coreboot[master]: soc/amd/common: Make reading AGESA event log static
by Marshall Dawson (Code Review) 15 Dec '17

15 Dec '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22884 Change subject: soc/amd/common: Make reading AGESA event log static ...................................................................... soc/amd/common: Make reading AGESA event log static The function agesawrapper_amdreadeventlog() is only called from within agesawrapper.c. Make it a static function and: * shorten the name to help keep lines within 80 columns * convert initializers to C99 * break the call from the callers' if() statements * streamline the printk formatting BUG=b:70671442 TEST=Build and run Kahlee, check console log Change-Id: I402c75e4d65a592b9d1557c5852df03e48e206b9 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/common/block/include/amdblocks/agesawrapper.h M src/soc/amd/common/block/pi/agesawrapper.c 2 files changed, 40 insertions(+), 31 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/22884/1 diff --git a/src/soc/amd/common/block/include/amdblocks/agesawrapper.h b/src/soc/amd/common/block/include/amdblocks/agesawrapper.h index 08ac596..d16e9ff 100644 --- a/src/soc/amd/common/block/include/amdblocks/agesawrapper.h +++ b/src/soc/amd/common/block/include/amdblocks/agesawrapper.h @@ -40,7 +40,6 @@ AGESA_STATUS agesawrapper_amdinitlate(void); AGESA_STATUS agesawrapper_amdinitpost(void); AGESA_STATUS agesawrapper_amdinitmid(void); -AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus); void *agesawrapper_getlateinitptr(int pick); AGESA_STATUS agesawrapper_amdlaterunaptask(UINT32 Func, UINTN Data, void *ConfigPtr); diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c index cc57207..b9931d2 100644 --- a/src/soc/amd/common/block/pi/agesawrapper.c +++ b/src/soc/amd/common/block/pi/agesawrapper.c @@ -40,6 +40,34 @@ static void *AcpiCrat; #endif /* #ifndef __PRE_RAM__ */ +static AGESA_STATUS agesawrapper_readeventlog(UINT8 HeapStatus) +{ + AGESA_STATUS Status; + EVENT_PARAMS AmdEventParams = { + .StdHeader.CalloutPtr = &GetBiosCallout, + .StdHeader.HeapStatus = HeapStatus, + }; + + Status = AmdReadEventLog(&AmdEventParams); + if (AmdEventParams.EventClass) + printk(BIOS_DEBUG, "AGESA Event Log:\n"); + + while (AmdEventParams.EventClass != 0) { + printk(BIOS_DEBUG, " Class = %x, Info = %x," + " Param1 = 0x%x, Param2 = 0x%x" + " Param3 = 0x%x, Param4 = 0x%x\n", + (u32)AmdEventParams.EventClass, + (u32)AmdEventParams.EventInfo, + (u32)AmdEventParams.DataParam1, + (u32)AmdEventParams.DataParam2, + (u32)AmdEventParams.DataParam3, + (u32)AmdEventParams.DataParam4); + Status = AmdReadEventLog(&AmdEventParams); + } + + return Status; +} + AGESA_STATUS agesawrapper_amdinitreset(void) { AGESA_STATUS status; @@ -68,7 +96,8 @@ status = AmdInitReset(&AmdResetParams); timestamp_add_now(TS_AGESA_INIT_RESET_DONE); - if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); + if (status != AGESA_SUCCESS) + agesawrapper_readeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); return status; } @@ -98,7 +127,8 @@ status = AmdInitEarly ((AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr); timestamp_add_now(TS_AGESA_INIT_EARLY_DONE); - if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); + if (status != AGESA_SUCCESS) + agesawrapper_readeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); return status; @@ -169,7 +199,8 @@ (unsigned long)(PostParams->MemConfig.UmaBase) << 16 ); - if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(PostParams->StdHeader.HeapStatus); + if (status != AGESA_SUCCESS) + agesawrapper_readeventlog(PostParams->StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); return status; @@ -203,7 +234,8 @@ status = AmdInitEnv (EnvParam); timestamp_add_now(TS_AGESA_INIT_ENV_DONE); - if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(EnvParam->StdHeader.HeapStatus); + if (status != AGESA_SUCCESS) + agesawrapper_readeventlog(EnvParam->StdHeader.HeapStatus); /* Initialize Subordinate Bus Number and Secondary Bus Number * In platform BIOS this address is allocated by PCI enumeration code Modify D1F0x18 @@ -274,7 +306,8 @@ status = AmdInitMid ((AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr); timestamp_add_now(TS_AGESA_INIT_MID_DONE); - if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); + if (status != AGESA_SUCCESS) + agesawrapper_readeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); return status; @@ -306,7 +339,7 @@ timestamp_add_now(TS_AGESA_INIT_LATE_DONE); if (Status != AGESA_SUCCESS) { - agesawrapper_amdreadeventlog(AmdLateParams->StdHeader.HeapStatus); + agesawrapper_readeventlog(AmdLateParams->StdHeader.HeapStatus); ASSERT(Status == AGESA_SUCCESS); } @@ -351,31 +384,8 @@ Status = AmdLateRunApTask (&ApExeParams); if (Status != AGESA_SUCCESS) { - /* agesawrapper_amdreadeventlog(); */ + /* agesawrapper_readeventlog(); */ ASSERT(Status == AGESA_SUCCESS); - } - - return Status; -} - -AGESA_STATUS agesawrapper_amdreadeventlog (UINT8 HeapStatus) -{ - AGESA_STATUS Status; - EVENT_PARAMS AmdEventParams; - - memset(&AmdEventParams, 0, sizeof(AmdEventParams)); - - AmdEventParams.StdHeader.AltImageBasePtr = 0; - AmdEventParams.StdHeader.CalloutPtr = &GetBiosCallout; - AmdEventParams.StdHeader.Func = 0; - AmdEventParams.StdHeader.ImageBasePtr = 0; - AmdEventParams.StdHeader.HeapStatus = HeapStatus; - Status = AmdReadEventLog (&AmdEventParams); - while (AmdEventParams.EventClass != 0) { - printk(BIOS_DEBUG,"\nEventLog: EventClass = %x, EventInfo = %x.\n", (unsigned int)AmdEventParams.EventClass,(unsigned int)AmdEventParams.EventInfo); - printk(BIOS_DEBUG," Param1 = %x, Param2 = %x.\n",(unsigned int)AmdEventParams.DataParam1, (unsigned int)AmdEventParams.DataParam2); - printk(BIOS_DEBUG," Param3 = %x, Param4 = %x.\n",(unsigned int)AmdEventParams.DataParam3, (unsigned int)AmdEventParams.DataParam4); - Status = AmdReadEventLog (&AmdEventParams); } return Status; -- To view, visit https://review.coreboot.org/22884 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I402c75e4d65a592b9d1557c5852df03e48e206b9 Gerrit-Change-Number: 22884 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

1 0

Change in coreboot[master]: soc/amd/common: Update agesawrapper_call.h
by build bot (Jenkins) (Code Review) 15 Dec '17

15 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22850 ) Change subject: soc/amd/common: Update agesawrapper_call.h ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19339/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64550/ : SUCCESS -- To view, visit https://review.coreboot.org/22850 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic51917d3961a51d4e725ff45b04f45eefe149855 Gerrit-Change-Number: 22850 Gerrit-PatchSet: 4 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 15 Dec 2017 00:14:37 +0000 Gerrit-HasComments: No

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit December 2017