coreboot-gerrit December 2017

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Change in coreboot[master]: amd/stoneyridge: Skip VGA initialization on S3 resume
by Marshall Dawson (Code Review) 05 Dec '17

05 Dec '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22718 Change subject: amd/stoneyridge: Skip VGA initialization on S3 resume ...................................................................... amd/stoneyridge: Skip VGA initialization on S3 resume Sync with the other AMD implementations. Change-Id: I222cc7fcf5e58f451cee9621a1b876346226af09 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/stoneyridge/Kconfig 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/22718/1 diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 3ca0e39..bb8562d 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -131,6 +131,10 @@ string default "3rdparty/blobs/northbridge/amd/00670F00/VBIOS.bin" +config S3_VGA_ROM_RUN + bool + default n + config RAMTOP hex default 0x1000000 -- To view, visit https://review.coreboot.org/22718 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I222cc7fcf5e58f451cee9621a1b876346226af09 Gerrit-Change-Number: 22718 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

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Change in coreboot[master]: soc/amd/common: Rename spi.c and add prototype
by Marshall Dawson (Code Review) 05 Dec '17

05 Dec '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22716 Change subject: soc/amd/common: Rename spi.c and add prototype ...................................................................... soc/amd/common: Rename spi.c and add prototype The common/spi.c file contains a function for storing S3 data into flash during POST. In preparation for supporting S3, rename the file and add a prototype for the one function. Also change its build dependency to CONFIG_HAVE_ACPI_RESUME. This will be the only mechanism for supporting S3 in subsequent patches. BUG=b:69930455 Change-Id: I6545ac1c0a04202af63be269d88c091121358bc9 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/common/Makefile.inc R src/soc/amd/common/s3_resume.c A src/soc/amd/common/s3_resume.h 3 files changed, 22 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/22716/1 diff --git a/src/soc/amd/common/Makefile.inc b/src/soc/amd/common/Makefile.inc index aa27512..926262c 100644 --- a/src/soc/amd/common/Makefile.inc +++ b/src/soc/amd/common/Makefile.inc @@ -15,7 +15,7 @@ ramstage-y += amd_pci_util.c ramstage-y += def_callouts.c ramstage-y += heapmanager.c -ramstage-$(CONFIG_SPI_FLASH) += spi.c +ramstage-$(CONFIG_HAVE_ACPI_RESUME) += s3_resume.c subdirs-$(CONFIG_SOC_AMD_COMMON_BLOCK) += block diff --git a/src/soc/amd/common/spi.c b/src/soc/amd/common/s3_resume.c similarity index 100% rename from src/soc/amd/common/spi.c rename to src/soc/amd/common/s3_resume.c diff --git a/src/soc/amd/common/s3_resume.h b/src/soc/amd/common/s3_resume.h new file mode 100644 index 0000000..39a0712 --- /dev/null +++ b/src/soc/amd/common/s3_resume.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011-2017 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __S3_RESUME_H__ +#define __S3_RESUME_H__ + +void spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len); + +#endif /* __S3_RESUME_H__ */ -- To view, visit https://review.coreboot.org/22716 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I6545ac1c0a04202af63be269d88c091121358bc9 Gerrit-Change-Number: 22716 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

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Change in coreboot[master]: intel/i440bx: Correct RAM init programming
by build bot (Jenkins) (Code Review) 05 Dec '17

05 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22687 ) Change subject: intel/i440bx: Correct RAM init programming ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/64090/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/18924/ : SUCCESS -- To view, visit https://review.coreboot.org/22687 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib8c21489338643e13f69bd58008d14733796d4d0 Gerrit-Change-Number: 22687 Gerrit-PatchSet: 3 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Branden Waldner <scruffy99(a)gmail.com> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Dec 2017 16:59:21 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mb/google/poppy/variants/nautilus: add SPK DMIC nhlt support
by build bot (Jenkins) (Code Review) 05 Dec '17

05 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22457 ) Change subject: mb/google/poppy/variants/nautilus: add SPK DMIC nhlt support ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/64088/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/18922/ : SUCCESS -- To view, visit https://review.coreboot.org/22457 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie90af02e0935029f53f9020bd78027b6eb31a187 Gerrit-Change-Number: 22457 Gerrit-PatchSet: 4 Gerrit-Owner: Naveen Manohar <naveen.m(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Dec 2017 16:39:33 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: google/nautilus: Add Maxim98357a support
by build bot (Jenkins) (Code Review) 05 Dec '17

05 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22458 ) Change subject: google/nautilus: Add Maxim98357a support ...................................................................... Patch Set 5: Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/64089/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/18923/ : SUCCESS -- To view, visit https://review.coreboot.org/22458 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I958bf7c1395259b3e3fb30332882fd51a48dc0cc Gerrit-Change-Number: 22458 Gerrit-PatchSet: 5 Gerrit-Owner: Naveen Manohar <naveen.m(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Dec 2017 16:39:14 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: Revert "soc/intel/skylake: Clean up SoC ASL code."
by build bot (Jenkins) (Code Review) 05 Dec '17

05 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22684 ) Change subject: Revert "soc/intel/skylake: Clean up SoC ASL code." ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/64087/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/18921/ : SUCCESS -- To view, visit https://review.coreboot.org/22684 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I04819ff16ab4cb0d2ea6e1c7f47179f5dacb7cfd Gerrit-Change-Number: 22684 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Dec 2017 16:28:45 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: google/kahlee: Set USB OC pins
by build bot (Jenkins) (Code Review) 05 Dec '17

05 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22679 ) Change subject: google/kahlee: Set USB OC pins ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/64086/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/18920/ : SUCCESS -- To view, visit https://review.coreboot.org/22679 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5a9b3409d9c91b89fd02f8eecf9e04c435f14342 Gerrit-Change-Number: 22679 Gerrit-PatchSet: 2 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Dec 2017 16:25:28 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/amd/stoneyridge: Add XHCI PM register access functions
by build bot (Jenkins) (Code Review) 05 Dec '17

05 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22677 ) Change subject: soc/amd/stoneyridge: Add XHCI PM register access functions ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/64084/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/18918/ : SUCCESS -- To view, visit https://review.coreboot.org/22677 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I81b4c0a448eb17c5ee0562a2c3548a074d533a98 Gerrit-Change-Number: 22677 Gerrit-PatchSet: 2 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Dec 2017 16:24:23 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/amd/stoneyridge: Add USB OC support
by build bot (Jenkins) (Code Review) 05 Dec '17

05 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22678 ) Change subject: soc/amd/stoneyridge: Add USB OC support ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/64085/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/18919/ : SUCCESS -- To view, visit https://review.coreboot.org/22678 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie54c7a2baa78f21cf1cd30d5ed70c8c832cf3674 Gerrit-Change-Number: 22678 Gerrit-PatchSet: 2 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Dec 2017 16:23:33 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: google/nautilus: Add Maxim98357a support
by build bot (Jenkins) (Code Review) 05 Dec '17

05 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22458 ) Change subject: google/nautilus: Add Maxim98357a support ...................................................................... Patch Set 4: Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/64082/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/18916/ : SUCCESS -- To view, visit https://review.coreboot.org/22458 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I958bf7c1395259b3e3fb30332882fd51a48dc0cc Gerrit-Change-Number: 22458 Gerrit-PatchSet: 4 Gerrit-Owner: Naveen Manohar <naveen.m(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Dec 2017 16:15:36 +0000 Gerrit-HasComments: No

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coreboot-gerrit December 2017