Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18034
-gerrit
commit 6ae26e293e611408eff9c6946e8f3c3380c77caf
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Wed Jan 4 21:59:42 2017 +0100
libpayload: timer: cast cpu_khz to make sure 64bit math is used
Change-Id: Iaf84de2330b433076a66c22fa72ffb45e957c0dc
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Found-by: Coverity Scan #1261177
---
payloads/libpayload/drivers/timer/rdtsc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/payloads/libpayload/drivers/timer/rdtsc.c b/payloads/libpayload/drivers/timer/rdtsc.c
index 4a425a5..9607b66 100644
--- a/payloads/libpayload/drivers/timer/rdtsc.c
+++ b/payloads/libpayload/drivers/timer/rdtsc.c
@@ -37,7 +37,7 @@
uint64_t timer_hz(void)
{
- return lib_sysinfo.cpu_khz * 1000;
+ return (uint64_t)lib_sysinfo.cpu_khz * 1000;
}
uint64_t timer_raw_value(void)
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18033
-gerrit
commit 27333e5add4915724aa0ec53fa59f06b18d8e588
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Wed Jan 4 21:47:19 2017 +0100
libpayload: ahci: avoid several memleaks when failing on init
Change-Id: If82a3c453dbd71470d06d2c77d54065b9206b0fd
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Found-by: Coverity Scan #1260719, #1260727, #1261090, #1261098
---
payloads/libpayload/drivers/storage/ahci.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/payloads/libpayload/drivers/storage/ahci.c b/payloads/libpayload/drivers/storage/ahci.c
index 0e7fd7d..d1dd1fa 100644
--- a/payloads/libpayload/drivers/storage/ahci.c
+++ b/payloads/libpayload/drivers/storage/ahci.c
@@ -121,11 +121,11 @@ static int ahci_dev_init(hba_ctrl_t *const ctrl,
/* Set command list base and received FIS base. */
if (ahci_cmdengine_stop(port))
- return 1;
+ goto _cleanup_ret;
port->cmdlist_base = virt_to_phys(cmdlist);
port->frameinfo_base = virt_to_phys(rcvd_fis);
if (ahci_cmdengine_start(port))
- return 1;
+ goto _cleanup_ret;
/* Put port into active state. */
port->cmd_stat |= HBA_PxCMD_ICC_ACTIVE;
@@ -177,15 +177,15 @@ _cleanup_ret:
/* Clean up (not reached for initialized devices). */
if (dev)
free(dev);
+ if (rcvd_fis)
+ free((void *)rcvd_fis);
+ if (cmdtable)
+ free((void *)cmdtable);
+ if (cmdlist)
+ free((void *)cmdlist);
if (!ahci_cmdengine_stop(port)) {
port->cmdlist_base = 0;
port->frameinfo_base = 0;
- if (rcvd_fis)
- free((void *)rcvd_fis);
- if (cmdtable)
- free((void *)cmdtable);
- if (cmdlist)
- free((void *)cmdlist);
}
return ret;
}
the following patch was just integrated into master:
commit cf84619dd66789454b14a1dccb7b6c11cbb5e80a
Author: Manoj Gupta <manojgupta(a)google.com>
Date: Mon Nov 14 11:19:30 2016 -0800
util/cbfstool: Fix to build with latest llvm
cbfs-payload-linux.c:255:43: note: add parentheses around left
hand side expression to silence this warning
if ((hdr->protocol_version >= 0x200) && (!hdr->loadflags & 1)) {
[pg: also fix the semantics. Thanks Nico for catching this]
BUG=chromium:665657
TEST=coreboot-utils builds
Change-Id: I025c784330885cce8ae43c44f9d938394af30ed5
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 35c4935f2a89c3d3b45213372bcf0474a60eda43
Original-Change-Id: I8758e7d158ca32e87107797f2a33b9d9a0e4676f
Original-Reviewed-on: https://chromium-review.googlesource.com/411335
Original-Commit-Ready: Manoj Gupta <manojgupta(a)chromium.org>
Original-Tested-by: Manoj Gupta <manojgupta(a)chromium.org>
Original-Reviewed-by: Mike Frysinger <vapier(a)chromium.org>
Reviewed-on: https://review.coreboot.org/17568
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h(a)gmx.de>
See https://review.coreboot.org/17568 for details.
-gerrit
the following patch was just integrated into master:
commit 4aeb2394e92b4bb1c9afc369ee482ff0c09c2a02
Author: Matt DeVillier <matt.devillier(a)gmail.com>
Date: Fri Dec 23 14:56:12 2016 -0600
google/auron: Fix omitted ACPI KB backlight for variants
Restores KB backlight functionality for auron variants
gandof, lulu, and samus.
TEST: boot Lulu and observe KB backlight functional
Change-Id: Iaa852f9327ff1690111db610b4cc5266cd7925b4
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
Reviewed-on: https://review.coreboot.org/17960
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/17960 for details.
-gerrit
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18014
-gerrit
commit 9a9c7bf3abd75d676befd8d362c1cd2412355f16
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Mon Jan 2 18:47:50 2017 +0100
util/romcc: avoid shifting more than the variable's width
That's undefined behavior in C
Change-Id: I671ed8abf02e57a7cc993d1a85354e905f51717d
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Found-by: Coverity Scan #1229557
---
util/romcc/romcc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/util/romcc/romcc.c b/util/romcc/romcc.c
index 4f6a6cb..33707b7 100644
--- a/util/romcc/romcc.c
+++ b/util/romcc/romcc.c
@@ -10021,13 +10021,13 @@ static void simplify_copy(struct compile_state *state, struct triple *ins)
/* Ensure I am properly sign extended */
if (size_of(state, right->type) < size_of(state, ins->type) &&
is_signed(right->type)) {
- long_t val;
+ uint64_t val;
int shift;
shift = SIZEOF_LONG - size_of(state, right->type);
val = left;
val <<= shift;
val >>= shift;
- left = val;
+ left = (ulong_t)val;
}
mkconst(state, ins, left);
break;
the following patch was just integrated into master:
commit 5e34752eb1573c3055b201c46f7ec207fdea1e48
Author: Lee Leahy <leroy.p.leahy(a)intel.com>
Date: Wed Jan 4 08:51:52 2017 -0800
vboot: Remove rmu.bin from FW_MAIN_A and FW_MAIN_B
Add rmu.bin to the list of files that exist only in the read-only
section (COREBOOT) of the SPI flash.
TEST=Build and run on Galileo Gen2.
Change-Id: I30cbd3fb2ef1848807e4de4c479dc7a561c1faba
Signed-off-by: Lee Leahy <leroy.p.leahy(a)intel.com>
Reviewed-on: https://review.coreboot.org/18031
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See https://review.coreboot.org/18031 for details.
-gerrit