coreboot-gerrit August 2016

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: Kconfig: lay groundwork for not assuming SPI flash boot device
by gerrit＠coreboot.org 17 Aug '16

17 Aug '16

the following patch was just integrated into master: commit 4a36c4e9fc66bf442f46e1e6d742b2d6c50a2ae1 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Thu Aug 11 11:02:26 2016 -0500 Kconfig: lay groundwork for not assuming SPI flash boot device Almost all boards and chipsets within the codebase assume or use SPI flash as the boot device. Therefore, provide an option for the boards/chipsets which don't currently support SPI flash as the boot device. The default is to assume SPI flash is the boot device unless otherwise instructed. This falls in line with the current assumptions, but it also allows one to differentiate a platform desiring SPI flash support while it not being the actual boot device. One thing to note is that while google/daisy does boot with SPI flash part no SPI API interfaces were ever implemented. Therefore, mark that board as not having a SPI boot device. BUG=chrome-os-partner:56151 Change-Id: Id4e0b4ec5e440e41421fbb6d0ca2be4185b62a6e Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://review.coreboot.org/16191 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan(a)google.com> See https://review.coreboot.org/16191 for details. -gerrit

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Patch merged into coreboot/master: util/docker: Update docker files for coreboot-sdk & jenkins builders
by gerrit＠coreboot.org 17 Aug '16

17 Aug '16

the following patch was just integrated into master: commit 2d97cb1be50acdf7e7604dd666d52cb9765de018 Author: Martin Roth <martinroth(a)google.com> Date: Mon May 16 11:27:56 2016 -0600 util/docker: Update docker files for coreboot-sdk & jenkins builders - Check out the specific toolchain version we want before building the toolchain (This version uses 1.42). - Add additional libraries and tools needed to build coreboot related packages. - Move everything required to build any of the coreboot or related packages into the coreboot-sdk from coreboot-jenkins-node Dockerfile. - Separate the text of the commands in the Dockerfiles. - Use nproc to get the number of processors for building the toolchain - Add some additional comments about why things are done the way that they are to the README - Update the version of coreboot-sdk that coreboot-jenkins-node uses to 1.42. (This matches the toolchain version) - Move ccache setup from jenkins-node to coreboot-sdk. - Update the maintainer. Change-Id: I293285ef72e3e70259355d924d425fea98ee773d Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/16239 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/16239 for details. -gerrit

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Patch set updated for coreboot: util/docker: Update docker files for coreboot-sdk & jenkins builders
by Martin Roth 17 Aug '16

17 Aug '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16239 -gerrit commit a9e266706539cbf09e0c6fbc9087e9b48040434e Author: Martin Roth <martinroth(a)google.com> Date: Mon May 16 11:27:56 2016 -0600 util/docker: Update docker files for coreboot-sdk & jenkins builders - Check out the specific toolchain version we want before building the toolchain (This version uses 1.42). - Add additional libraries and tools needed to build coreboot related packages. - Move everything required to build any of the coreboot or related packages into the coreboot-sdk from coreboot-jenkins-node Dockerfile. - Separate the text of the commands in the Dockerfiles. - Use nproc to get the number of processors for building the toolchain - Add some additional comments about why things are done the way that they are to the README - Update the version of coreboot-sdk that coreboot-jenkins-node uses to 1.42. (This matches the toolchain version) - Move ccache setup from jenkins-node to coreboot-sdk. - Update the maintainer. Change-Id: I293285ef72e3e70259355d924d425fea98ee773d Signed-off-by: Martin Roth <martinroth(a)google.com> --- util/docker/coreboot-jenkins-node/Dockerfile | 39 +++++++++++++++++----------- util/docker/coreboot-jenkins-node/README.md | 11 ++++++-- util/docker/coreboot-sdk/Dockerfile | 27 ++++++++++++++++--- 3 files changed, 56 insertions(+), 21 deletions(-) diff --git a/util/docker/coreboot-jenkins-node/Dockerfile b/util/docker/coreboot-jenkins-node/Dockerfile index b675f80..b60466d 100644 --- a/util/docker/coreboot-jenkins-node/Dockerfile +++ b/util/docker/coreboot-jenkins-node/Dockerfile @@ -1,21 +1,30 @@ -FROM coreboot/coreboot-sdk:1.37 -MAINTAINER Patrick Georgi <patrick(a)georgi-clan.de> +FROM coreboot/coreboot-sdk:1.42 +MAINTAINER Martin Roth <gaumless(a)gmail.com> USER root -ADD https://raw.githubusercontent.com/pgeorgi/encapsulate/master/encapsulate.c /tmp/encapsulate.c -COPY authorized_keys /home/coreboot/.ssh/authorized_keys -RUN mount |grep "on /dev type tmpfs" > /dev/null || exit 1 + +# Check to make sure /dev is a tmpfs file system +RUN mount | grep "on /dev type tmpfs" > /dev/null || exit 1 + RUN apt-get -y update && \ apt-get -y install \ - curl p7zip-full unrar-free libusb-1.0-0-dev pkg-config libreadline-dev libglib2.0-dev \ - subversion libpci-dev libusb-dev libftdi-dev \ - lua5.3 liblua5.3-dev \ - ccache openjdk-8-jre-headless openssh-server libssl-dev vim-common libgmp-dev && \ - apt-get clean && \ - mkdir /home/coreboot/.ccache && chown coreboot /home/coreboot/.ccache && \ - mkdir -p /home/coreboot/.ssh && chown -R coreboot /home/coreboot/.ssh && chmod 0700 /home/coreboot/.ssh && chmod 0600 /home/coreboot/.ssh/authorized_keys && \ - gcc -o /usr/sbin/encapsulate /tmp/encapsulate.c && chown root /usr/sbin/encapsulate && chmod +s /usr/sbin/encapsulate && \ - mkdir /var/run/sshd && chmod 0755 /var/run/sshd -VOLUME /home/coreboot/.ccache + lua5.3 liblua5.3-dev openjdk-8-jre-headless openssh-server && \ + apt-get clean + +COPY authorized_keys /home/coreboot/.ssh/authorized_keys +RUN chown -R coreboot /home/coreboot/.ssh && \ + chmod 0700 /home/coreboot/.ssh && \ + chmod 0600 /home/coreboot/.ssh/authorized_keys + +RUN mkdir /var/run/sshd && \ + chmod 0755 /var/run/sshd + +# Build encapsulate tool +ADD https://raw.githubusercontent.com/pgeorgi/encapsulate/master/encapsulate.c /tmp/encapsulate.c +RUN gcc -o /usr/sbin/encapsulate /tmp/encapsulate.c && \ + chown root /usr/sbin/encapsulate && \ + chmod +s /usr/sbin/encapsulate + + VOLUME /data/cache ENTRYPOINT mkdir /dev/cb-build && chown coreboot /dev/cb-build && /usr/sbin/sshd -p 49151 -D EXPOSE 49151 diff --git a/util/docker/coreboot-jenkins-node/README.md b/util/docker/coreboot-jenkins-node/README.md index 839ccb1..34162b2 100644 --- a/util/docker/coreboot-jenkins-node/README.md +++ b/util/docker/coreboot-jenkins-node/README.md @@ -1,3 +1,10 @@ -run with +This builds the coreboot tree in /dev/cb-build so that's a directory that uses +a tmpfs. This helps to speed up the build and doesn't write the output to +the SSD. - docker run --privileged --restart=always -d -p 49151:49151 -v $host/path/to/ccache:/home/coreboot/.ccache -v $host/path/to/data/cache:/data/cache coreboot/coreboot-jenkins-node +The encapsulate tool that the coreboot build runs under for security requires +that docker be run using the --privileged command to work correctly. + +Run with the command: + + docker run --privileged --restart=always -d -p 49151:49151 -v $host_path_to_ccache:/home/coreboot/.ccache -v $host_path_to_data_cache:/data/cache coreboot/coreboot-jenkins-node diff --git a/util/docker/coreboot-sdk/Dockerfile b/util/docker/coreboot-sdk/Dockerfile index 18c165d..cb0023c 100644 --- a/util/docker/coreboot-sdk/Dockerfile +++ b/util/docker/coreboot-sdk/Dockerfile @@ -1,15 +1,34 @@ FROM debian:sid -MAINTAINER Patrick Georgi <patrick(a)georgi-clan.de> +MAINTAINER Martin Roth <gaumless(a)gmail.com> + RUN \ useradd -p locked -m coreboot && \ apt-get -qq update && \ - apt-get -qqy install git gcc g++ make patch python diffutils bison flex m4 wget bzip2 libssl-dev libgmp-dev vim-common cmake xz-utils zlib1g-dev && \ - apt-get clean && \ + apt-get -qq upgrade && \ + apt-get -qqy install gcc g++ make patch python diffutils bison flex \ + git doxygen ccache subversion p7zip-full unrar-free \ + m4 wget curl bzip2 vim-common cmake xz-utils pkg-config \ + dh-autoreconf unifont \ + libssl-dev libgmp-dev zlib1g-dev libpci-dev liblzma-dev \ + libyaml-dev libncurses5-dev uuid-dev libusb-dev libftdi-dev \ + libusb-1.0-0-dev libreadline-dev libglib2.0-dev libgmp-dev \ + libelf-dev libxml2-dev libfreetype6-dev && \ + apt-get clean + +RUN \ cd /root && \ git clone http://review.coreboot.org/coreboot && \ cd coreboot/util/crossgcc && \ - make all_without_gdb CPUS=$(grep -c "^processor\>" /proc/cpuinfo) DEST=/opt/xgcc && \ + git checkout 589ef9de8fa && \ + make all_without_gdb CPUS=$(nproc) DEST=/opt/xgcc && \ cd /root && \ rm -rf coreboot + +RUN mkdir /home/coreboot/.ccache && \ + chown coreboot:coreboot /home/coreboot/.ccache && \ + mkdir /home/coreboot/cb_build && \ + chown coreboot:coreboot /home/coreboot/cb_build +VOLUME /home/coreboot/.ccache + ENV PATH $PATH:/opt/xgcc/bin USER coreboot

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Patch merged into coreboot/master: util/docker: Add docker files for coreboot-sdk & jenkins builders
by gerrit＠coreboot.org 17 Aug '16

17 Aug '16

the following patch was just integrated into master: commit f75d1dfad3691562110a70523ad892b8fa480064 Author: Martin Roth <martinroth(a)google.com> Date: Mon May 16 11:27:56 2016 -0600 util/docker: Add docker files for coreboot-sdk & jenkins builders Add the coreboot specific docker configuration files to the coreboot repo. These have been copied directly from Patrick's repo where they had been being stored. - coreboot-sdk: debian sid with the coreboot toolchain - coreboot-jenkins-node: built on top of the coreboot-sdk, adds the pieces required for building everything with the coreboot jenkins builders. Change-Id: I8628d4edb298264e814e02e124a8bfb4bc04e0c7 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/14830 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens <lynxis(a)fe80.eu> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/14830 for details. -gerrit

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New patch to review for coreboot: qemu-riscv: Remove obsolete CSR - send_ipi
by Martin Roth 17 Aug '16

17 Aug '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16244 -gerrit commit bc12d4123f202431ea2579e4dc708ded17983dc2 Author: Martin Roth <martinroth(a)google.com> Date: Wed Aug 17 21:51:28 2016 -0600 qemu-riscv: Remove obsolete CSR - send_ipi This aligns the code in qemu-riscv with the code in spike-riscv. The previous code gives an error in the updated toolchain as the send_ipi CSR is no longer valid. This gave the build error: src/mainboard/emulation/qemu-riscv/qemu_util.c:64: Error: Instruction csrw requires absolute expression Change-Id: Iac0f66e8e9935f45c8094d5e16bedb7ac5225424 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/mainboard/emulation/qemu-riscv/qemu_util.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/src/mainboard/emulation/qemu-riscv/qemu_util.c b/src/mainboard/emulation/qemu-riscv/qemu_util.c index 3c2941c..216eea9 100644 --- a/src/mainboard/emulation/qemu-riscv/qemu_util.c +++ b/src/mainboard/emulation/qemu-riscv/qemu_util.c @@ -56,14 +56,7 @@ uintptr_t mcall_query_memory(uintptr_t id, memory_block_info *p) uintptr_t mcall_send_ipi(uintptr_t recipient) { - //if (recipient >= num_harts) - //return -1; - - if (atomic_swap(&OTHER_HLS(recipient)->ipi_pending, 1) == 0) { - mb(); - write_csr(send_ipi, recipient); - } - + die("mcall_send_ipi is currently not implemented"); return 0; }

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Patch set updated for coreboot: util/lint: Add a tool to verify a single newline at the end of files
by Martin Roth 17 Aug '16

17 Aug '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15976 -gerrit commit 30f7c26f6a1449f054b8b631b84c7943aa950f90 Author: Martin Roth <martinroth(a)google.com> Date: Thu Jul 28 16:20:59 2016 -0600 util/lint: Add a tool to verify a single newline at the end of files This takes way too long to run - currently about 30 seconds to look at the entire coreboot tree. Change-Id: I403934014b422528715ea95ff652babe5e18c88b Signed-off-by: Martin Roth <martinroth(a)google.com> --- util/lint/lint-015-final-newlines | 52 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/util/lint/lint-015-final-newlines b/util/lint/lint-015-final-newlines new file mode 100755 index 0000000..f80912c --- /dev/null +++ b/util/lint/lint-015-final-newlines @@ -0,0 +1,52 @@ +#!/bin/sh +# This file is part of the coreboot project. +# +# Copyright (C) 2016 Google Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# DESCR: Check that files end with a single newline + +LC_ALL=C export LC_ALL + +EXCLUDED_DIRS='src/vendorcode/\|util/romcc/\|cbfstool/lzma/\|cbfstool/lz4/\|Documentation/\|build/\|3rdparty/\|\.git/\|coreboot-builds/\|util/nvidia/cbootimage/' +EXCLUDED_FILES='\.jpg$\|\.cksum$\|\.bin$\|\.hex$\|\.ico$\|\.o$\|\.bz2$\|\.xz$\|^.tmpconfig\|\.pyc$\|_shipped$\|sha256$' + +# Use git ls-files if the code is in a git repo, otherwise use find. +if [ -n "$(command -v git)" ] && [ -d .git ]; then + FIND_FILES="git ls-files" +else + FIND_FILES="find . " +fi + +test_for_final_newline() { + while read filename; do + # Only check non-executable regular files + if [ -f "$filename" ] && [ ! -x "$filename" ]; then + + # Verify that there is a newline at the end + # $() strips trailing newlines + if [ -n "$(tail -c 1 "$filename")" ]; then + echo "$filename has no final newline." + + # Verify that the file ends with only a single newline + # and that the file isn't empty + elif [ -z "$(tail -c 2 "$filename")" ] && \ + [ -n "$(head -n 5 "$filename")" ]; then + echo "$filename has multiple final newlines." + fi + fi + done +} + +${FIND_FILES} | sed 's|^\./||' | sort | \ + grep -v "$EXCLUDED_DIRS" | \ + grep -v "$EXCLUDED_FILES" | \ + test_for_final_newline

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Patch set updated for coreboot: google/reef: Configure NFC gpios correctly before entering sleep
by Furquan Shaikh 17 Aug '16

17 Aug '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16243 -gerrit commit 254b4ae8f7bcc719c8b7e3dd7fefc5de9f1999d4 Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Aug 17 16:18:05 2016 -0700 google/reef: Configure NFC gpios correctly before entering sleep Before entering sleep, ensure that the NFC gpios are configured correctly to avoid leakage. BUG=chrome-os-partner:56281 Change-Id: I2bb2e7ba468df445aa5f6c2b22ae0a74fcaa44f6 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/mainboard/google/reef/gpio.h | 6 ++++++ src/mainboard/google/reef/smihandler.c | 4 ++++ 2 files changed, 10 insertions(+) diff --git a/src/mainboard/google/reef/gpio.h b/src/mainboard/google/reef/gpio.h index be7f501..dbe7062 100644 --- a/src/mainboard/google/reef/gpio.h +++ b/src/mainboard/google/reef/gpio.h @@ -350,6 +350,12 @@ static const struct pad_config early_gpio_table[] = { PAD_CFG_NF(GPIO_129, UP_2K, DEEP, NF1), /* LPSS_I2C2_SCL */ }; +/* GPIO settings before entering sleep. */ +static const struct pad_config sleep_gpio_table[] = { + PAD_CFG_GPO(GPIO_150, 0, DEEP), /* NFC_RESET_ODL */ + PAD_CFG_GPI_APIC_LOW(GPIO_20, NONE, DEEP), /* NFC_INT_L */ +}; + /* * The proto boards didn't have memory SKU pins, but the same ones can be * utilized as post proto boards because the pins used were never connected diff --git a/src/mainboard/google/reef/smihandler.c b/src/mainboard/google/reef/smihandler.c index e26c176..d33222b 100644 --- a/src/mainboard/google/reef/smihandler.c +++ b/src/mainboard/google/reef/smihandler.c @@ -19,7 +19,9 @@ #include <ec/google/chromeec/smm.h> #include <soc/pm.h> #include <soc/smm.h> +#include <soc/gpio.h> #include "ec.h" +#include "gpio.h" void mainboard_smi_gpi_handler(const struct gpi_status *sts) { @@ -29,6 +31,8 @@ void mainboard_smi_gpi_handler(const struct gpi_status *sts) void mainboard_smi_sleep(u8 slp_typ) { + gpio_configure_pads(sleep_gpio_table, ARRAY_SIZE(sleep_gpio_table)); + if (slp_typ == ACPI_S3) enable_gpe(GPIO_TIER_1_SCI);

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Patch set updated for coreboot: intel/apollolake: Skip ITSS configuration in SMM
by Furquan Shaikh 17 Aug '16

17 Aug '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16242 -gerrit commit 52e5fa70a21c16da5a50eb33679c72ab5390e9b7 Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Aug 17 16:16:39 2016 -0700 intel/apollolake: Skip ITSS configuration in SMM In SMM, gpio configuration could be done to avoid leakage. ITSS configuration is not required when entering sleep. Thus, bail out early from itss configuration if in SMM. BUG=chrome-os-partner:56281 Change-Id: I4d8be0513aa202f001f980bb91986b50b8ed2a5b Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/soc/intel/apollolake/gpio.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/soc/intel/apollolake/gpio.c b/src/soc/intel/apollolake/gpio.c index 8b89dfd..8e4ff3e 100644 --- a/src/soc/intel/apollolake/gpio.c +++ b/src/soc/intel/apollolake/gpio.c @@ -72,6 +72,10 @@ static const struct pad_community *gpio_get_community(uint16_t pad) static void gpio_configure_itss(const struct pad_config *cfg, uint16_t port, uint16_t pad_cfg_offset) { + /* No ITSS configuration in SMM. */ + if (ENV_SMM) + return; + int irq; /* Set up ITSS polarity if pad is routed to APIC.

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New patch to review for coreboot: google/reef: Configure NFC gpios correctly before entering sleep
by Furquan Shaikh 17 Aug '16

17 Aug '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16243 -gerrit commit e318ceb27c669ed9dc3ba10a812b70bce5b12091 Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Aug 17 16:18:05 2016 -0700 google/reef: Configure NFC gpios correctly before entering sleep Before entering sleep, ensure that the NFC gpios are configured correctly to avoid leakage. BUG=chrome-os-partner:56281 Change-Id: I2bb2e7ba468df445aa5f6c2b22ae0a74fcaa44f6 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/mainboard/google/reef/gpio.h | 6 ++++++ src/mainboard/google/reef/smihandler.c | 4 ++++ 2 files changed, 10 insertions(+) diff --git a/src/mainboard/google/reef/gpio.h b/src/mainboard/google/reef/gpio.h index be7f501..dbe7062 100644 --- a/src/mainboard/google/reef/gpio.h +++ b/src/mainboard/google/reef/gpio.h @@ -350,6 +350,12 @@ static const struct pad_config early_gpio_table[] = { PAD_CFG_NF(GPIO_129, UP_2K, DEEP, NF1), /* LPSS_I2C2_SCL */ }; +/* GPIO settings before entering sleep. */ +static const struct pad_config sleep_gpio_table[] = { + PAD_CFG_GPO(GPIO_150, 0, DEEP), /* NFC_RESET_ODL */ + PAD_CFG_GPI_APIC_LOW(GPIO_20, NONE, DEEP), /* NFC_INT_L */ +}; + /* * The proto boards didn't have memory SKU pins, but the same ones can be * utilized as post proto boards because the pins used were never connected diff --git a/src/mainboard/google/reef/smihandler.c b/src/mainboard/google/reef/smihandler.c index e26c176..d33222b 100644 --- a/src/mainboard/google/reef/smihandler.c +++ b/src/mainboard/google/reef/smihandler.c @@ -19,7 +19,9 @@ #include <ec/google/chromeec/smm.h> #include <soc/pm.h> #include <soc/smm.h> +#include <soc/gpio.h> #include "ec.h" +#include "gpio.h" void mainboard_smi_gpi_handler(const struct gpi_status *sts) { @@ -29,6 +31,8 @@ void mainboard_smi_gpi_handler(const struct gpi_status *sts) void mainboard_smi_sleep(u8 slp_typ) { + gpio_configure_pads(sleep_gpio_table, ARRAY_SIZE(sleep_gpio_table)); + if (slp_typ == ACPI_S3) enable_gpe(GPIO_TIER_1_SCI);

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New patch to review for coreboot: intel/apollolake: Add itss.c to smm
by Furquan Shaikh 17 Aug '16

17 Aug '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16242 -gerrit commit ecfb71aa68a971b9501477427a05e7ffc881cb0d Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Aug 17 16:16:39 2016 -0700 intel/apollolake: Add itss.c to smm This is required for configuring gpios before entering sleep. BUG=chrome-os-partner:56281 Change-Id: I4d8be0513aa202f001f980bb91986b50b8ed2a5b Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/soc/intel/apollolake/Makefile.inc | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 6eb9d9a..f2ffdfd 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -41,6 +41,7 @@ romstage-y += spi.c smm-y += mmap_boot.c smm-y += pmutil.c smm-y += gpio.c +smm-y += itss.c smm-y += smihandler.c smm-y += spi.c smm-y += tsc_freq.c

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coreboot-gerrit August 2016