Patch set updated for coreboot: AGESA: Rewrite agesawrapper [NOTFORMERGE]
by Kyösti Mälkki 19 Apr '16
by Kyösti Mälkki 19 Apr '16
19 Apr '16
Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14418
-gerrit
commit ea7edc00015510ae0bde4c081b7db025e7937ba2
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Tue Apr 19 15:51:24 2016 +0300
AGESA: Rewrite agesawrapper [NOTFORMERGE]
Change-Id: Ic111291a2c0f1f171d2330c9ddaf6061a648bc86
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
src/northbridge/amd/agesa/agesawrapper.c | 254 ++++++++++++-------------------
1 file changed, 94 insertions(+), 160 deletions(-)
diff --git a/src/northbridge/amd/agesa/agesawrapper.c b/src/northbridge/amd/agesa/agesawrapper.c
index a72e239..19b7e33 100644
--- a/src/northbridge/amd/agesa/agesawrapper.c
+++ b/src/northbridge/amd/agesa/agesawrapper.c
@@ -25,60 +25,74 @@
static const struct OEM_HOOK *OemHook = &OemCustomize;
+
+static void prepare_AmdParams(AMD_INTERFACE_PARAMS *p, int f)
+{
+ memset(p, 0, sizeof(AMD_INTERFACE_PARAMS));
+ p->StdHeader.CalloutPtr = GetBiosCallout;
+ p->AgesaFunctionName = f;
+
+ p->AllocationMethod = 0; /* Only byHost makes difference. */
+}
+
+static void * empty_AmdParams(AMD_INTERFACE_PARAMS *p, int f)
+{
+ prepare_AmdParams(p, f);
+
+ AmdCreateStruct(p);
+ return (void *) p->NewStructPtr;
+}
+
+static void free_AmdParams(AMD_INTERFACE_PARAMS *p)
+{
+ AmdReleaseStruct(p);
+}
+
#if defined(__PRE_RAM__)
+static void * local_AmdParams(AMD_INTERFACE_PARAMS *p, int f, void *buf, size_t len)
+{
+ prepare_AmdParams(p, f);
+
+ memset(buf, 0, len);
+ p->NewStructPtr = buf;
+ p->NewStructSize = len;
+ p->AllocationMethod = ByHost;
+
+ AmdCreateStruct(p);
+ return (void *) p->NewStructPtr;
+}
+
AGESA_STATUS agesawrapper_amdinitreset(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
- AMD_RESET_PARAMS AmdResetParams;
-
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
- memset(&AmdResetParams, 0, sizeof(AMD_RESET_PARAMS));
-
- AmdParamStruct.AgesaFunctionName = AMD_INIT_RESET;
- AmdParamStruct.AllocationMethod = ByHost;
- AmdParamStruct.NewStructSize = sizeof(AMD_RESET_PARAMS);
- AmdParamStruct.NewStructPtr = &AmdResetParams;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
-
- AmdCreateStruct(&AmdParamStruct);
- AmdResetParams.HtConfig.Depth = 0;
-
- status = AmdInitReset((AMD_RESET_PARAMS *) AmdParamStruct.NewStructPtr);
- AGESA_EVENTLOG(status, &AmdParamStruct.StdHeader);
- AmdReleaseStruct(&AmdParamStruct);
+ AMD_INTERFACE_PARAMS aip;
+ AMD_RESET_PARAMS tmp;
+
+ AMD_RESET_PARAMS *AmdResetParams = local_AmdParams(&aip,
+ AMD_INIT_RESET, &tmp, sizeof(tmp));
+
+ AmdResetParams->HtConfig.Depth = 0;
+
+ status = AmdInitReset(AmdResetParams);
+ AGESA_EVENTLOG(status, &aip.StdHeader);
return status;
}
AGESA_STATUS agesawrapper_amdinitearly(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
- AMD_EARLY_PARAMS *AmdEarlyParamsPtr;
-
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
-
- AmdParamStruct.AgesaFunctionName = AMD_INIT_EARLY;
- AmdParamStruct.AllocationMethod = PreMemHeap;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
- AmdCreateStruct(&AmdParamStruct);
+ AMD_INTERFACE_PARAMS aip;
/* OEM Should Customize the defaults through this hook. */
- AmdEarlyParamsPtr = (AMD_EARLY_PARAMS *) AmdParamStruct.NewStructPtr;
+ AMD_EARLY_PARAMS *AmdEarlyParams = empty_AmdParams(&aip, AMD_INIT_EARLY);
if (OemHook->InitEarly)
- OemHook->InitEarly(AmdEarlyParamsPtr);
+ OemHook->InitEarly(AmdEarlyParams);
- status = AmdInitEarly(AmdEarlyParamsPtr);
- AGESA_EVENTLOG(status, &AmdParamStruct.StdHeader);
+ status = AmdInitEarly(AmdEarlyParams);
+ AGESA_EVENTLOG(status, &aip.StdHeader);
- AmdReleaseStruct(&AmdParamStruct);
+ free_AmdParams(&aip);
return status;
}
@@ -86,29 +100,17 @@ AGESA_STATUS agesawrapper_amdinitearly(void)
AGESA_STATUS agesawrapper_amdinitpost(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
- AMD_POST_PARAMS *PostParams;
-
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
-
- AmdParamStruct.AgesaFunctionName = AMD_INIT_POST;
- AmdParamStruct.AllocationMethod = PreMemHeap;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
-
- AmdCreateStruct(&AmdParamStruct);
+ AMD_INTERFACE_PARAMS aip;
/* OEM Should Customize the defaults through this hook. */
- PostParams = (AMD_POST_PARAMS *) AmdParamStruct.NewStructPtr;
+ AMD_POST_PARAMS *PostParams = empty_AmdParams(&aip, AMD_INIT_POST);
if (OemHook->InitPost)
OemHook->InitPost(PostParams);
status = AmdInitPost(PostParams);
AGESA_EVENTLOG(status, &PostParams->StdHeader);
- AmdReleaseStruct(&AmdParamStruct);
+ free_AmdParams(&aip);
/* Initialize heap space */
EmptyHeap();
@@ -119,29 +121,18 @@ AGESA_STATUS agesawrapper_amdinitpost(void)
AGESA_STATUS agesawrapper_amdinitresume(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
- AMD_RESUME_PARAMS *AmdResumeParamsPtr;
-
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
-
- AmdParamStruct.AgesaFunctionName = AMD_INIT_RESUME;
- AmdParamStruct.AllocationMethod = PreMemHeap;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
- AmdCreateStruct(&AmdParamStruct);
+ AMD_INTERFACE_PARAMS aip;
- AmdResumeParamsPtr = (AMD_RESUME_PARAMS *) AmdParamStruct.NewStructPtr;
+ AMD_RESUME_PARAMS *AmdResumeParams = empty_AmdParams(&aip, AMD_INIT_RESUME);
- AmdResumeParamsPtr->S3DataBlock.NvStorageSize = 0;
- AmdResumeParamsPtr->S3DataBlock.VolatileStorageSize = 0;
- OemInitResume(AmdResumeParamsPtr);
+ AmdResumeParams->S3DataBlock.NvStorageSize = 0;
+ AmdResumeParams->S3DataBlock.VolatileStorageSize = 0;
+ OemInitResume(AmdResumeParams);
- status = AmdInitResume(AmdResumeParamsPtr);
+ status = AmdInitResume(AmdResumeParams);
+ AGESA_EVENTLOG(status, &aip.StdHeader);
- AGESA_EVENTLOG(status, &AmdParamStruct.StdHeader);
- AmdReleaseStruct(&AmdParamStruct);
+ free_AmdParams(&aip);
return status;
}
@@ -149,55 +140,34 @@ AGESA_STATUS agesawrapper_amdinitresume(void)
AGESA_STATUS agesawrapper_amdinitenv(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
- AMD_ENV_PARAMS *EnvParam;
+ AMD_INTERFACE_PARAMS aip;
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
-
- AmdParamStruct.AgesaFunctionName = AMD_INIT_ENV;
- AmdParamStruct.AllocationMethod = PostMemDram;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
- AmdCreateStruct(&AmdParamStruct);
- EnvParam = (AMD_ENV_PARAMS *) AmdParamStruct.NewStructPtr;
+ AMD_ENV_PARAMS *EnvParam = empty_AmdParams(&aip, AMD_INIT_ENV);
status = AmdInitEnv(EnvParam);
AGESA_EVENTLOG(status, &EnvParam->StdHeader);
- AmdReleaseStruct(&AmdParamStruct);
+ free_AmdParams(&aip);
return status;
}
AGESA_STATUS agesawrapper_amds3laterestore(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdInterfaceParams;
- AMD_S3LATE_PARAMS AmdS3LateParams;
- AMD_S3LATE_PARAMS *AmdS3LateParamsPtr;
-
- memset(&AmdS3LateParams, 0, sizeof(AMD_S3LATE_PARAMS));
-
- AmdInterfaceParams.StdHeader.ImageBasePtr = 0;
- AmdInterfaceParams.AllocationMethod = ByHost;
- AmdInterfaceParams.AgesaFunctionName = AMD_S3LATE_RESTORE;
- AmdInterfaceParams.NewStructPtr = &AmdS3LateParams;
- AmdInterfaceParams.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdS3LateParamsPtr = &AmdS3LateParams;
- AmdInterfaceParams.NewStructSize = sizeof(AMD_S3LATE_PARAMS);
+ AMD_INTERFACE_PARAMS aip;
+ AMD_S3LATE_PARAMS tmp;
- AmdCreateStruct(&AmdInterfaceParams);
+ AMD_S3LATE_PARAMS *AmdS3LateParams = local_AmdParams(&aip,
+ AMD_S3LATE_RESTORE, &tmp, sizeof(tmp));
-#if 0
- /* TODO: What to do with NvStorage here? */
- AmdS3LateParamsPtr->S3DataBlock.NvStorageSize = 0;
+#if 0 /* TODO: What to do with NvStorage here? */
+ AmdS3LateParams->S3DataBlock.NvStorageSize = 0;
#endif
- AmdS3LateParamsPtr->S3DataBlock.VolatileStorageSize = 0;
- OemS3LateRestore(AmdS3LateParamsPtr);
+ AmdS3LateParams->S3DataBlock.VolatileStorageSize = 0;
+ OemS3LateRestore(AmdS3LateParams);
- status = AmdS3LateRestore(AmdS3LateParamsPtr);
- AGESA_EVENTLOG(status, &AmdInterfaceParams.StdHeader);
+ status = AmdS3LateRestore(AmdS3LateParams);
+ AGESA_EVENTLOG(status, &aip.StdHeader);
ASSERT(status == AGESA_SUCCESS);
return status;
@@ -208,28 +178,20 @@ AGESA_STATUS agesawrapper_amds3laterestore(void)
AGESA_STATUS agesawrapper_amdinitmid(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
- AMD_MID_PARAMS *MidParam;
-
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
-
- AmdParamStruct.AgesaFunctionName = AMD_INIT_MID;
- AmdParamStruct.AllocationMethod = PostMemDram;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
-
- AmdCreateStruct(&AmdParamStruct);
+ AMD_INTERFACE_PARAMS aip;
/* OEM Should Customize the defaults through this hook. */
- MidParam = (AMD_MID_PARAMS *) AmdParamStruct.NewStructPtr;
+ AMD_MID_PARAMS *MidParam = empty_AmdParams(&aip, AMD_INIT_MID);
if (OemHook->InitMid)
OemHook->InitMid(MidParam);
status = AmdInitMid(MidParam);
AGESA_EVENTLOG(status, &MidParam->StdHeader);
- AmdReleaseStruct(&AmdParamStruct);
+#if 0 /* TODO: Why not? */
+ ASSERT(status == AGESA_SUCCESS);
+#endif
+
+ free_AmdParams(&aip);
return status;
}
@@ -237,30 +199,19 @@ AGESA_STATUS agesawrapper_amdinitmid(void)
AGESA_STATUS agesawrapper_amdS3Save(void)
{
AGESA_STATUS status;
- AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr;
- AMD_INTERFACE_PARAMS AmdInterfaceParams;
-
- memset(&AmdInterfaceParams, 0, sizeof(AMD_INTERFACE_PARAMS));
+ AMD_INTERFACE_PARAMS aip;
- AmdInterfaceParams.StdHeader.ImageBasePtr = 0;
- AmdInterfaceParams.StdHeader.HeapStatus = HEAP_SYSTEM_MEM;
- AmdInterfaceParams.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdInterfaceParams.AllocationMethod = PostMemDram;
- AmdInterfaceParams.AgesaFunctionName = AMD_S3_SAVE;
- AmdInterfaceParams.StdHeader.AltImageBasePtr = 0;
- AmdInterfaceParams.StdHeader.Func = 0;
- AmdCreateStruct(&AmdInterfaceParams);
+ AMD_S3SAVE_PARAMS *AmdS3SaveParams = empty_AmdParams(&aip, AMD_S3_SAVE);
- AmdS3SaveParamsPtr = (AMD_S3SAVE_PARAMS *) AmdInterfaceParams.NewStructPtr;
- AmdS3SaveParamsPtr->StdHeader = AmdInterfaceParams.StdHeader;
+ AmdS3SaveParams->StdHeader = aip.StdHeader;
- status = AmdS3Save(AmdS3SaveParamsPtr);
- AGESA_EVENTLOG(status, &AmdInterfaceParams.StdHeader);
+ status = AmdS3Save(AmdS3SaveParams);
+ AGESA_EVENTLOG(status, &aip.StdHeader);
ASSERT(status == AGESA_SUCCESS);
- OemS3Save(AmdS3SaveParamsPtr);
+ OemS3Save(AmdS3SaveParams);
- AmdReleaseStruct(&AmdInterfaceParams);
+ free_AmdParams(&aip);
return status;
}
@@ -271,29 +222,15 @@ static AMD_LATE_PARAMS *AmdLateParams = NULL;
AGESA_STATUS agesawrapper_amdinitlate(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
+ AMD_INTERFACE_PARAMS aip;
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
+ AmdLateParams = empty_AmdParams(&aip, AMD_INIT_LATE);
- AmdParamStruct.AgesaFunctionName = AMD_INIT_LATE;
- AmdParamStruct.AllocationMethod = PostMemDram;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
-
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) || IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_RL) || \
- IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY16_KB)
- AmdParamStruct.StdHeader.HeapStatus = HEAP_SYSTEM_MEM;
-#endif
-
- AmdCreateStruct(&AmdParamStruct);
- AmdLateParams = (AMD_LATE_PARAMS *) AmdParamStruct.NewStructPtr;
status = AmdInitLate(AmdLateParams);
AGESA_EVENTLOG(status, &AmdLateParams->StdHeader);
ASSERT(status == AGESA_SUCCESS);
- /* No AmdReleaseStruct(&AmdParamStruct), we need AmdLateParams later. */
+ /* No free_AmdParams(&aip), we need AmdLateParams later. */
return status;
}
@@ -336,11 +273,8 @@ AGESA_STATUS agesawrapper_amdlaterunaptask(UINT32 Func, UINT32 Data, VOID * Conf
AP_EXE_PARAMS ApExeParams;
memset(&ApExeParams, 0, sizeof(AP_EXE_PARAMS));
-
- ApExeParams.StdHeader.AltImageBasePtr = 0;
ApExeParams.StdHeader.CalloutPtr = &GetBiosCallout;
- ApExeParams.StdHeader.Func = 0;
- ApExeParams.StdHeader.ImageBasePtr = 0;
+
ApExeParams.FunctionNumber = Func;
ApExeParams.RelatedDataBlock = ConfigPtr;
1
0
New patch to review for coreboot: AGESA: Rewrite agesawrapper [NOTFORMERGE]
by Kyösti Mälkki 19 Apr '16
by Kyösti Mälkki 19 Apr '16
19 Apr '16
Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14418
-gerrit
commit bc8f264bf1608bb6a4cebfd3da4ffdf869dae7c2
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Tue Apr 19 15:51:24 2016 +0300
AGESA: Rewrite agesawrapper [NOTFORMERGE]
Change-Id: Ic111291a2c0f1f171d2330c9ddaf6061a648bc86
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
src/northbridge/amd/agesa/agesawrapper.c | 254 ++++++++++++-------------------
1 file changed, 94 insertions(+), 160 deletions(-)
diff --git a/src/northbridge/amd/agesa/agesawrapper.c b/src/northbridge/amd/agesa/agesawrapper.c
index a72e239..19b7e33 100644
--- a/src/northbridge/amd/agesa/agesawrapper.c
+++ b/src/northbridge/amd/agesa/agesawrapper.c
@@ -25,60 +25,74 @@
static const struct OEM_HOOK *OemHook = &OemCustomize;
+
+static void prepare_AmdParams(AMD_INTERFACE_PARAMS *p, int f)
+{
+ memset(p, 0, sizeof(AMD_INTERFACE_PARAMS));
+ p->StdHeader.CalloutPtr = GetBiosCallout;
+ p->AgesaFunctionName = f;
+
+ p->AllocationMethod = 0; /* Only byHost makes difference. */
+}
+
+static void * empty_AmdParams(AMD_INTERFACE_PARAMS *p, int f)
+{
+ prepare_AmdParams(p, f);
+
+ AmdCreateStruct(p);
+ return (void *) p->NewStructPtr;
+}
+
+static void free_AmdParams(AMD_INTERFACE_PARAMS *p)
+{
+ AmdReleaseStruct(p);
+}
+
#if defined(__PRE_RAM__)
+static void * local_AmdParams(AMD_INTERFACE_PARAMS *p, int f, void *buf, size_t len)
+{
+ prepare_AmdParams(p, f);
+
+ memset(buf, 0, len);
+ p->NewStructPtr = buf;
+ p->NewStructSize = len;
+ p->AllocationMethod = ByHost;
+
+ AmdCreateStruct(p);
+ return (void *) p->NewStructPtr;
+}
+
AGESA_STATUS agesawrapper_amdinitreset(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
- AMD_RESET_PARAMS AmdResetParams;
-
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
- memset(&AmdResetParams, 0, sizeof(AMD_RESET_PARAMS));
-
- AmdParamStruct.AgesaFunctionName = AMD_INIT_RESET;
- AmdParamStruct.AllocationMethod = ByHost;
- AmdParamStruct.NewStructSize = sizeof(AMD_RESET_PARAMS);
- AmdParamStruct.NewStructPtr = &AmdResetParams;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
-
- AmdCreateStruct(&AmdParamStruct);
- AmdResetParams.HtConfig.Depth = 0;
-
- status = AmdInitReset((AMD_RESET_PARAMS *) AmdParamStruct.NewStructPtr);
- AGESA_EVENTLOG(status, &AmdParamStruct.StdHeader);
- AmdReleaseStruct(&AmdParamStruct);
+ AMD_INTERFACE_PARAMS aip;
+ AMD_RESET_PARAMS tmp;
+
+ AMD_RESET_PARAMS *AmdResetParams = local_AmdParams(&aip,
+ AMD_INIT_RESET, &tmp, sizeof(tmp));
+
+ AmdResetParams->HtConfig.Depth = 0;
+
+ status = AmdInitReset(AmdResetParams);
+ AGESA_EVENTLOG(status, &aip.StdHeader);
return status;
}
AGESA_STATUS agesawrapper_amdinitearly(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
- AMD_EARLY_PARAMS *AmdEarlyParamsPtr;
-
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
-
- AmdParamStruct.AgesaFunctionName = AMD_INIT_EARLY;
- AmdParamStruct.AllocationMethod = PreMemHeap;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
- AmdCreateStruct(&AmdParamStruct);
+ AMD_INTERFACE_PARAMS aip;
/* OEM Should Customize the defaults through this hook. */
- AmdEarlyParamsPtr = (AMD_EARLY_PARAMS *) AmdParamStruct.NewStructPtr;
+ AMD_EARLY_PARAMS *AmdEarlyParams = empty_AmdParams(&aip, AMD_INIT_EARLY);
if (OemHook->InitEarly)
- OemHook->InitEarly(AmdEarlyParamsPtr);
+ OemHook->InitEarly(AmdEarlyParams);
- status = AmdInitEarly(AmdEarlyParamsPtr);
- AGESA_EVENTLOG(status, &AmdParamStruct.StdHeader);
+ status = AmdInitEarly(AmdEarlyParams);
+ AGESA_EVENTLOG(status, &aip.StdHeader);
- AmdReleaseStruct(&AmdParamStruct);
+ free_AmdParams(&aip);
return status;
}
@@ -86,29 +100,17 @@ AGESA_STATUS agesawrapper_amdinitearly(void)
AGESA_STATUS agesawrapper_amdinitpost(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
- AMD_POST_PARAMS *PostParams;
-
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
-
- AmdParamStruct.AgesaFunctionName = AMD_INIT_POST;
- AmdParamStruct.AllocationMethod = PreMemHeap;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
-
- AmdCreateStruct(&AmdParamStruct);
+ AMD_INTERFACE_PARAMS aip;
/* OEM Should Customize the defaults through this hook. */
- PostParams = (AMD_POST_PARAMS *) AmdParamStruct.NewStructPtr;
+ AMD_POST_PARAMS *PostParams = empty_AmdParams(&aip, AMD_INIT_POST);
if (OemHook->InitPost)
OemHook->InitPost(PostParams);
status = AmdInitPost(PostParams);
AGESA_EVENTLOG(status, &PostParams->StdHeader);
- AmdReleaseStruct(&AmdParamStruct);
+ free_AmdParams(&aip);
/* Initialize heap space */
EmptyHeap();
@@ -119,29 +121,18 @@ AGESA_STATUS agesawrapper_amdinitpost(void)
AGESA_STATUS agesawrapper_amdinitresume(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
- AMD_RESUME_PARAMS *AmdResumeParamsPtr;
-
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
-
- AmdParamStruct.AgesaFunctionName = AMD_INIT_RESUME;
- AmdParamStruct.AllocationMethod = PreMemHeap;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
- AmdCreateStruct(&AmdParamStruct);
+ AMD_INTERFACE_PARAMS aip;
- AmdResumeParamsPtr = (AMD_RESUME_PARAMS *) AmdParamStruct.NewStructPtr;
+ AMD_RESUME_PARAMS *AmdResumeParams = empty_AmdParams(&aip, AMD_INIT_RESUME);
- AmdResumeParamsPtr->S3DataBlock.NvStorageSize = 0;
- AmdResumeParamsPtr->S3DataBlock.VolatileStorageSize = 0;
- OemInitResume(AmdResumeParamsPtr);
+ AmdResumeParams->S3DataBlock.NvStorageSize = 0;
+ AmdResumeParams->S3DataBlock.VolatileStorageSize = 0;
+ OemInitResume(AmdResumeParams);
- status = AmdInitResume(AmdResumeParamsPtr);
+ status = AmdInitResume(AmdResumeParams);
+ AGESA_EVENTLOG(status, &aip.StdHeader);
- AGESA_EVENTLOG(status, &AmdParamStruct.StdHeader);
- AmdReleaseStruct(&AmdParamStruct);
+ free_AmdParams(&aip);
return status;
}
@@ -149,55 +140,34 @@ AGESA_STATUS agesawrapper_amdinitresume(void)
AGESA_STATUS agesawrapper_amdinitenv(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
- AMD_ENV_PARAMS *EnvParam;
+ AMD_INTERFACE_PARAMS aip;
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
-
- AmdParamStruct.AgesaFunctionName = AMD_INIT_ENV;
- AmdParamStruct.AllocationMethod = PostMemDram;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
- AmdCreateStruct(&AmdParamStruct);
- EnvParam = (AMD_ENV_PARAMS *) AmdParamStruct.NewStructPtr;
+ AMD_ENV_PARAMS *EnvParam = empty_AmdParams(&aip, AMD_INIT_ENV);
status = AmdInitEnv(EnvParam);
AGESA_EVENTLOG(status, &EnvParam->StdHeader);
- AmdReleaseStruct(&AmdParamStruct);
+ free_AmdParams(&aip);
return status;
}
AGESA_STATUS agesawrapper_amds3laterestore(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdInterfaceParams;
- AMD_S3LATE_PARAMS AmdS3LateParams;
- AMD_S3LATE_PARAMS *AmdS3LateParamsPtr;
-
- memset(&AmdS3LateParams, 0, sizeof(AMD_S3LATE_PARAMS));
-
- AmdInterfaceParams.StdHeader.ImageBasePtr = 0;
- AmdInterfaceParams.AllocationMethod = ByHost;
- AmdInterfaceParams.AgesaFunctionName = AMD_S3LATE_RESTORE;
- AmdInterfaceParams.NewStructPtr = &AmdS3LateParams;
- AmdInterfaceParams.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdS3LateParamsPtr = &AmdS3LateParams;
- AmdInterfaceParams.NewStructSize = sizeof(AMD_S3LATE_PARAMS);
+ AMD_INTERFACE_PARAMS aip;
+ AMD_S3LATE_PARAMS tmp;
- AmdCreateStruct(&AmdInterfaceParams);
+ AMD_S3LATE_PARAMS *AmdS3LateParams = local_AmdParams(&aip,
+ AMD_S3LATE_RESTORE, &tmp, sizeof(tmp));
-#if 0
- /* TODO: What to do with NvStorage here? */
- AmdS3LateParamsPtr->S3DataBlock.NvStorageSize = 0;
+#if 0 /* TODO: What to do with NvStorage here? */
+ AmdS3LateParams->S3DataBlock.NvStorageSize = 0;
#endif
- AmdS3LateParamsPtr->S3DataBlock.VolatileStorageSize = 0;
- OemS3LateRestore(AmdS3LateParamsPtr);
+ AmdS3LateParams->S3DataBlock.VolatileStorageSize = 0;
+ OemS3LateRestore(AmdS3LateParams);
- status = AmdS3LateRestore(AmdS3LateParamsPtr);
- AGESA_EVENTLOG(status, &AmdInterfaceParams.StdHeader);
+ status = AmdS3LateRestore(AmdS3LateParams);
+ AGESA_EVENTLOG(status, &aip.StdHeader);
ASSERT(status == AGESA_SUCCESS);
return status;
@@ -208,28 +178,20 @@ AGESA_STATUS agesawrapper_amds3laterestore(void)
AGESA_STATUS agesawrapper_amdinitmid(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
- AMD_MID_PARAMS *MidParam;
-
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
-
- AmdParamStruct.AgesaFunctionName = AMD_INIT_MID;
- AmdParamStruct.AllocationMethod = PostMemDram;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
-
- AmdCreateStruct(&AmdParamStruct);
+ AMD_INTERFACE_PARAMS aip;
/* OEM Should Customize the defaults through this hook. */
- MidParam = (AMD_MID_PARAMS *) AmdParamStruct.NewStructPtr;
+ AMD_MID_PARAMS *MidParam = empty_AmdParams(&aip, AMD_INIT_MID);
if (OemHook->InitMid)
OemHook->InitMid(MidParam);
status = AmdInitMid(MidParam);
AGESA_EVENTLOG(status, &MidParam->StdHeader);
- AmdReleaseStruct(&AmdParamStruct);
+#if 0 /* TODO: Why not? */
+ ASSERT(status == AGESA_SUCCESS);
+#endif
+
+ free_AmdParams(&aip);
return status;
}
@@ -237,30 +199,19 @@ AGESA_STATUS agesawrapper_amdinitmid(void)
AGESA_STATUS agesawrapper_amdS3Save(void)
{
AGESA_STATUS status;
- AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr;
- AMD_INTERFACE_PARAMS AmdInterfaceParams;
-
- memset(&AmdInterfaceParams, 0, sizeof(AMD_INTERFACE_PARAMS));
+ AMD_INTERFACE_PARAMS aip;
- AmdInterfaceParams.StdHeader.ImageBasePtr = 0;
- AmdInterfaceParams.StdHeader.HeapStatus = HEAP_SYSTEM_MEM;
- AmdInterfaceParams.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdInterfaceParams.AllocationMethod = PostMemDram;
- AmdInterfaceParams.AgesaFunctionName = AMD_S3_SAVE;
- AmdInterfaceParams.StdHeader.AltImageBasePtr = 0;
- AmdInterfaceParams.StdHeader.Func = 0;
- AmdCreateStruct(&AmdInterfaceParams);
+ AMD_S3SAVE_PARAMS *AmdS3SaveParams = empty_AmdParams(&aip, AMD_S3_SAVE);
- AmdS3SaveParamsPtr = (AMD_S3SAVE_PARAMS *) AmdInterfaceParams.NewStructPtr;
- AmdS3SaveParamsPtr->StdHeader = AmdInterfaceParams.StdHeader;
+ AmdS3SaveParams->StdHeader = aip.StdHeader;
- status = AmdS3Save(AmdS3SaveParamsPtr);
- AGESA_EVENTLOG(status, &AmdInterfaceParams.StdHeader);
+ status = AmdS3Save(AmdS3SaveParams);
+ AGESA_EVENTLOG(status, &aip.StdHeader);
ASSERT(status == AGESA_SUCCESS);
- OemS3Save(AmdS3SaveParamsPtr);
+ OemS3Save(AmdS3SaveParams);
- AmdReleaseStruct(&AmdInterfaceParams);
+ free_AmdParams(&aip);
return status;
}
@@ -271,29 +222,15 @@ static AMD_LATE_PARAMS *AmdLateParams = NULL;
AGESA_STATUS agesawrapper_amdinitlate(void)
{
AGESA_STATUS status;
- AMD_INTERFACE_PARAMS AmdParamStruct;
+ AMD_INTERFACE_PARAMS aip;
- memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
+ AmdLateParams = empty_AmdParams(&aip, AMD_INIT_LATE);
- AmdParamStruct.AgesaFunctionName = AMD_INIT_LATE;
- AmdParamStruct.AllocationMethod = PostMemDram;
- AmdParamStruct.StdHeader.AltImageBasePtr = 0;
- AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
- AmdParamStruct.StdHeader.Func = 0;
- AmdParamStruct.StdHeader.ImageBasePtr = 0;
-
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) || IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_RL) || \
- IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY16_KB)
- AmdParamStruct.StdHeader.HeapStatus = HEAP_SYSTEM_MEM;
-#endif
-
- AmdCreateStruct(&AmdParamStruct);
- AmdLateParams = (AMD_LATE_PARAMS *) AmdParamStruct.NewStructPtr;
status = AmdInitLate(AmdLateParams);
AGESA_EVENTLOG(status, &AmdLateParams->StdHeader);
ASSERT(status == AGESA_SUCCESS);
- /* No AmdReleaseStruct(&AmdParamStruct), we need AmdLateParams later. */
+ /* No free_AmdParams(&aip), we need AmdLateParams later. */
return status;
}
@@ -336,11 +273,8 @@ AGESA_STATUS agesawrapper_amdlaterunaptask(UINT32 Func, UINT32 Data, VOID * Conf
AP_EXE_PARAMS ApExeParams;
memset(&ApExeParams, 0, sizeof(AP_EXE_PARAMS));
-
- ApExeParams.StdHeader.AltImageBasePtr = 0;
ApExeParams.StdHeader.CalloutPtr = &GetBiosCallout;
- ApExeParams.StdHeader.Func = 0;
- ApExeParams.StdHeader.ImageBasePtr = 0;
+
ApExeParams.FunctionNumber = Func;
ApExeParams.RelatedDataBlock = ConfigPtr;
1
0
New patch to review for coreboot: AGESA boards: Split dispatcher to romstage and ramstage
by Kyösti Mälkki 19 Apr '16
by Kyösti Mälkki 19 Apr '16
19 Apr '16
Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14417
-gerrit
commit ad2146ebfc31ffa1745ff8df16792e665306f529
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Tue Apr 19 15:18:02 2016 +0300
AGESA boards: Split dispatcher to romstage and ramstage
The way dispatcher table is set up prevents linker from
optimizing unused code away, we currently have raminit in ramstage.
Optimize this manually by configuring AGESA_ENTRY booleans for
romstage and ramstage separately. This will remove references in
FuncParamsInfo and DispatchTable -arrays.
All boards now include multi-core dispatcher, it has minimal footprint:
AGESA_ENTRY_LATE_RUN_AP_TASK
ACPI S3 support depends on HAVE_ACPI_RESUME being enabled:
AGESA_ENTRY_INIT_RESUME
AGESA_ENTRY_INIT_LATE_RESTORE
AGESA_ENTRY_INIT_S3SAVE
Disabled for all boards as it was not used:
AGESA_ENTRY_INIT_GENERAL_SERVICES
Change-Id: I7ec36a5819a8e526cbeb87b04dce4227a1689285
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
src/mainboard/amd/dinar/buildOpts.c | 17 --
src/mainboard/amd/inagua/buildOpts.c | 15 --
src/mainboard/amd/olivehill/buildOpts.c | 12 -
src/mainboard/amd/parmer/buildOpts.c | 12 -
src/mainboard/amd/persimmon/buildOpts.c | 15 --
src/mainboard/amd/south_station/buildOpts.c | 15 --
src/mainboard/amd/thatcher/buildOpts.c | 12 -
src/mainboard/amd/torpedo/buildOpts.c | 16 --
src/mainboard/amd/union_station/buildOpts.c | 15 --
src/mainboard/asrock/e350m1/buildOpts.c | 16 --
src/mainboard/asrock/imb-a180/buildOpts.c | 12 -
src/mainboard/asus/f2a85-m/buildOpts.c | 12 -
src/mainboard/asus/f2a85-m_le/buildOpts.c | 12 -
src/mainboard/bap/ode_e20XX/buildOpts.c | 13 --
src/mainboard/biostar/am1ml/buildOpts.c | 12 -
src/mainboard/gizmosphere/gizmo/buildOpts.c | 15 --
src/mainboard/gizmosphere/gizmo2/buildOpts.c | 13 --
src/mainboard/hp/abm/buildOpts.c | 12 -
src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c | 12 -
src/mainboard/jetway/nf81-t56n-lf/buildOpts.c | 15 --
src/mainboard/lenovo/g505s/buildOpts.c | 12 -
src/mainboard/lippert/frontrunner-af/buildOpts.c | 15 --
src/mainboard/lippert/toucan-af/buildOpts.c | 15 --
src/mainboard/pcengines/apu1/buildOpts.c | 15 --
src/mainboard/supermicro/h8qgi/buildOpts.c | 12 -
src/mainboard/supermicro/h8scm/buildOpts.c | 12 -
src/mainboard/tyan/s8226/buildOpts.c | 12 -
src/vendorcode/amd/agesa/Makefile.inc | 3 +
src/vendorcode/amd/agesa/common/agesa-entry-cfg.h | 86 +++++++
src/vendorcode/amd/agesa/common/agesa-entry.c | 177 +++++++++++++++
.../amd/agesa/f10/Include/OptionDmiInstall.h | 2 -
.../amd/agesa/f10/Include/OptionHtAssistInstall.h | 2 -
.../amd/agesa/f12/Include/OptionDmiInstall.h | 2 -
.../agesa/f12/Include/OptionL3FeaturesInstall.h | 2 -
.../amd/agesa/f12/Include/PlatformInstall.h | 246 +-------------------
.../amd/agesa/f14/Include/OptionDmiInstall.h | 2 -
.../amd/agesa/f14/Include/OptionHtAssistInstall.h | 2 -
.../amd/agesa/f14/Include/PlatformInstall.h | 248 +-------------------
.../amd/agesa/f15/Include/OptionDmiInstall.h | 2 -
.../agesa/f15/Include/OptionL3FeaturesInstall.h | 2 -
.../amd/agesa/f15/Include/PlatformInstall.h | 247 +-------------------
.../amd/agesa/f15tn/Include/OptionDmiInstall.h | 2 -
.../agesa/f15tn/Include/OptionL3FeaturesInstall.h | 2 -
.../amd/agesa/f15tn/Include/PlatformInstall.h | 247 +-------------------
.../amd/agesa/f16kb/Include/OptionDmiInstall.h | 2 -
.../agesa/f16kb/Include/OptionL3FeaturesInstall.h | 2 -
.../f16kb/Include/OptionPrefetchModeInstall.h | 2 -
.../amd/agesa/f16kb/Include/PlatformInstall.h | 251 +--------------------
48 files changed, 276 insertions(+), 1621 deletions(-)
diff --git a/src/mainboard/amd/dinar/buildOpts.c b/src/mainboard/amd/dinar/buildOpts.c
index f69f005..0b08cc6 100644
--- a/src/mainboard/amd/dinar/buildOpts.c
+++ b/src/mainboard/amd/dinar/buildOpts.c
@@ -26,7 +26,6 @@
*/
#include <stdlib.h>
#include "AGESA.h"
-#include "CommonReturns.h"
#include "Filecode.h"
#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
//#define OPTION_HW_DQS_REC_EN_TRAINING TRUE
@@ -153,24 +152,9 @@
#define BLDCFG_PSTATE_HPC_MODE FALSE
#define BLDCFG_HTDEVICE_CAPABILITIES_OVERRIDE_LIST &MaranelloOverrideDevCap
-/*
- * Agesa entry points used in this implementation.
- */
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE//FALSE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
-#define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
/*****************************************************************************
@@ -395,7 +379,6 @@ CONST DEVICE_CAP_OVERRIDE ROMDATA MaranelloOverrideDevCap[2] =
#include "CreateStruct.h"
#include "cpuFeatures.h"
#include "Table.h"
-#include "CommonReturns.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "GnbInterfaceStub.h"
diff --git a/src/mainboard/amd/inagua/buildOpts.c b/src/mainboard/amd/inagua/buildOpts.c
index 57590a2..980fb3e 100644
--- a/src/mainboard/amd/inagua/buildOpts.c
+++ b/src/mainboard/amd/inagua/buildOpts.c
@@ -101,20 +101,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
-/*
- * Agesa entry points used in this implementation.
- */
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE FALSE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@@ -218,7 +204,6 @@
* needed by the system.
*/
#include "AGESA.h"
-#include "CommonReturns.h"
/* The fixed MTRR values to be set after memory initialization. */
CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
diff --git a/src/mainboard/amd/olivehill/buildOpts.c b/src/mainboard/amd/olivehill/buildOpts.c
index 18e403f..d558694 100644
--- a/src/mainboard/amd/olivehill/buildOpts.c
+++ b/src/mainboard/amd/olivehill/buildOpts.c
@@ -171,17 +171,6 @@
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE //TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
* Customized OEM build configurations for FCH component
*/
@@ -251,7 +240,6 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#include "CreateStruct.h"
#include "cpuFeatures.h"
#include "Table.h"
-#include "CommonReturns.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "GnbInterface.h"
diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c
index 41b3e39..e5637d0 100644
--- a/src/mainboard/amd/parmer/buildOpts.c
+++ b/src/mainboard/amd/parmer/buildOpts.c
@@ -172,17 +172,6 @@
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE //TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
* Customized OEM build configurations for FCH component
*/
@@ -252,7 +241,6 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#include "CreateStruct.h"
#include "cpuFeatures.h"
#include "Table.h"
-#include "CommonReturns.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "GnbInterface.h"
diff --git a/src/mainboard/amd/persimmon/buildOpts.c b/src/mainboard/amd/persimmon/buildOpts.c
index 23e2706..915303c 100644
--- a/src/mainboard/amd/persimmon/buildOpts.c
+++ b/src/mainboard/amd/persimmon/buildOpts.c
@@ -101,20 +101,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
-/*
- * Agesa entry points used in this implementation.
- */
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@@ -218,7 +204,6 @@
* needed by the system.
*/
#include "AGESA.h"
-#include "CommonReturns.h"
/* The fixed MTRR values to be set after memory initialization. */
CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
diff --git a/src/mainboard/amd/south_station/buildOpts.c b/src/mainboard/amd/south_station/buildOpts.c
index ad4047a..ab3efec 100644
--- a/src/mainboard/amd/south_station/buildOpts.c
+++ b/src/mainboard/amd/south_station/buildOpts.c
@@ -101,20 +101,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
-/*
- * Agesa entry points used in this implementation.
- */
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE FALSE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@@ -218,7 +204,6 @@
* needed by the system.
*/
#include "AGESA.h"
-#include "CommonReturns.h"
/* The fixed MTRR values to be set after memory initialization. */
CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
diff --git a/src/mainboard/amd/thatcher/buildOpts.c b/src/mainboard/amd/thatcher/buildOpts.c
index 94d842a..69b8a87 100644
--- a/src/mainboard/amd/thatcher/buildOpts.c
+++ b/src/mainboard/amd/thatcher/buildOpts.c
@@ -172,17 +172,6 @@
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE //TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
* Customized OEM build configurations for FCH component
*/
@@ -252,7 +241,6 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#include "CreateStruct.h"
#include "cpuFeatures.h"
#include "Table.h"
-#include "CommonReturns.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "GnbInterface.h"
diff --git a/src/mainboard/amd/torpedo/buildOpts.c b/src/mainboard/amd/torpedo/buildOpts.c
index b42d9a1..16817c2 100644
--- a/src/mainboard/amd/torpedo/buildOpts.c
+++ b/src/mainboard/amd/torpedo/buildOpts.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "CommonReturns.h"
#include "Filecode.h"
#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
@@ -83,20 +82,6 @@
//For revision C single-link processors
#define BLDCFG_SUPPORT_ACPI_PSTATES_PSD_INDPX TRUE
-/*
- * Agesa entry points used in this implementation.
- */
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE FALSE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*****************************************************************************
* Define the RELEASE VERSION string
@@ -230,7 +215,6 @@ CONST AP_MTRR_SETTINGS ROMDATA LlanoApMtrrSettingsList[] =
#include "CreateStruct.h"
#include "cpuFeatures.h"
#include "Table.h"
-#include "CommonReturns.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "GnbInterface.h"
diff --git a/src/mainboard/amd/union_station/buildOpts.c b/src/mainboard/amd/union_station/buildOpts.c
index ad4047a..ab3efec 100644
--- a/src/mainboard/amd/union_station/buildOpts.c
+++ b/src/mainboard/amd/union_station/buildOpts.c
@@ -101,20 +101,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
-/*
- * Agesa entry points used in this implementation.
- */
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE FALSE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@@ -218,7 +204,6 @@
* needed by the system.
*/
#include "AGESA.h"
-#include "CommonReturns.h"
/* The fixed MTRR values to be set after memory initialization. */
CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
diff --git a/src/mainboard/asrock/e350m1/buildOpts.c b/src/mainboard/asrock/e350m1/buildOpts.c
index 140ece4..83049b6 100644
--- a/src/mainboard/asrock/e350m1/buildOpts.c
+++ b/src/mainboard/asrock/e350m1/buildOpts.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "CommonReturns.h"
#include "Filecode.h"
#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
@@ -103,20 +102,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
-/*
- * Agesa entry points used in this implementation.
- */
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
/*
* Agesa configuration values selection.
@@ -246,7 +231,6 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#include "CreateStruct.h"
#include "cpuFeatures.h"
#include "Table.h"
-#include "CommonReturns.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "GnbInterface.h"
diff --git a/src/mainboard/asrock/imb-a180/buildOpts.c b/src/mainboard/asrock/imb-a180/buildOpts.c
index 742646c..ea47cec 100644
--- a/src/mainboard/asrock/imb-a180/buildOpts.c
+++ b/src/mainboard/asrock/imb-a180/buildOpts.c
@@ -171,17 +171,6 @@
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE //TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
* Customized OEM build configurations for FCH component
*/
@@ -251,7 +240,6 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#include "CreateStruct.h"
#include "cpuFeatures.h"
#include "Table.h"
-#include "CommonReturns.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "GnbInterface.h"
diff --git a/src/mainboard/asus/f2a85-m/buildOpts.c b/src/mainboard/asus/f2a85-m/buildOpts.c
index 83f96f9..755505b 100644
--- a/src/mainboard/asus/f2a85-m/buildOpts.c
+++ b/src/mainboard/asus/f2a85-m/buildOpts.c
@@ -31,7 +31,6 @@
/* Include the files that instantiate the configuration definitions. */
#include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
-#include <vendorcode/amd/agesa/f15tn/Include/CommonReturns.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
@@ -187,17 +186,6 @@
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE //TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
* Customized OEM build configurations for FCH component
*/
diff --git a/src/mainboard/asus/f2a85-m_le/buildOpts.c b/src/mainboard/asus/f2a85-m_le/buildOpts.c
index c6810f1..8b01f24 100644
--- a/src/mainboard/asus/f2a85-m_le/buildOpts.c
+++ b/src/mainboard/asus/f2a85-m_le/buildOpts.c
@@ -31,7 +31,6 @@
/* Include the files that instantiate the configuration definitions. */
#include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
-#include <vendorcode/amd/agesa/f15tn/Include/CommonReturns.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
@@ -187,17 +186,6 @@
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE //TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
* Customized OEM build configurations for FCH component
*/
diff --git a/src/mainboard/bap/ode_e20XX/buildOpts.c b/src/mainboard/bap/ode_e20XX/buildOpts.c
index 8162d42..9a02b43 100644
--- a/src/mainboard/bap/ode_e20XX/buildOpts.c
+++ b/src/mainboard/bap/ode_e20XX/buildOpts.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include "AGESA.h"
-//#include "CommonReturns.h"
#include "Filecode.h"
#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
@@ -172,17 +171,6 @@
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE //TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
* Customized OEM build configurations for FCH component
*/
@@ -253,7 +241,6 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#include "CreateStruct.h"
#include "cpuFeatures.h"
#include "Table.h"
-#include "CommonReturns.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "GnbInterface.h"
diff --git a/src/mainboard/biostar/am1ml/buildOpts.c b/src/mainboard/biostar/am1ml/buildOpts.c
index 075fe57..0e98517 100644
--- a/src/mainboard/biostar/am1ml/buildOpts.c
+++ b/src/mainboard/biostar/am1ml/buildOpts.c
@@ -171,17 +171,6 @@
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE //TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
* Customized OEM build configurations for FCH component
*/
@@ -251,7 +240,6 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#include "CreateStruct.h"
#include "cpuFeatures.h"
#include "Table.h"
-#include "CommonReturns.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "GnbInterface.h"
diff --git a/src/mainboard/gizmosphere/gizmo/buildOpts.c b/src/mainboard/gizmosphere/gizmo/buildOpts.c
index 8279802..9b62536 100644
--- a/src/mainboard/gizmosphere/gizmo/buildOpts.c
+++ b/src/mainboard/gizmosphere/gizmo/buildOpts.c
@@ -103,20 +103,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
-/*
- * Agesa entry points used in this implementation.
- */
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@@ -220,7 +206,6 @@
* needed by the system.
*/
#include "AGESA.h"
-#include "CommonReturns.h"
/* The fixed MTRR values to be set after memory initialization. */
CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
diff --git a/src/mainboard/gizmosphere/gizmo2/buildOpts.c b/src/mainboard/gizmosphere/gizmo2/buildOpts.c
index 8162d42..9a02b43 100644
--- a/src/mainboard/gizmosphere/gizmo2/buildOpts.c
+++ b/src/mainboard/gizmosphere/gizmo2/buildOpts.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include "AGESA.h"
-//#include "CommonReturns.h"
#include "Filecode.h"
#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
@@ -172,17 +171,6 @@
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE //TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
* Customized OEM build configurations for FCH component
*/
@@ -253,7 +241,6 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#include "CreateStruct.h"
#include "cpuFeatures.h"
#include "Table.h"
-#include "CommonReturns.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "GnbInterface.h"
diff --git a/src/mainboard/hp/abm/buildOpts.c b/src/mainboard/hp/abm/buildOpts.c
index 96d59db..05889cb 100644
--- a/src/mainboard/hp/abm/buildOpts.c
+++ b/src/mainboard/hp/abm/buildOpts.c
@@ -176,17 +176,6 @@
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE //TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
* Customized OEM build configurations for FCH component
*/
@@ -256,7 +245,6 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#include "CreateStruct.h"
#include "cpuFeatures.h"
#include "Table.h"
-#include "CommonReturns.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "GnbInterface.h"
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
index 8d02f03..23457d6 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
@@ -33,7 +33,6 @@
/* Include the files that instantiate the configuration definitions. */
#include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
-#include <vendorcode/amd/agesa/f15tn/Include/CommonReturns.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
@@ -188,17 +187,6 @@
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE //TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
* Customized OEM build configurations for FCH component
*/
diff --git a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
index 73673ef..48b9118 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
@@ -31,7 +31,6 @@
/* Include the files that instantiate the configuration definitions. */
#include <vendorcode/amd/agesa/f14/Include/AdvancedApi.h>
-#include <vendorcode/amd/agesa/f14/Include/CommonReturns.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/cpuFamilyTranslation.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatures.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
@@ -115,20 +114,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
-/*
- * AGESA entry points used in this implementation.
- */
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c
index 7b491d4..19ea01e 100644
--- a/src/mainboard/lenovo/g505s/buildOpts.c
+++ b/src/mainboard/lenovo/g505s/buildOpts.c
@@ -33,7 +33,6 @@
/* Include the files that instantiate the configuration definitions. */
#include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
-#include <vendorcode/amd/agesa/f15tn/Include/CommonReturns.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
@@ -188,17 +187,6 @@
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE //TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
* Customized OEM build configurations for FCH component
*/
diff --git a/src/mainboard/lippert/frontrunner-af/buildOpts.c b/src/mainboard/lippert/frontrunner-af/buildOpts.c
index 3211966..e054e58 100644
--- a/src/mainboard/lippert/frontrunner-af/buildOpts.c
+++ b/src/mainboard/lippert/frontrunner-af/buildOpts.c
@@ -102,20 +102,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
-/*
- * Agesa entry points used in this implementation.
- */
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@@ -219,7 +205,6 @@
* needed by the system.
*/
#include "AGESA.h"
-#include "CommonReturns.h"
/* The fixed MTRR values to be set after memory initialization. */
CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
diff --git a/src/mainboard/lippert/toucan-af/buildOpts.c b/src/mainboard/lippert/toucan-af/buildOpts.c
index 3211966..e054e58 100644
--- a/src/mainboard/lippert/toucan-af/buildOpts.c
+++ b/src/mainboard/lippert/toucan-af/buildOpts.c
@@ -102,20 +102,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
-/*
- * Agesa entry points used in this implementation.
- */
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@@ -219,7 +205,6 @@
* needed by the system.
*/
#include "AGESA.h"
-#include "CommonReturns.h"
/* The fixed MTRR values to be set after memory initialization. */
CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
diff --git a/src/mainboard/pcengines/apu1/buildOpts.c b/src/mainboard/pcengines/apu1/buildOpts.c
index 50cf4cf..52b8f52 100644
--- a/src/mainboard/pcengines/apu1/buildOpts.c
+++ b/src/mainboard/pcengines/apu1/buildOpts.c
@@ -101,20 +101,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
-/*
- * Agesa entry points used in this implementation.
- */
-#define AGESA_ENTRY_INIT_RESET TRUE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@@ -218,7 +204,6 @@
* needed by the system.
*/
#include "AGESA.h"
-#include "CommonReturns.h"
/* The fixed MTRR values to be set after memory initialization. */
CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
diff --git a/src/mainboard/supermicro/h8qgi/buildOpts.c b/src/mainboard/supermicro/h8qgi/buildOpts.c
index f6e654a..cbc7bd6 100644
--- a/src/mainboard/supermicro/h8qgi/buildOpts.c
+++ b/src/mainboard/supermicro/h8qgi/buildOpts.c
@@ -16,7 +16,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "CommonReturns.h"
#include "AdvancedApi.h"
#include <PlatformMemoryConfiguration.h>
#include "Filecode.h"
@@ -426,17 +425,6 @@ CONST AP_MTRR_SETTINGS ROMDATA h8qgi_ap_mtrr_list[] =
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE//FALSE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
#if CONFIG_CPU_AMD_AGESA_FAMILY15
diff --git a/src/mainboard/supermicro/h8scm/buildOpts.c b/src/mainboard/supermicro/h8scm/buildOpts.c
index 1403999..2f96f78 100644
--- a/src/mainboard/supermicro/h8scm/buildOpts.c
+++ b/src/mainboard/supermicro/h8scm/buildOpts.c
@@ -16,7 +16,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "CommonReturns.h"
#include "AdvancedApi.h"
#include <PlatformMemoryConfiguration.h>
#include "Filecode.h"
@@ -339,17 +338,6 @@ CONST AP_MTRR_SETTINGS ROMDATA h8scm_ap_mtrr_list[] =
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE//FALSE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
#include "SanMarinoInstall.h"
diff --git a/src/mainboard/tyan/s8226/buildOpts.c b/src/mainboard/tyan/s8226/buildOpts.c
index 4a3d808..cdefa03 100644
--- a/src/mainboard/tyan/s8226/buildOpts.c
+++ b/src/mainboard/tyan/s8226/buildOpts.c
@@ -16,7 +16,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "CommonReturns.h"
#include "AdvancedApi.h"
#include <PlatformMemoryConfiguration.h>
#include "Filecode.h"
@@ -426,17 +425,6 @@ CONST AP_MTRR_SETTINGS ROMDATA s8226_ap_mtrr_list[] =
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
-#define AGESA_ENTRY_INIT_RESET TRUE//FALSE
-#define AGESA_ENTRY_INIT_RECOVERY FALSE
-#define AGESA_ENTRY_INIT_EARLY TRUE
-#define AGESA_ENTRY_INIT_POST TRUE
-#define AGESA_ENTRY_INIT_ENV TRUE
-#define AGESA_ENTRY_INIT_MID TRUE
-#define AGESA_ENTRY_INIT_LATE TRUE
-#define AGESA_ENTRY_INIT_S3SAVE TRUE
-#define AGESA_ENTRY_INIT_RESUME TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
/*
#if CONFIG_CPU_AMD_AGESA_FAMILY15
diff --git a/src/vendorcode/amd/agesa/Makefile.inc b/src/vendorcode/amd/agesa/Makefile.inc
index 02d9063..30cbed6 100644
--- a/src/vendorcode/amd/agesa/Makefile.inc
+++ b/src/vendorcode/amd/agesa/Makefile.inc
@@ -5,3 +5,6 @@ subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY15) += f15
subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) += f15tn
subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY15_RL) += f15tn
subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY16_KB) += f16kb
+
+romstage-y += common/agesa-entry.c
+ramstage-y += common/agesa-entry.c
diff --git a/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h b/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h
new file mode 100644
index 0000000..e882f2e
--- /dev/null
+++ b/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h
@@ -0,0 +1,86 @@
+#ifndef AGESA_ENTRY_CFG_H
+#define AGESA_ENTRY_CFG_H
+
+
+#if defined(__PRE_RAM__)
+
+#define AGESA_ENTRY_INIT_RESET TRUE
+#define AGESA_ENTRY_INIT_EARLY TRUE
+#define AGESA_ENTRY_INIT_POST TRUE
+
+/* Not implemented in coreboot romstage. */
+#define AGESA_ENTRY_INIT_RECOVERY FALSE
+
+#define AGESA_ENTRY_INIT_RESUME IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#define AGESA_ENTRY_INIT_LATE_RESTORE IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+
+/* Move to ramstage? */
+#define AGESA_ENTRY_INIT_ENV TRUE
+
+#else
+
+#define AGESA_ENTRY_INIT_MID TRUE
+#define AGESA_ENTRY_INIT_LATE TRUE
+#define AGESA_ENTRY_INIT_S3SAVE IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+
+#endif
+
+/* Not required. */
+#define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
+
+/* Required for any multi-core. */
+#define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
+
+
+/* Defaults below. */
+
+/* Process user desired AGESA entry points */
+#ifndef AGESA_ENTRY_INIT_RESET
+ #define AGESA_ENTRY_INIT_RESET FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_RECOVERY
+ #define AGESA_ENTRY_INIT_RECOVERY FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_EARLY
+ #define AGESA_ENTRY_INIT_EARLY FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_POST
+ #define AGESA_ENTRY_INIT_POST FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_ENV
+ #define AGESA_ENTRY_INIT_ENV FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_MID
+ #define AGESA_ENTRY_INIT_MID FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_LATE
+ #define AGESA_ENTRY_INIT_LATE FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_S3SAVE
+ #define AGESA_ENTRY_INIT_S3SAVE FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_RESUME
+ #define AGESA_ENTRY_INIT_RESUME FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
+ #define AGESA_ENTRY_INIT_LATE_RESTORE FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
+ #define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
+#endif
+
+#ifndef AGESA_ENTRY_LATE_RUN_AP_TASK
+ #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
+#endif
+
+#endif /* AGESA_ENTRY_CFG_H */
diff --git a/src/vendorcode/amd/agesa/common/agesa-entry.c b/src/vendorcode/amd/agesa/common/agesa-entry.c
new file mode 100644
index 0000000..e722fc1
--- /dev/null
+++ b/src/vendorcode/amd/agesa/common/agesa-entry.c
@@ -0,0 +1,177 @@
+#include <Porting.h>
+#include <AMD.h>
+#include <AGESA.h>
+
+#include "CommonReturns.h"
+
+#include <heapManager.h>
+#include <CreateStruct.h>
+
+#include <Options.h>
+
+#include <agesa-entry-cfg.h>
+
+CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
+{
+ #if AGESA_ENTRY_INIT_RESET == TRUE
+ { AMD_INIT_RESET,
+ sizeof (AMD_RESET_PARAMS),
+ (PF_AGESA_FUNCTION) AmdInitResetConstructor,
+ (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+ AMD_INIT_RESET_HANDLE
+ },
+ #endif
+
+ #if AGESA_ENTRY_INIT_RECOVERY == TRUE
+ { AMD_INIT_RECOVERY,
+ sizeof (AMD_RECOVERY_PARAMS),
+ (PF_AGESA_FUNCTION) AmdInitRecoveryInitializer,
+ (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+ AMD_INIT_POST_HANDLE
+ },
+ #endif
+
+ #if AGESA_ENTRY_INIT_EARLY == TRUE
+ { AMD_INIT_EARLY,
+ sizeof (AMD_EARLY_PARAMS),
+ (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
+ (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+ AMD_INIT_EARLY_HANDLE
+ },
+ #endif
+
+ #if AGESA_ENTRY_INIT_ENV == TRUE
+ { AMD_INIT_ENV,
+ sizeof (AMD_ENV_PARAMS),
+ (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
+ (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+ AMD_INIT_ENV_HANDLE
+ },
+ #endif
+
+ #if AGESA_ENTRY_INIT_LATE == TRUE
+ { AMD_INIT_LATE,
+ sizeof (AMD_LATE_PARAMS),
+ (PF_AGESA_FUNCTION) AmdInitLateInitializer,
+ (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
+ AMD_INIT_LATE_HANDLE
+ },
+ #endif
+
+ #if AGESA_ENTRY_INIT_MID == TRUE
+ { AMD_INIT_MID,
+ sizeof (AMD_MID_PARAMS),
+ (PF_AGESA_FUNCTION) AmdInitMidInitializer,
+ (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+ AMD_INIT_MID_HANDLE
+ },
+ #endif
+
+ #if AGESA_ENTRY_INIT_POST == TRUE
+ { AMD_INIT_POST,
+ sizeof (AMD_POST_PARAMS),
+ (PF_AGESA_FUNCTION) AmdInitPostInitializer,
+ (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
+ AMD_INIT_POST_HANDLE
+ },
+ #endif
+
+ #if AGESA_ENTRY_INIT_RESUME == TRUE
+ { AMD_INIT_RESUME,
+ sizeof (AMD_RESUME_PARAMS),
+ (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
+ (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
+ AMD_INIT_RESUME_HANDLE
+ },
+ #endif
+
+ #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
+ { AMD_S3LATE_RESTORE,
+ sizeof (AMD_S3LATE_PARAMS),
+ (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
+ (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+ AMD_S3_LATE_RESTORE_HANDLE
+ },
+ #endif
+
+ #if AGESA_ENTRY_INIT_S3SAVE == TRUE
+ { AMD_S3_SAVE,
+ sizeof (AMD_S3SAVE_PARAMS),
+ (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
+ (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
+ AMD_S3_SAVE_HANDLE
+ },
+ #endif
+
+ #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
+ { AMD_LATE_RUN_AP_TASK,
+ sizeof (AP_EXE_PARAMS),
+ (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
+ (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+ AMD_LATE_RUN_AP_TASK_HANDLE
+ },
+ #endif
+ { 0, 0, NULL }
+};
+
+CONST UINTN InitializerCount = ((sizeof (FuncParamsInfo)) / (sizeof (FuncParamsInfo[0])));
+
+CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
+{
+ { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
+ { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
+
+ #if AGESA_ENTRY_INIT_RESET == TRUE
+ { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
+ #endif
+
+ #if AGESA_ENTRY_INIT_RECOVERY == TRUE
+ { AMD_INIT_RECOVERY, (IMAGE_ENTRY)AmdInitRecovery },
+ #endif
+
+ #if AGESA_ENTRY_INIT_EARLY == TRUE
+ { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
+ #endif
+
+ #if AGESA_ENTRY_INIT_POST == TRUE
+ { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
+ #endif
+
+ #if AGESA_ENTRY_INIT_ENV == TRUE
+ { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
+ #endif
+
+ #if AGESA_ENTRY_INIT_MID == TRUE
+ { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
+ #endif
+
+ #if AGESA_ENTRY_INIT_LATE == TRUE
+ { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
+ #endif
+
+ #if AGESA_ENTRY_INIT_S3SAVE == TRUE
+ { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
+ #endif
+
+ #if AGESA_ENTRY_INIT_RESUME == TRUE
+ { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
+ #endif
+
+ #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
+ { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
+ #endif
+
+ #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
+ { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
+ { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
+ { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
+ { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
+ { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
+ { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
+ #endif
+
+ #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
+ { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
+ #endif
+ { 0, NULL }
+};
diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionDmiInstall.h
index 2ad7792..232d407 100644
--- a/src/vendorcode/amd/agesa/f10/Include/OptionDmiInstall.h
+++ b/src/vendorcode/amd/agesa/f10/Include/OptionDmiInstall.h
@@ -60,8 +60,6 @@
#define USER_DMI_OPTION &GetDmiInfoMain
#define USER_DMI_RELEASE_BUFFER &ReleaseDmiBuffer
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
- #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
#define CPU_DMI_AP_GET_TYPE4_TYPE7 {AP_LATE_TASK_GET_TYPE4_TYPE7, (IMAGE_ENTRY) GetType4Type7Info},
#ifdef OPTION_FAMILY10H
diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionHtAssistInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionHtAssistInstall.h
index c084924..a7149f0 100644
--- a/src/vendorcode/amd/agesa/f10/Include/OptionHtAssistInstall.h
+++ b/src/vendorcode/amd/agesa/f10/Include/OptionHtAssistInstall.h
@@ -79,8 +79,6 @@
&HtAssistFamilyServiceArray[0]
};
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
- #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
#undef HT_ASSIST_AP_DISABLE_CACHE
#define HT_ASSIST_AP_DISABLE_CACHE {AP_LATE_TASK_DISABLE_CACHE, (IMAGE_ENTRY) DisableAllCaches},
#undef HT_ASSIST_AP_ENABLE_CACHE
diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionDmiInstall.h
index 410d3cb..ead4fce 100644
--- a/src/vendorcode/amd/agesa/f12/Include/OptionDmiInstall.h
+++ b/src/vendorcode/amd/agesa/f12/Include/OptionDmiInstall.h
@@ -63,8 +63,6 @@
// This additional check keeps AP launch routines from being unnecessarily included
// in single socket systems.
#if OPTION_MULTISOCKET == TRUE
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
- #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
#define CPU_DMI_AP_GET_TYPE4_TYPE7 {AP_LATE_TASK_GET_TYPE4_TYPE7, (IMAGE_ENTRY) GetType4Type7Info},
#else
#define CPU_DMI_AP_GET_TYPE4_TYPE7
diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionL3FeaturesInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionL3FeaturesInstall.h
index f3ef633..7f3ac07 100644
--- a/src/vendorcode/amd/agesa/f12/Include/OptionL3FeaturesInstall.h
+++ b/src/vendorcode/amd/agesa/f12/Include/OptionL3FeaturesInstall.h
@@ -82,8 +82,6 @@
#endif
#endif
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
- #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
#undef L3_FEAT_AP_DISABLE_CACHE
#define L3_FEAT_AP_DISABLE_CACHE {AP_LATE_TASK_DISABLE_CACHE, (IMAGE_ENTRY) DisableAllCaches},
#undef L3_FEAT_AP_ENABLE_CACHE
diff --git a/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h
index 14dd179..2b99660 100644
--- a/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h
+++ b/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h
@@ -52,30 +52,6 @@
*
****************************************************************************/
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image. Turn these on in your option c file, not
- * here.
- */
-// #define AGESA_ENTRY_INIT_RESET TRUE
-// #define AGESA_ENTRY_INIT_RECOVERY TRUE
-// #define AGESA_ENTRY_INIT_EARLY TRUE
-// #define AGESA_ENTRY_INIT_POST TRUE
-// #define AGESA_ENTRY_INIT_ENV TRUE
-// #define AGESA_ENTRY_INIT_MID TRUE
-// #define AGESA_ENTRY_INIT_LATE TRUE
-// #define AGESA_ENTRY_INIT_S3SAVE TRUE
-// #define AGESA_ENTRY_INIT_RESUME TRUE
-// #define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-// #define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
-
-/* Defaults for private/internal build control settings */
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.
- */
VOLATILE AMD_MODULE_HEADER mCpuModuleID = {
//ModuleHeaderSignature
@@ -91,61 +67,6 @@ VOLATILE AMD_MODULE_HEADER mCpuModuleID = {
NULL
};
-/* Process user desired AGESA entry points */
-#ifndef AGESA_ENTRY_INIT_RESET
- #define AGESA_ENTRY_INIT_RESET FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RECOVERY
- #define AGESA_ENTRY_INIT_RECOVERY FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_EARLY
- #define AGESA_ENTRY_INIT_EARLY FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_POST
- #define AGESA_ENTRY_INIT_POST FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_ENV
- #define AGESA_ENTRY_INIT_ENV FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_MID
- #define AGESA_ENTRY_INIT_MID FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE
- #define AGESA_ENTRY_INIT_LATE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_S3SAVE
- #define AGESA_ENTRY_INIT_S3SAVE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RESUME
- #define AGESA_ENTRY_INIT_RESUME FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
- #define AGESA_ENTRY_INIT_LATE_RESTORE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
- #define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
-#endif
-
-/* Default the late AP entry point to off. It can be enabled
- by any family that may need the late AP functionality, or
- by any feature code that may need it. The IBVs no longer
- have control over this entry point. */
-#ifdef AGESA_ENTRY_LATE_RUN_AP_TASK
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-#endif
-#define AGESA_ENTRY_LATE_RUN_AP_TASK FALSE
-
-
/* Process solution defined socket / family installations
*
@@ -2268,6 +2189,8 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
* Include the structure definitions for the defaults table structures
*
****************************************************************************/
+#include <CommonReturns.h>
+#include <agesa-entry-cfg.h>
#include "Options.h"
#include "OptionCpuFamiliesInstall.h"
#include "OptionsHt.h"
@@ -2484,171 +2407,6 @@ BUILD_OPT_CFG UserOptions = {
0, //reserved...
};
-CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
-{
- #if AGESA_ENTRY_INIT_RESET == TRUE
- { AMD_INIT_RESET,
- sizeof (AMD_RESET_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitResetConstructor,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_RESET_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_RECOVERY == TRUE
- { AMD_INIT_RECOVERY,
- sizeof (AMD_RECOVERY_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitRecoveryInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_POST_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_EARLY == TRUE
- { AMD_INIT_EARLY,
- sizeof (AMD_EARLY_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_EARLY_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_ENV == TRUE
- { AMD_INIT_ENV,
- sizeof (AMD_ENV_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_ENV_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE == TRUE
- { AMD_INIT_LATE,
- sizeof (AMD_LATE_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitLateInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
- AMD_INIT_LATE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_MID == TRUE
- { AMD_INIT_MID,
- sizeof (AMD_MID_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitMidInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_MID_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_POST == TRUE
- { AMD_INIT_POST,
- sizeof (AMD_POST_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitPostInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
- AMD_INIT_POST_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_RESUME == TRUE
- { AMD_INIT_RESUME,
- sizeof (AMD_RESUME_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
- AMD_INIT_RESUME_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
- { AMD_S3LATE_RESTORE,
- sizeof (AMD_S3LATE_PARAMS),
- (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_S3_LATE_RESTORE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_S3SAVE == TRUE
- { AMD_S3_SAVE,
- sizeof (AMD_S3SAVE_PARAMS),
- (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
- (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
- AMD_S3_SAVE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
- { AMD_LATE_RUN_AP_TASK,
- sizeof (AP_EXE_PARAMS),
- (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_LATE_RUN_AP_TASK_HANDLE
- },
- #endif
- { 0, 0, NULL }
-};
-
-CONST UINTN InitializerCount = ((sizeof (FuncParamsInfo)) / (sizeof (FuncParamsInfo[0])));
-
-CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
-{
- { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
- { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
-
- #if AGESA_ENTRY_INIT_RESET == TRUE
- { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
- #endif
-
- #if AGESA_ENTRY_INIT_RECOVERY == TRUE
- { AMD_INIT_RECOVERY, (IMAGE_ENTRY)AmdInitRecovery },
- #endif
-
- #if AGESA_ENTRY_INIT_EARLY == TRUE
- { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
- #endif
-
- #if AGESA_ENTRY_INIT_POST == TRUE
- { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
- #endif
-
- #if AGESA_ENTRY_INIT_ENV == TRUE
- { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
- #endif
-
- #if AGESA_ENTRY_INIT_MID == TRUE
- { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE == TRUE
- { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
- #endif
-
- #if AGESA_ENTRY_INIT_S3SAVE == TRUE
- { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
- #endif
-
- #if AGESA_ENTRY_INIT_RESUME == TRUE
- { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
- { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
- #endif
-
- #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
- { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
- { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
- { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
- { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
- { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
- { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
- #endif
-
- #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
- { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
- #endif
- { 0, NULL }
-};
-
CONST DISPATCH_TABLE ROMDATA ApDispatchTable[] =
{
IDS_LATE_RUN_AP_TASK
diff --git a/src/vendorcode/amd/agesa/f14/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f14/Include/OptionDmiInstall.h
index 31111e3..eb4bc91 100644
--- a/src/vendorcode/amd/agesa/f14/Include/OptionDmiInstall.h
+++ b/src/vendorcode/amd/agesa/f14/Include/OptionDmiInstall.h
@@ -66,8 +66,6 @@
// This additional check keeps AP launch routines from being unnecessarily included
// in single socket systems.
#if OPTION_MULTISOCKET == TRUE
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
- #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
#define CPU_DMI_AP_GET_TYPE4_TYPE7 {AP_LATE_TASK_GET_TYPE4_TYPE7, (IMAGE_ENTRY) GetType4Type7Info},
#else
#define CPU_DMI_AP_GET_TYPE4_TYPE7
diff --git a/src/vendorcode/amd/agesa/f14/Include/OptionHtAssistInstall.h b/src/vendorcode/amd/agesa/f14/Include/OptionHtAssistInstall.h
index d98300f..175482b 100644
--- a/src/vendorcode/amd/agesa/f14/Include/OptionHtAssistInstall.h
+++ b/src/vendorcode/amd/agesa/f14/Include/OptionHtAssistInstall.h
@@ -97,8 +97,6 @@
&HtAssistFamilyServiceArray[0]
};
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
- #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
#undef HT_ASSIST_AP_DISABLE_CACHE
#define HT_ASSIST_AP_DISABLE_CACHE {AP_LATE_TASK_DISABLE_CACHE, (IMAGE_ENTRY) DisableAllCaches},
#undef HT_ASSIST_AP_ENABLE_CACHE
diff --git a/src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h
index 8641589..9a8bd68 100644
--- a/src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h
+++ b/src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h
@@ -51,31 +51,6 @@
*
****************************************************************************/
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image. Turn these on in your option c file, not
- * here.
- */
-// #define AGESA_ENTRY_INIT_RESET TRUE
-// #define AGESA_ENTRY_INIT_RECOVERY TRUE
-// #define AGESA_ENTRY_INIT_EARLY TRUE
-// #define AGESA_ENTRY_INIT_POST TRUE
-// #define AGESA_ENTRY_INIT_ENV TRUE
-// #define AGESA_ENTRY_INIT_MID TRUE
-// #define AGESA_ENTRY_INIT_LATE TRUE
-// #define AGESA_ENTRY_INIT_S3SAVE TRUE
-// #define AGESA_ENTRY_INIT_RESUME TRUE
-// #define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-// #define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
-
-/* Defaults for private/internal build control settings */
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.
- */
-
VOLATILE AMD_MODULE_HEADER mCpuModuleID = {
//ModuleHeaderSignature
// Remove 'DOM$' as temp solution before update BinUtil.exe ,
@@ -90,62 +65,6 @@ VOLATILE AMD_MODULE_HEADER mCpuModuleID = {
NULL
};
-/* Process user desired AGESA entry points */
-#ifndef AGESA_ENTRY_INIT_RESET
- #define AGESA_ENTRY_INIT_RESET FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RECOVERY
- #define AGESA_ENTRY_INIT_RECOVERY FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_EARLY
- #define AGESA_ENTRY_INIT_EARLY FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_POST
- #define AGESA_ENTRY_INIT_POST FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_ENV
- #define AGESA_ENTRY_INIT_ENV FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_MID
- #define AGESA_ENTRY_INIT_MID FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE
- #define AGESA_ENTRY_INIT_LATE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_S3SAVE
- #define AGESA_ENTRY_INIT_S3SAVE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RESUME
- #define AGESA_ENTRY_INIT_RESUME FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
- #define AGESA_ENTRY_INIT_LATE_RESTORE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
- #define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
-#endif
-
-/* Default the late AP entry point to off. It can be enabled
- by any family that may need the late AP functionality, or
- by any feature code that may need it. The IBVs no longer
- have control over this entry point. */
-#ifdef AGESA_ENTRY_LATE_RUN_AP_TASK
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-#endif
-#define AGESA_ENTRY_LATE_RUN_AP_TASK FALSE
-
-
-
/* Process solution defined socket / family installations
*
* As part of the release package for each image, define the options below to select the
@@ -2149,12 +2068,13 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
#define OPTFCN_PSTATE_LEVELING CommonReturnAgesaSuccess
#endif
-
/*****************************************************************************
*
* Include the structure definitions for the defaults table structures
*
****************************************************************************/
+#include <CommonReturns.h>
+#include <agesa-entry-cfg.h>
#include "Options.h"
#include "OptionCpuFamiliesInstall.h"
#include "OptionsHt.h"
@@ -2329,170 +2249,6 @@ BUILD_OPT_CFG UserOptions = {
0, //reserved...
};
-CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
-{
- #if AGESA_ENTRY_INIT_RESET == TRUE
- { AMD_INIT_RESET,
- sizeof (AMD_RESET_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitResetConstructor,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_RESET_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_RECOVERY == TRUE
- { AMD_INIT_RECOVERY,
- sizeof (AMD_RECOVERY_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitRecoveryInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_POST_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_EARLY == TRUE
- { AMD_INIT_EARLY,
- sizeof (AMD_EARLY_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_EARLY_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_ENV == TRUE
- { AMD_INIT_ENV,
- sizeof (AMD_ENV_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_ENV_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE == TRUE
- { AMD_INIT_LATE,
- sizeof (AMD_LATE_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitLateInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
- AMD_INIT_LATE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_MID == TRUE
- { AMD_INIT_MID,
- sizeof (AMD_MID_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitMidInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_MID_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_POST == TRUE
- { AMD_INIT_POST,
- sizeof (AMD_POST_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitPostInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
- AMD_INIT_POST_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_RESUME == TRUE
- { AMD_INIT_RESUME,
- sizeof (AMD_RESUME_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
- AMD_INIT_RESUME_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
- { AMD_S3LATE_RESTORE,
- sizeof (AMD_S3LATE_PARAMS),
- (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_S3_LATE_RESTORE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_S3SAVE == TRUE
- { AMD_S3_SAVE,
- sizeof (AMD_S3SAVE_PARAMS),
- (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
- (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
- AMD_S3_SAVE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
- { AMD_LATE_RUN_AP_TASK,
- sizeof (AP_EXE_PARAMS),
- (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_LATE_RUN_AP_TASK_HANDLE
- },
- #endif
- { 0, 0, NULL }
-};
-
-CONST UINTN InitializerCount = ((sizeof (FuncParamsInfo)) / (sizeof (FuncParamsInfo[0])));
-
-CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
-{
- { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
- { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
-
- #if AGESA_ENTRY_INIT_RESET == TRUE
- { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
- #endif
-
- #if AGESA_ENTRY_INIT_RECOVERY == TRUE
- { AMD_INIT_RECOVERY, (IMAGE_ENTRY)AmdInitRecovery },
- #endif
-
- #if AGESA_ENTRY_INIT_EARLY == TRUE
- { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
- #endif
-
- #if AGESA_ENTRY_INIT_POST == TRUE
- { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
- #endif
-
- #if AGESA_ENTRY_INIT_ENV == TRUE
- { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
- #endif
-
- #if AGESA_ENTRY_INIT_MID == TRUE
- { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE == TRUE
- { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
- #endif
-
- #if AGESA_ENTRY_INIT_S3SAVE == TRUE
- { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
- #endif
-
- #if AGESA_ENTRY_INIT_RESUME == TRUE
- { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
- { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
- #endif
-
- #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
- { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
- { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
- { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
- { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
- { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
- { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
- #endif
-
- #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
- { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
- #endif
- { 0, NULL }
-};
CONST DISPATCH_TABLE ROMDATA ApDispatchTable[] =
{
diff --git a/src/vendorcode/amd/agesa/f15/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f15/Include/OptionDmiInstall.h
index a6d48b3..b09a58f 100644
--- a/src/vendorcode/amd/agesa/f15/Include/OptionDmiInstall.h
+++ b/src/vendorcode/amd/agesa/f15/Include/OptionDmiInstall.h
@@ -64,8 +64,6 @@
// This additional check keeps AP launch routines from being unnecessarily included
// in single socket systems.
#if OPTION_MULTISOCKET == TRUE
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
- #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
#define CPU_DMI_AP_GET_TYPE4_TYPE7 {AP_LATE_TASK_GET_TYPE4_TYPE7, (IMAGE_ENTRY) GetType4Type7Info},
#else
#define CPU_DMI_AP_GET_TYPE4_TYPE7
diff --git a/src/vendorcode/amd/agesa/f15/Include/OptionL3FeaturesInstall.h b/src/vendorcode/amd/agesa/f15/Include/OptionL3FeaturesInstall.h
index 5804f1d..4a73c40 100644
--- a/src/vendorcode/amd/agesa/f15/Include/OptionL3FeaturesInstall.h
+++ b/src/vendorcode/amd/agesa/f15/Include/OptionL3FeaturesInstall.h
@@ -94,8 +94,6 @@
#endif
#endif
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
- #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
#undef L3_FEAT_AP_DISABLE_CACHE
#define L3_FEAT_AP_DISABLE_CACHE {AP_LATE_TASK_DISABLE_CACHE, (IMAGE_ENTRY) DisableAllCaches},
#undef L3_FEAT_AP_ENABLE_CACHE
diff --git a/src/vendorcode/amd/agesa/f15/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f15/Include/PlatformInstall.h
index 38ec4ad..0e6f1c8 100644
--- a/src/vendorcode/amd/agesa/f15/Include/PlatformInstall.h
+++ b/src/vendorcode/amd/agesa/f15/Include/PlatformInstall.h
@@ -49,31 +49,6 @@
*
****************************************************************************/
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image. Turn these on in your option c file, not
- * here.
- */
-// #define AGESA_ENTRY_INIT_RESET TRUE
-// #define AGESA_ENTRY_INIT_RECOVERY TRUE
-// #define AGESA_ENTRY_INIT_EARLY TRUE
-// #define AGESA_ENTRY_INIT_POST TRUE
-// #define AGESA_ENTRY_INIT_ENV TRUE
-// #define AGESA_ENTRY_INIT_MID TRUE
-// #define AGESA_ENTRY_INIT_LATE TRUE
-// #define AGESA_ENTRY_INIT_S3SAVE TRUE
-// #define AGESA_ENTRY_INIT_RESUME TRUE
-// #define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-// #define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
-
-/* Defaults for private/internal build control settings */
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.
- */
-
VOLATILE AMD_MODULE_HEADER mCpuModuleID = {
//ModuleHeaderSignature
// Remove 'DOM$' as temp solution before update BinUtil.exe ,
@@ -88,61 +63,6 @@ VOLATILE AMD_MODULE_HEADER mCpuModuleID = {
NULL
};
-/* Process user desired AGESA entry points */
-#ifndef AGESA_ENTRY_INIT_RESET
- #define AGESA_ENTRY_INIT_RESET FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RECOVERY
- #define AGESA_ENTRY_INIT_RECOVERY FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_EARLY
- #define AGESA_ENTRY_INIT_EARLY FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_POST
- #define AGESA_ENTRY_INIT_POST FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_ENV
- #define AGESA_ENTRY_INIT_ENV FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_MID
- #define AGESA_ENTRY_INIT_MID FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE
- #define AGESA_ENTRY_INIT_LATE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_S3SAVE
- #define AGESA_ENTRY_INIT_S3SAVE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RESUME
- #define AGESA_ENTRY_INIT_RESUME FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
- #define AGESA_ENTRY_INIT_LATE_RESTORE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
- #define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
-#endif
-
-/* Default the late AP entry point to off. It can be enabled
- by any family that may need the late AP functionality, or
- by any feature code that may need it. The IBVs no longer
- have control over this entry point. */
-#ifdef AGESA_ENTRY_LATE_RUN_AP_TASK
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-#endif
-#define AGESA_ENTRY_LATE_RUN_AP_TASK FALSE
-
-
/* Process solution defined socket / family installations
*
@@ -2249,6 +2169,8 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
* Include the structure definitions for the defaults table structures
*
****************************************************************************/
+#include <CommonReturns.h>
+#include <agesa-entry-cfg.h>
#include "Options.h"
#include "OptionCpuFamiliesInstall.h"
#include "OptionsHt.h"
@@ -2499,171 +2421,6 @@ BUILD_OPT_CFG UserOptions = {
0, //reserved...
};
-CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
-{
- #if AGESA_ENTRY_INIT_RESET == TRUE
- { AMD_INIT_RESET,
- sizeof (AMD_RESET_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitResetConstructor,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_RESET_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_RECOVERY == TRUE
- { AMD_INIT_RECOVERY,
- sizeof (AMD_RECOVERY_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitRecoveryInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_POST_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_EARLY == TRUE
- { AMD_INIT_EARLY,
- sizeof (AMD_EARLY_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_EARLY_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_ENV == TRUE
- { AMD_INIT_ENV,
- sizeof (AMD_ENV_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_ENV_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE == TRUE
- { AMD_INIT_LATE,
- sizeof (AMD_LATE_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitLateInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
- AMD_INIT_LATE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_MID == TRUE
- { AMD_INIT_MID,
- sizeof (AMD_MID_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitMidInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_MID_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_POST == TRUE
- { AMD_INIT_POST,
- sizeof (AMD_POST_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitPostInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
- AMD_INIT_POST_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_RESUME == TRUE
- { AMD_INIT_RESUME,
- sizeof (AMD_RESUME_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
- AMD_INIT_RESUME_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
- { AMD_S3LATE_RESTORE,
- sizeof (AMD_S3LATE_PARAMS),
- (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_S3_LATE_RESTORE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_S3SAVE == TRUE
- { AMD_S3_SAVE,
- sizeof (AMD_S3SAVE_PARAMS),
- (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
- (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
- AMD_S3_SAVE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
- { AMD_LATE_RUN_AP_TASK,
- sizeof (AP_EXE_PARAMS),
- (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_LATE_RUN_AP_TASK_HANDLE
- },
- #endif
- { 0, 0, NULL, NULL, 0 }
-};
-
-CONST UINTN InitializerCount = ((sizeof (FuncParamsInfo)) / (sizeof (FuncParamsInfo[0])));
-
-CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
-{
- { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
- { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
-
- #if AGESA_ENTRY_INIT_RESET == TRUE
- { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
- #endif
-
- #if AGESA_ENTRY_INIT_RECOVERY == TRUE
- { AMD_INIT_RECOVERY, (IMAGE_ENTRY)AmdInitRecovery },
- #endif
-
- #if AGESA_ENTRY_INIT_EARLY == TRUE
- { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
- #endif
-
- #if AGESA_ENTRY_INIT_POST == TRUE
- { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
- #endif
-
- #if AGESA_ENTRY_INIT_ENV == TRUE
- { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
- #endif
-
- #if AGESA_ENTRY_INIT_MID == TRUE
- { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE == TRUE
- { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
- #endif
-
- #if AGESA_ENTRY_INIT_S3SAVE == TRUE
- { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
- #endif
-
- #if AGESA_ENTRY_INIT_RESUME == TRUE
- { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
- { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
- #endif
-
- #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
- { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
- { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
- { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
- { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
- { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
- { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
- #endif
-
- #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
- { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
- #endif
- { 0, NULL }
-};
-
CONST DISPATCH_TABLE ROMDATA ApDispatchTable[] =
{
IDS_LATE_RUN_AP_TASK
diff --git a/src/vendorcode/amd/agesa/f15tn/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f15tn/Include/OptionDmiInstall.h
index fb1b54d..541cee9 100644
--- a/src/vendorcode/amd/agesa/f15tn/Include/OptionDmiInstall.h
+++ b/src/vendorcode/amd/agesa/f15tn/Include/OptionDmiInstall.h
@@ -63,8 +63,6 @@
// This additional check keeps AP launch routines from being unnecessarily included
// in single socket systems.
#if OPTION_MULTISOCKET == TRUE
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
- #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
#define CPU_DMI_AP_GET_TYPE4_TYPE7 {AP_LATE_TASK_GET_TYPE4_TYPE7, (IMAGE_ENTRY) GetType4Type7Info},
#else
#define CPU_DMI_AP_GET_TYPE4_TYPE7
diff --git a/src/vendorcode/amd/agesa/f15tn/Include/OptionL3FeaturesInstall.h b/src/vendorcode/amd/agesa/f15tn/Include/OptionL3FeaturesInstall.h
index 5d188e2..203b9e2 100644
--- a/src/vendorcode/amd/agesa/f15tn/Include/OptionL3FeaturesInstall.h
+++ b/src/vendorcode/amd/agesa/f15tn/Include/OptionL3FeaturesInstall.h
@@ -82,8 +82,6 @@
#endif
#endif
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
- #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
#undef L3_FEAT_AP_DISABLE_CACHE
#define L3_FEAT_AP_DISABLE_CACHE {AP_LATE_TASK_DISABLE_CACHE, (IMAGE_ENTRY) DisableAllCaches},
#undef L3_FEAT_AP_ENABLE_CACHE
diff --git a/src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h
index eca567b..af5c8b7 100644
--- a/src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h
+++ b/src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h
@@ -48,31 +48,6 @@
*
****************************************************************************/
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image. Turn these on in your option c file, not
- * here.
- */
-// #define AGESA_ENTRY_INIT_RESET TRUE
-// #define AGESA_ENTRY_INIT_RECOVERY TRUE
-// #define AGESA_ENTRY_INIT_EARLY TRUE
-// #define AGESA_ENTRY_INIT_POST TRUE
-// #define AGESA_ENTRY_INIT_ENV TRUE
-// #define AGESA_ENTRY_INIT_MID TRUE
-// #define AGESA_ENTRY_INIT_LATE TRUE
-// #define AGESA_ENTRY_INIT_S3SAVE TRUE
-// #define AGESA_ENTRY_INIT_RESUME TRUE
-// #define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-// #define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
-
-/* Defaults for private/internal build control settings */
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.
- */
-
VOLATILE AMD_MODULE_HEADER mCpuModuleID = {
//ModuleHeaderSignature
// Remove 'DOM$' as temp solution before update BinUtil.exe ,
@@ -87,61 +62,6 @@ VOLATILE AMD_MODULE_HEADER mCpuModuleID = {
NULL
};
-/* Process user desired AGESA entry points */
-#ifndef AGESA_ENTRY_INIT_RESET
- #define AGESA_ENTRY_INIT_RESET FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RECOVERY
- #define AGESA_ENTRY_INIT_RECOVERY FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_EARLY
- #define AGESA_ENTRY_INIT_EARLY FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_POST
- #define AGESA_ENTRY_INIT_POST FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_ENV
- #define AGESA_ENTRY_INIT_ENV FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_MID
- #define AGESA_ENTRY_INIT_MID FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE
- #define AGESA_ENTRY_INIT_LATE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_S3SAVE
- #define AGESA_ENTRY_INIT_S3SAVE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RESUME
- #define AGESA_ENTRY_INIT_RESUME FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
- #define AGESA_ENTRY_INIT_LATE_RESTORE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
- #define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
-#endif
-
-/* Default the late AP entry point to off. It can be enabled
- by any family that may need the late AP functionality, or
- by any feature code that may need it. The IBVs no longer
- have control over this entry point. */
-#ifdef AGESA_ENTRY_LATE_RUN_AP_TASK
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-#endif
-#define AGESA_ENTRY_LATE_RUN_AP_TASK FALSE
-
-
/* Process solution defined socket / family installations
*
@@ -2618,6 +2538,8 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
* Include the structure definitions for the defaults table structures
*
****************************************************************************/
+#include <CommonReturns.h>
+#include <agesa-entry-cfg.h>
#include "Options.h"
#include "OptionCpuFamiliesInstall.h"
#include "OptionsHt.h"
@@ -2883,171 +2805,6 @@ BUILD_OPT_CFG UserOptions = {
0, //reserved...
};
-CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
-{
- #if AGESA_ENTRY_INIT_RESET == TRUE
- { AMD_INIT_RESET,
- sizeof (AMD_RESET_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitResetConstructor,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_RESET_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_RECOVERY == TRUE
- { AMD_INIT_RECOVERY,
- sizeof (AMD_RECOVERY_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitRecoveryInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_POST_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_EARLY == TRUE
- { AMD_INIT_EARLY,
- sizeof (AMD_EARLY_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_EARLY_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_ENV == TRUE
- { AMD_INIT_ENV,
- sizeof (AMD_ENV_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_ENV_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE == TRUE
- { AMD_INIT_LATE,
- sizeof (AMD_LATE_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitLateInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
- AMD_INIT_LATE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_MID == TRUE
- { AMD_INIT_MID,
- sizeof (AMD_MID_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitMidInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_MID_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_POST == TRUE
- { AMD_INIT_POST,
- sizeof (AMD_POST_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitPostInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
- AMD_INIT_POST_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_RESUME == TRUE
- { AMD_INIT_RESUME,
- sizeof (AMD_RESUME_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
- AMD_INIT_RESUME_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
- { AMD_S3LATE_RESTORE,
- sizeof (AMD_S3LATE_PARAMS),
- (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_S3_LATE_RESTORE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_S3SAVE == TRUE
- { AMD_S3_SAVE,
- sizeof (AMD_S3SAVE_PARAMS),
- (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
- (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
- AMD_S3_SAVE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
- { AMD_LATE_RUN_AP_TASK,
- sizeof (AP_EXE_PARAMS),
- (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_LATE_RUN_AP_TASK_HANDLE
- },
- #endif
- { 0, 0, NULL, NULL, 0 }
-};
-
-CONST UINTN InitializerCount = ((sizeof (FuncParamsInfo)) / (sizeof (FuncParamsInfo[0])));
-
-CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
-{
- { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
- { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
-
- #if AGESA_ENTRY_INIT_RESET == TRUE
- { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
- #endif
-
- #if AGESA_ENTRY_INIT_RECOVERY == TRUE
- { AMD_INIT_RECOVERY, (IMAGE_ENTRY)AmdInitRecovery },
- #endif
-
- #if AGESA_ENTRY_INIT_EARLY == TRUE
- { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
- #endif
-
- #if AGESA_ENTRY_INIT_POST == TRUE
- { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
- #endif
-
- #if AGESA_ENTRY_INIT_ENV == TRUE
- { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
- #endif
-
- #if AGESA_ENTRY_INIT_MID == TRUE
- { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE == TRUE
- { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
- #endif
-
- #if AGESA_ENTRY_INIT_S3SAVE == TRUE
- { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
- #endif
-
- #if AGESA_ENTRY_INIT_RESUME == TRUE
- { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
- { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
- #endif
-
- #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
- { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
- { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
- { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
- { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
- { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
- { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
- #endif
-
- #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
- { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
- #endif
- { 0, NULL }
-};
-
CONST DISPATCH_TABLE ROMDATA ApDispatchTable[] =
{
IDS_LATE_RUN_AP_TASK
diff --git a/src/vendorcode/amd/agesa/f16kb/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f16kb/Include/OptionDmiInstall.h
index ce8ef06..e0b09b3 100644
--- a/src/vendorcode/amd/agesa/f16kb/Include/OptionDmiInstall.h
+++ b/src/vendorcode/amd/agesa/f16kb/Include/OptionDmiInstall.h
@@ -75,8 +75,6 @@ OPTION_DMI_RELEASE_BUFFER ReleaseDmiBufferStub;
// This additional check keeps AP launch routines from being unnecessarily included
// in single socket systems.
#if OPTION_MULTISOCKET == TRUE
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
- #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
#undef CPU_DMI_AP_GET_TYPE4_TYPE7
#define CPU_DMI_AP_GET_TYPE4_TYPE7 {AP_LATE_TASK_GET_TYPE4_TYPE7, (IMAGE_ENTRY) GetType4Type7Info},
#endif
diff --git a/src/vendorcode/amd/agesa/f16kb/Include/OptionL3FeaturesInstall.h b/src/vendorcode/amd/agesa/f16kb/Include/OptionL3FeaturesInstall.h
index 8d34603..3323fea 100644
--- a/src/vendorcode/amd/agesa/f16kb/Include/OptionL3FeaturesInstall.h
+++ b/src/vendorcode/amd/agesa/f16kb/Include/OptionL3FeaturesInstall.h
@@ -57,8 +57,6 @@
#if (OPTION_HT_ASSIST == TRUE || OPTION_ATM_MODE == TRUE || OPTION_NBR_CACHE == TRUE)
#if (AGESA_ENTRY_INIT_EARLY == TRUE) || (AGESA_ENTRY_INIT_POST == TRUE) || (AGESA_ENTRY_INIT_MID == TRUE) || (AGESA_ENTRY_INIT_LATE_RESTORE == TRUE)
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
- #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
#undef L3_FEAT_AP_DISABLE_CACHE
#define L3_FEAT_AP_DISABLE_CACHE {AP_LATE_TASK_DISABLE_CACHE, (IMAGE_ENTRY) DisableAllCaches},
#undef L3_FEAT_AP_ENABLE_CACHE
diff --git a/src/vendorcode/amd/agesa/f16kb/Include/OptionPrefetchModeInstall.h b/src/vendorcode/amd/agesa/f16kb/Include/OptionPrefetchModeInstall.h
index aa510aa..711b1a3 100644
--- a/src/vendorcode/amd/agesa/f16kb/Include/OptionPrefetchModeInstall.h
+++ b/src/vendorcode/amd/agesa/f16kb/Include/OptionPrefetchModeInstall.h
@@ -57,8 +57,6 @@
#if OPTION_PREFETCH_MODE == TRUE
#if (AGESA_ENTRY_INIT_LATE == TRUE) || (AGESA_ENTRY_INIT_LATE_RESTORE == TRUE)
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
- #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
#undef CPU_PREFETCH_MODE_AP_TASK
#define CPU_PREFETCH_MODE_AP_TASK {AP_LATE_TASK_CPU_PREFETCH_MODE, (IMAGE_ENTRY) CpuPrefetchModeApTask},
diff --git a/src/vendorcode/amd/agesa/f16kb/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f16kb/Include/PlatformInstall.h
index 1295888..afe15b6 100644
--- a/src/vendorcode/amd/agesa/f16kb/Include/PlatformInstall.h
+++ b/src/vendorcode/amd/agesa/f16kb/Include/PlatformInstall.h
@@ -48,31 +48,6 @@
*
****************************************************************************/
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image. Turn these on in your option c file, not
- * here.
- */
-// #define AGESA_ENTRY_INIT_RESET TRUE
-// #define AGESA_ENTRY_INIT_RECOVERY TRUE
-// #define AGESA_ENTRY_INIT_EARLY TRUE
-// #define AGESA_ENTRY_INIT_POST TRUE
-// #define AGESA_ENTRY_INIT_ENV TRUE
-// #define AGESA_ENTRY_INIT_MID TRUE
-// #define AGESA_ENTRY_INIT_LATE TRUE
-// #define AGESA_ENTRY_INIT_S3SAVE TRUE
-// #define AGESA_ENTRY_INIT_RESUME TRUE
-// #define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-// #define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
-
-/* Defaults for private/internal build control settings */
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.
- */
-
VOLATILE AMD_MODULE_HEADER mCpuModuleID = {
//ModuleHeaderSignature
// Remove 'DOM$' as temp solution before update BinUtil.exe ,
@@ -87,62 +62,6 @@ VOLATILE AMD_MODULE_HEADER mCpuModuleID = {
NULL
};
-/* Process user desired AGESA entry points */
-#ifndef AGESA_ENTRY_INIT_RESET
- #define AGESA_ENTRY_INIT_RESET FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RECOVERY
- #define AGESA_ENTRY_INIT_RECOVERY FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_EARLY
- #define AGESA_ENTRY_INIT_EARLY FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_POST
- #define AGESA_ENTRY_INIT_POST FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_ENV
- #define AGESA_ENTRY_INIT_ENV FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_MID
- #define AGESA_ENTRY_INIT_MID FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE
- #define AGESA_ENTRY_INIT_LATE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_S3SAVE
- #define AGESA_ENTRY_INIT_S3SAVE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RESUME
- #define AGESA_ENTRY_INIT_RESUME FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
- #define AGESA_ENTRY_INIT_LATE_RESTORE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
- #define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
-#endif
-
-/* Default the late AP entry point to off. It can be enabled
- by any family that may need the late AP functionality, or
- by any feature code that may need it. The IBVs no longer
- have control over this entry point. */
-#ifdef AGESA_ENTRY_LATE_RUN_AP_TASK
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-#endif
-#define AGESA_ENTRY_LATE_RUN_AP_TASK FALSE
-
-
-
/* Process solution defined socket / family installations
*
* As part of the release package for each image, define the options below to select the
@@ -1727,6 +1646,8 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
* Include the structure definitions for the defaults table structures
*
****************************************************************************/
+#include <CommonReturns.h>
+#include <agesa-entry-cfg.h>
#include "Options.h"
#include "OptionCpuFamiliesInstall.h"
#include "OptionsHt.h"
@@ -2008,174 +1929,6 @@ BUILD_OPT_CFG UserOptions = {
0, //reserved...
};
-CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
-{
- #if AGESA_ENTRY_INIT_RESET == TRUE
- { AMD_INIT_RESET,
- sizeof (AMD_RESET_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitResetConstructor,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_RESET_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_RECOVERY == TRUE
- { AMD_INIT_RECOVERY,
- sizeof (AMD_RECOVERY_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitRecoveryInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_POST_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_EARLY == TRUE
- { AMD_INIT_EARLY,
- sizeof (AMD_EARLY_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_EARLY_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_ENV == TRUE
- { AMD_INIT_ENV,
- sizeof (AMD_ENV_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_ENV_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE == TRUE
- { AMD_INIT_LATE,
- sizeof (AMD_LATE_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitLateInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
- AMD_INIT_LATE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_MID == TRUE
- { AMD_INIT_MID,
- sizeof (AMD_MID_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitMidInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_MID_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_POST == TRUE
- { AMD_INIT_POST,
- sizeof (AMD_POST_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitPostInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
- AMD_INIT_POST_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_RESUME == TRUE
- { AMD_INIT_RESUME,
- sizeof (AMD_RESUME_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
- AMD_INIT_RESUME_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
- { AMD_S3LATE_RESTORE,
- sizeof (AMD_S3LATE_PARAMS),
- (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_S3_LATE_RESTORE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_S3SAVE == TRUE
- { AMD_S3_SAVE,
- sizeof (AMD_S3SAVE_PARAMS),
- (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
- (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
- AMD_S3_SAVE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
- { AMD_LATE_RUN_AP_TASK,
- sizeof (AP_EXE_PARAMS),
- (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_LATE_RUN_AP_TASK_HANDLE
- },
- #endif
- { 0, 0, NULL, NULL, 0 }
-};
-
-CONST UINTN InitializerCount = ((sizeof (FuncParamsInfo)) / (sizeof (FuncParamsInfo[0])));
-
-CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
-{
- { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
- { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
-
- #if AGESA_ENTRY_INIT_RESET == TRUE
- { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
- #endif
-
- #if AGESA_ENTRY_INIT_RECOVERY == TRUE
- { AMD_INIT_RECOVERY, (IMAGE_ENTRY)AmdInitRecovery },
- #endif
-
- #if AGESA_ENTRY_INIT_EARLY == TRUE
- { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
- #endif
-
- #if AGESA_ENTRY_INIT_POST == TRUE
- { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
- #if OPTION_DATA_EYE == TRUE
- { AMD_GET_2D_DATA_EYE, (IMAGE_ENTRY)AmdGet2DDataEye },
- #endif
- #endif
-
- #if AGESA_ENTRY_INIT_ENV == TRUE
- { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
- #endif
-
- #if AGESA_ENTRY_INIT_MID == TRUE
- { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE == TRUE
- { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
- #endif
-
- #if AGESA_ENTRY_INIT_S3SAVE == TRUE
- { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
- #endif
-
- #if AGESA_ENTRY_INIT_RESUME == TRUE
- { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
- { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
- #endif
-
- #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
- { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
- { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
- { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
- { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
- { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
- { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
- #endif
-
- #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
- { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
- #endif
- { 0, NULL }
-};
-
CONST DISPATCH_TABLE ROMDATA ApDispatchTable[] =
{
IDS_LATE_RUN_AP_TASK
1
0
19 Apr '16
Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14416
-gerrit
commit 04759091fbcef3bf5d548641ca35b3e64eaf51ce
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Tue Apr 19 15:17:50 2016 +0300
AGESA vendorcode: Fix type mismatch
Fix is required to compile AGESA ramstage without raminit.
Change-Id: I783883fa7a12e8a647aa432535bb990a47257e9b
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h | 6 +++---
src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h | 10 +++++-----
src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h | 2 +-
src/vendorcode/amd/agesa/f14/Include/OptionMemoryInstall.h | 10 +++++-----
src/vendorcode/amd/agesa/f15/Include/OptionMemoryInstall.h | 10 +++++-----
src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h | 10 +++++-----
src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h | 10 +++++-----
7 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h
index 3516fcb..23422a5 100644
--- a/src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h
+++ b/src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h
@@ -2563,7 +2563,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
- NULL
+ 0
};
/*---------------------------------------------------------------------------------------------------
@@ -2604,12 +2604,12 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
- NULL
+ 0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
- NULL
+ 0
};
#endif
/*---------------------------------------------------------------------------------------------------
diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h
index cfb55cc..4fd5354 100644
--- a/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h
+++ b/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h
@@ -4033,7 +4033,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
- NULL
+ 0
};
/*---------------------------------------------------------------------------------------------------
@@ -4086,18 +4086,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
- NULL
+ 0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
- NULL
+ 0
};
#endif
/*---------------------------------------------------------------------------------------------------
diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h
index d52adfb..7d6433d 100644
--- a/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h
+++ b/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h
@@ -129,7 +129,7 @@
#if AGESA_ENTRY_INIT_LATE == TRUE
#define USER_PSTATE_OPTION_MAIN CreatePStateAcpiTables
#else
- OPTION_ACPI_FEATURE CreateAcpiTablesStub;
+// OPTION_ACPI_FEATURE CreateAcpiTablesStub;
#define USER_PSTATE_OPTION_MAIN CreateAcpiTablesStub
#endif
#if AGESA_ENTRY_INIT_POST == TRUE
diff --git a/src/vendorcode/amd/agesa/f14/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f14/Include/OptionMemoryInstall.h
index 97b2d41..f97caa9 100644
--- a/src/vendorcode/amd/agesa/f14/Include/OptionMemoryInstall.h
+++ b/src/vendorcode/amd/agesa/f14/Include/OptionMemoryInstall.h
@@ -3865,7 +3865,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
- NULL
+ 0
};
/*---------------------------------------------------------------------------------------------------
@@ -3918,18 +3918,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
- NULL
+ 0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
- NULL
+ 0
};
#endif
/*---------------------------------------------------------------------------------------------------
diff --git a/src/vendorcode/amd/agesa/f15/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f15/Include/OptionMemoryInstall.h
index 24c1ae8..a4d8346 100644
--- a/src/vendorcode/amd/agesa/f15/Include/OptionMemoryInstall.h
+++ b/src/vendorcode/amd/agesa/f15/Include/OptionMemoryInstall.h
@@ -3629,7 +3629,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
- NULL
+ 0
};
/*---------------------------------------------------------------------------------------------------
@@ -3674,18 +3674,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
- NULL
+ 0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
- NULL
+ 0
};
#endif
/*---------------------------------------------------------------------------------------------------
diff --git a/src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h
index 873ed8b..e1c47ee 100644
--- a/src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h
+++ b/src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h
@@ -4687,7 +4687,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
- NULL
+ 0
};
/*---------------------------------------------------------------------------------------------------
@@ -4744,18 +4744,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
- NULL
+ 0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
- NULL
+ 0
};
#endif
/*---------------------------------------------------------------------------------------------------
diff --git a/src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h
index 1aaa027..647c370 100644
--- a/src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h
+++ b/src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h
@@ -1556,7 +1556,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
- NULL
+ 0
};
/*---------------------------------------------------------------------------------------------------
@@ -1581,18 +1581,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
- NULL
+ 0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
- NULL
+ 0
};
#endif
/*---------------------------------------------------------------------------------------------------
1
0
New patch to review for coreboot: intel/fsp_broadwell_de: fix SPD CBFS file type
by Stef van Os 19 Apr '16
by Stef van Os 19 Apr '16
19 Apr '16
Stef van Os (stef.van.os(a)prodrive-technologies.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14415
-gerrit
commit dd228ddcbab7c71f64ba323ab474d5edfa697e1f
Author: Stef van Os <stef.van.os(a)prodrive-technologies.com>
Date: Tue Apr 19 14:11:11 2016 +0200
intel/fsp_broadwell_de: fix SPD CBFS file type
File type for SPD in this soc is defined as CBFS_TYPE_RAW in Makefile, but CBFS_TYPE_SPD in code.
Causes DDR SPD not to be loaded on memory down.
Change-Id: I44525b4742b3f93d33f0c5bd9ed642c6fb06f23f
Signed-off-by: Stef van Os <stef.van.os(a)prodrive-technologies.com>
---
src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c
index cab4b59..7a9e8f5 100644
--- a/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c
+++ b/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c
@@ -62,16 +62,16 @@ static void ConfigureDefaultUpdData(UPD_DATA_REGION *UpdData)
if (IS_ENABLED(CONFIG_FSP_MEMORY_DOWN_CH0DIMM0_SPD_PRESENT))
UpdData->MemDownCh0Dimm0SpdPtr
- = (UINT32)cbfs_boot_map_with_leak("spd_ch0_dimm0.bin", CBFS_TYPE_RAW, NULL);
+ = (UINT32)cbfs_boot_map_with_leak("spd_ch0_dimm0.bin", CBFS_TYPE_SPD, NULL);
if (IS_ENABLED(CONFIG_FSP_MEMORY_DOWN_CH0DIMM1_SPD_PRESENT))
UpdData->MemDownCh0Dimm1SpdPtr
- = (UINT32)cbfs_boot_map_with_leak("spd_ch0_dimm1.bin", CBFS_TYPE_RAW, NULL);
+ = (UINT32)cbfs_boot_map_with_leak("spd_ch0_dimm1.bin", CBFS_TYPE_SPD, NULL);
if (IS_ENABLED(CONFIG_FSP_MEMORY_DOWN_CH1DIMM0_SPD_PRESENT))
UpdData->MemDownCh1Dimm0SpdPtr
- = (UINT32)cbfs_boot_map_with_leak("spd_ch1_dimm0.bin", CBFS_TYPE_RAW, NULL);
+ = (UINT32)cbfs_boot_map_with_leak("spd_ch1_dimm0.bin", CBFS_TYPE_SPD, NULL);
if (IS_ENABLED(CONFIG_FSP_MEMORY_DOWN_CH1DIMM1_SPD_PRESENT))
UpdData->MemDownCh1Dimm1SpdPtr
- = (UINT32)cbfs_boot_map_with_leak("spd_ch1_dimm1.bin", CBFS_TYPE_RAW, NULL);
+ = (UINT32)cbfs_boot_map_with_leak("spd_ch1_dimm1.bin", CBFS_TYPE_SPD, NULL);
} else {
UpdData->MemDownEnable = 0;
}
1
0
19 Apr '16
Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14414
-gerrit
commit f823c94bf8b80e4cad9485bbe943cfbf3105b304
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Tue Apr 19 07:17:59 2016 +0300
AGESA vendorcode: Link common amdlib
Having CFLAGS -Os disables -falign-functions. On unlucky builds
this may delay entry to ramstage by 600ms.
Change-Id: Ice6781666a0834f1e8e60a0c93048ac8472f27d9
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
src/cpu/amd/agesa/family15/fixme.c | 29 +
src/mainboard/advansus/a785e-i/Makefile.inc | 4 +-
src/mainboard/asus/m5a88-v/Makefile.inc | 4 +-
src/mainboard/avalue/eax-785e/Makefile.inc | 4 +-
src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c | 2 +-
.../jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h | 2 +-
src/southbridge/amd/agesa/hudson/imc.c | 2 +-
src/vendorcode/amd/agesa/common/amdlib.c | 1266 +++++++++++++++++++
src/vendorcode/amd/agesa/common/amdlib.h | 398 ++++++
src/vendorcode/amd/agesa/f10/Lib/amdlib.c | 1259 -------------------
src/vendorcode/amd/agesa/f10/Lib/amdlib.h | 374 ------
src/vendorcode/amd/agesa/f10/Makefile.inc | 9 +-
src/vendorcode/amd/agesa/f12/Lib/amdlib.c | 1262 -------------------
src/vendorcode/amd/agesa/f12/Lib/amdlib.h | 406 ------
src/vendorcode/amd/agesa/f12/Makefile.inc | 10 +-
src/vendorcode/amd/agesa/f14/Lib/amdlib.c | 1262 -------------------
src/vendorcode/amd/agesa/f14/Lib/amdlib.h | 408 -------
src/vendorcode/amd/agesa/f14/Makefile.inc | 11 +-
src/vendorcode/amd/agesa/f15/Lib/amdlib.c | 1283 -------------------
src/vendorcode/amd/agesa/f15/Lib/amdlib.h | 390 ------
src/vendorcode/amd/agesa/f15/Makefile.inc | 8 +-
src/vendorcode/amd/agesa/f15tn/Lib/amdlib.c | 1282 -------------------
src/vendorcode/amd/agesa/f15tn/Lib/amdlib.h | 358 ------
src/vendorcode/amd/agesa/f15tn/Makefile.inc | 8 +-
.../amd/agesa/f15tn/Proc/Fch/FchPlatform.h | 2 +-
.../amd/agesa/f15tn/Proc/IDS/Library/IdsLib.c | 9 +
src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c | 1289 --------------------
src/vendorcode/amd/agesa/f16kb/Lib/amdlib.h | 371 ------
src/vendorcode/amd/agesa/f16kb/Makefile.inc | 9 +-
.../amd/agesa/f16kb/Proc/IDS/Library/IdsLib.c | 9 +
30 files changed, 1767 insertions(+), 9963 deletions(-)
diff --git a/src/cpu/amd/agesa/family15/fixme.c b/src/cpu/amd/agesa/family15/fixme.c
index 04162e2..5633007 100644
--- a/src/cpu/amd/agesa/family15/fixme.c
+++ b/src/cpu/amd/agesa/family15/fixme.c
@@ -17,6 +17,35 @@
#include <northbridge/amd/agesa/agesawrapper.h>
#include "amdlib.h"
+UINT64
+MsrRead (
+ IN UINT32 MsrAddress
+ );
+
+VOID
+MsrWrite (
+ IN UINT32 MsrAddress,
+ IN UINT64 Value
+ );
+
+
+UINT64
+MsrRead (
+ IN UINT32 MsrAddress
+ )
+{
+ return __readmsr (MsrAddress);
+}
+
+VOID
+MsrWrite (
+ IN UINT32 MsrAddress,
+ IN UINT64 Value
+ )
+{
+ __writemsr (MsrAddress, Value);
+}
+
#if !IS_ENABLED(CONFIG_BOARD_AMD_DINAR)
void amd_initcpuio(void)
{
diff --git a/src/mainboard/advansus/a785e-i/Makefile.inc b/src/mainboard/advansus/a785e-i/Makefile.inc
index 45c257a..7b6a8e6 100644
--- a/src/mainboard/advansus/a785e-i/Makefile.inc
+++ b/src/mainboard/advansus/a785e-i/Makefile.inc
@@ -2,8 +2,8 @@
#SB800 CIMx share AGESA V5 lib code
ifneq ($(CONFIG_CPU_AMD_AGESA),y)
AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
- romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
- ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
+ romstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
+ ramstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
AGESA_INC := -I$(AGESA_ROOT)/ \
-I$(AGESA_ROOT)/../common \
diff --git a/src/mainboard/asus/m5a88-v/Makefile.inc b/src/mainboard/asus/m5a88-v/Makefile.inc
index 45c257a..7b6a8e6 100644
--- a/src/mainboard/asus/m5a88-v/Makefile.inc
+++ b/src/mainboard/asus/m5a88-v/Makefile.inc
@@ -2,8 +2,8 @@
#SB800 CIMx share AGESA V5 lib code
ifneq ($(CONFIG_CPU_AMD_AGESA),y)
AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
- romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
- ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
+ romstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
+ ramstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
AGESA_INC := -I$(AGESA_ROOT)/ \
-I$(AGESA_ROOT)/../common \
diff --git a/src/mainboard/avalue/eax-785e/Makefile.inc b/src/mainboard/avalue/eax-785e/Makefile.inc
index 45c257a..7b6a8e6 100644
--- a/src/mainboard/avalue/eax-785e/Makefile.inc
+++ b/src/mainboard/avalue/eax-785e/Makefile.inc
@@ -2,8 +2,8 @@
#SB800 CIMx share AGESA V5 lib code
ifneq ($(CONFIG_CPU_AMD_AGESA),y)
AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
- romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
- ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
+ romstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
+ ramstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
AGESA_INC := -I$(AGESA_ROOT)/ \
-I$(AGESA_ROOT)/../common \
diff --git a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c
index 038ad8b..37caa6e 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c
@@ -16,7 +16,7 @@
#include "AGESA.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <Lib/amdlib.h>
+#include <amdlib.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#include <vendorcode/amd/cimx/sb800/SB800.h>
#include <stdint.h>
diff --git a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
index d0a9892..a91bd0f 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
+++ b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
@@ -18,7 +18,7 @@
#define _PLATFORM_GNB_PCIE_COMPLEX_H
#include <vendorcode/amd/agesa/f14/AGESA.h>
-#include <vendorcode/amd/agesa/f14/Lib/amdlib.h>
+#include <amdlib.h>
/**
* @brief Graphic NorthBridge (GNB) General Purpose Port (GPP)
diff --git a/src/southbridge/amd/agesa/hudson/imc.c b/src/southbridge/amd/agesa/hudson/imc.c
index a077ade..4da6814 100644
--- a/src/southbridge/amd/agesa/hudson/imc.c
+++ b/src/southbridge/amd/agesa/hudson/imc.c
@@ -18,7 +18,7 @@
#include <delay.h>
#include "Porting.h"
#include "AGESA.h"
-#include <Lib/amdlib.h>
+#include <amdlib.h>
#include <Proc/Fch/Fch.h>
#include <Proc/Fch/Common/FchCommonCfg.h>
#include <Proc/Fch/FchPlatform.h>
diff --git a/src/vendorcode/amd/agesa/common/amdlib.c b/src/vendorcode/amd/agesa/common/amdlib.c
new file mode 100644
index 0000000..1f52fe0
--- /dev/null
+++ b/src/vendorcode/amd/agesa/common/amdlib.c
@@ -0,0 +1,1266 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * AMD Library
+ *
+ * Contains interface to the AMD AGESA library
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project: AGESA
+ * @e sub-project: Lib
+ * @e \$Revision: 44325 $ @e \$Date: 2010-12-22 03:29:53 -0700 (Wed, 22 Dec 2010) $
+ *
+ */
+/*
+ *****************************************************************************
+ *
+ * Copyright (c) 2011, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ***************************************************************************
+ *
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ * M O D U L E S U S E D
+ *----------------------------------------------------------------------------------------
+ */
+
+#include "AGESA.h"
+#include "Ids.h"
+#include "cpuRegisters.h"
+#include "amdlib.h"
+#include "Filecode.h"
+CODE_GROUP (G1_PEICC)
+RDATA_GROUP (G1_PEICC)
+
+#define FILECODE LIB_AMDLIB_FILECODE
+
+/*----------------------------------------------------------------------------------------
+ * D E F I N I T I O N S A N D M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ * T Y P E D E F S A N D S T R U C T U R E S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ * P R O T O T Y P E S O F L O C A L F U N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+BOOLEAN
+STATIC
+GetPciMmioAddress (
+ OUT UINT64 *MmioAddress,
+ OUT UINT32 *MmioSize,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+STATIC
+LibAmdGetDataFromPtr (
+ IN ACCESS_WIDTH AccessWidth,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ OUT UINT32 *TemData,
+ OUT UINT32 *TempDataMask
+ );
+
+/*----------------------------------------------------------------------------------------
+ * E X P O R T E D F U N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+UINT8
+ReadIo8 (
+ IN UINT16 Address
+ )
+{
+ return __inbyte (Address);
+}
+UINT16
+ReadIo16 (
+ IN UINT16 Address
+ )
+{
+ return __inword (Address);
+}
+UINT32
+ReadIo32 (
+ IN UINT16 Address
+ )
+{
+ return __indword (Address);
+}
+VOID
+WriteIo8 (
+ IN UINT16 Address,
+ IN UINT8 Data
+ )
+{
+ __outbyte (Address, Data);
+}
+VOID
+WriteIo16 (
+ IN UINT16 Address,
+ IN UINT16 Data
+ )
+{
+ __outword (Address, Data);
+}
+VOID
+WriteIo32 (
+ IN UINT16 Address,
+ IN UINT32 Data
+ )
+{
+ __outdword (Address, Data);
+}
+STATIC
+UINT64 SetFsBase (
+ UINT64 address
+ )
+{
+ UINT64 hwcr;
+ hwcr = __readmsr (0xC0010015);
+ __writemsr (0xC0010015, hwcr | 1 << 17);
+ __writemsr (0xC0000100, address);
+ return hwcr;
+}
+STATIC
+VOID
+RestoreHwcr (
+ UINT64
+ value
+ )
+{
+ __writemsr (0xC0010015, value);
+}
+UINT8
+Read64Mem8 (
+ IN UINT64 Address
+ )
+{
+ UINT8 dataRead;
+ UINT64 hwcrSave;
+ if ((Address >> 32) == 0) {
+ return *(volatile UINT8 *) (UINTN) Address;
+ }
+ hwcrSave = SetFsBase (Address);
+ dataRead = __readfsbyte (0);
+ RestoreHwcr (hwcrSave);
+ return dataRead;
+}
+UINT16
+Read64Mem16 (
+ IN UINT64 Address
+ )
+{
+ UINT16 dataRead;
+ UINT64 hwcrSave;
+ if ((Address >> 32) == 0) {
+ return *(volatile UINT16 *) (UINTN) Address;
+ }
+ hwcrSave = SetFsBase (Address);
+ dataRead = __readfsword (0);
+ RestoreHwcr (hwcrSave);
+ return dataRead;
+}
+UINT32
+Read64Mem32 (
+ IN UINT64 Address
+ )
+{
+ UINT32 dataRead;
+ UINT64 hwcrSave;
+ if ((Address >> 32) == 0) {
+ return *(volatile UINT32 *) (UINTN) Address;
+ }
+ hwcrSave = SetFsBase (Address);
+ dataRead = __readfsdword (0);
+ RestoreHwcr (hwcrSave);
+ return dataRead;
+ }
+VOID
+Write64Mem8 (
+ IN UINT64 Address,
+ IN UINT8 Data
+ )
+{
+ if ((Address >> 32) == 0){
+ *(volatile UINT8 *) (UINTN) Address = Data;
+ }
+ else {
+ UINT64 hwcrSave;
+ hwcrSave = SetFsBase (Address);
+ __writefsbyte (0, Data);
+ RestoreHwcr (hwcrSave);
+ }
+}
+VOID
+Write64Mem16 (
+ IN UINT64 Address,
+ IN UINT16 Data
+ )
+{
+ if ((Address >> 32) == 0){
+ *(volatile UINT16 *) (UINTN) Address = Data;
+ }
+ else {
+ UINT64 hwcrSave;
+ hwcrSave = SetFsBase (Address);
+ __writefsword (0, Data);
+ RestoreHwcr (hwcrSave);
+ }
+}
+VOID
+Write64Mem32 (
+ IN UINT64 Address,
+ IN UINT32 Data
+ )
+{
+ if ((Address >> 32) == 0){
+ *(volatile UINT32 *) (UINTN) Address = Data;
+ }
+ else {
+ UINT64 hwcrSave;
+ hwcrSave = SetFsBase (Address);
+ __writefsdword (0, Data);
+ RestoreHwcr (hwcrSave);
+ }
+}
+VOID
+LibAmdReadCpuReg (
+ IN UINT8 RegNum,
+ OUT UINT32 *Value
+ )
+{
+ *Value = 0;
+ switch (RegNum){
+ case CR4_REG:
+ *Value = __readcr4 ();
+ break;
+ case DR0_REG:
+ *Value = __readdr (0);
+ break;
+ case DR1_REG:
+ *Value = __readdr (1);
+ break;
+ case DR2_REG:
+ *Value = __readdr (2);
+ break;
+ case DR3_REG:
+ *Value = __readdr (3);
+ break;
+ case DR7_REG:
+ *Value = __readdr (7);
+ break;
+ default:
+ *Value = -1;
+ break;
+ }
+}
+VOID
+LibAmdWriteCpuReg (
+ IN UINT8 RegNum,
+ IN UINT32 Value
+ )
+{
+ switch (RegNum){
+ case CR4_REG:
+ __writecr4 (Value);
+ break;
+ case DR0_REG:
+ __writedr (0, Value);
+ break;
+ case DR1_REG:
+ __writedr (1, Value);
+ break;
+ case DR2_REG:
+ __writedr (2, Value);
+ break;
+ case DR3_REG:
+ __writedr (3, Value);
+ break;
+ case DR7_REG:
+ __writedr (7, Value);
+ break;
+ default:
+ break;
+ }
+}
+VOID
+LibAmdWriteBackInvalidateCache (
+ IN VOID
+ )
+{
+ __wbinvd ();
+}
+VOID
+LibAmdHDTBreakPoint (
+ VOID
+ )
+{
+ __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
+ __debugbreak (); // do you really need icebp? If so, go back to asm code
+}
+UINT8
+LibAmdBitScanForward (
+ IN UINT32 value
+ )
+{
+ UINTN Index;
+ for (Index = 0; Index < 32; Index++){
+ if (value & (1 << Index)) break;
+ }
+ return (UINT8) Index;
+}
+
+UINT8
+LibAmdBitScanReverse (
+ IN UINT32 value
+)
+{
+ uint8_t bit = 31;
+ do {
+ if (value & (1 << 31))
+ return bit;
+
+ value <<= 1;
+ bit--;
+
+ } while (value != 0);
+
+ return 0xFF; /* Error code indicating no bit found */
+}
+
+VOID
+LibAmdMsrRead (
+ IN UINT32 MsrAddress,
+ OUT UINT64 *Value,
+ IN OUT AMD_CONFIG_PARAMS *ConfigPtr
+ )
+{
+ *Value = __readmsr (MsrAddress);
+}
+VOID
+LibAmdMsrWrite (
+ IN UINT32 MsrAddress,
+ IN UINT64 *Value,
+ IN OUT AMD_CONFIG_PARAMS *ConfigPtr
+ )
+{
+ __writemsr (MsrAddress, *Value);
+}
+void LibAmdCpuidRead (
+ IN UINT32 CpuidFcnAddress,
+ OUT CPUID_DATA* Value,
+ IN OUT AMD_CONFIG_PARAMS *ConfigPtr
+ )
+{
+ __cpuid ((int *)Value, CpuidFcnAddress);
+}
+UINT64
+ReadTSC (
+ VOID
+ )
+{
+ return __rdtsc ();
+}
+VOID
+LibAmdSimNowEnterDebugger (
+ VOID
+ )
+{
+ STATIC CONST UINT8 opcode [] = {0x60, // pushad
+ 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
+ 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
+ 0x0F, 0xA2, // cpuid
+ 0x61, // popad
+ 0xC3 // ret
+ };
+ ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
+}
+
+#ifdef __SSE3__
+VOID F10RevDProbeFilterCritical (
+ IN PCI_ADDR PciAddress,
+ IN UINT32 PciRegister
+ )
+{
+ UINT64 msrsave;
+ msrsave = __readmsr (0xC001001F);
+ __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
+ _mm_mfence ();
+ __outdword (0xCF8, PciAddress.AddressValue);
+ _mm_mfence ();
+ __outdword (0xCFC, PciRegister | 2);
+ _mm_mfence ();
+ __writemsr (0xC001001F, msrsave);
+}
+
+VOID
+LibAmdCLFlush (
+ IN UINT64 Address,
+ IN UINT8 Count
+ )
+{
+ UINT64 hwcrSave;
+ UINT8 *address32;
+ UINTN Index;
+ address32 = 0;
+ hwcrSave = SetFsBase (Address);
+ for (Index = 0; Index < Count; Index++){
+ _mm_mfence ();
+ _mm_clflush_fs (&address32 [Index * 64]);
+ }
+ RestoreHwcr (hwcrSave);
+}
+#endif //__SSE3__
+
+VOID
+StopHere (
+ VOID
+ )
+{
+ VOLATILE UINTN x = 1;
+ while (x);
+}
+
+VOID
+LibAmdFinit()
+{
+ /* TODO: finit */
+ __asm__ volatile ("finit");
+}
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Read IO port
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] IoAddress IO port address
+ * @param[in] Value Pointer to save data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdIoRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ *(UINT8 *) Value = ReadIo8 (IoAddress);
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ *(UINT16 *) Value = ReadIo16 (IoAddress);
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ *(UINT32 *) Value = ReadIo32 (IoAddress);
+ break;
+ default:
+ ASSERT (FALSE);
+ break;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Write IO port
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] IoAddress IO port address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdIoWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ WriteIo8 (IoAddress, *(UINT8 *) Value);
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ WriteIo16 (IoAddress, *(UINT16 *) Value);
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ WriteIo32 (IoAddress, *(UINT32 *) Value);
+ break;
+ default:
+ ASSERT (FALSE);
+ break;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * IO read modify write
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] IoAddress IO address
+ * @param[in] Data OR data
+ * @param[in] DataMask Mask to be used before data write back to register.
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdIoRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value = 0;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
+ Value = (Value & (~TempMask)) | TempData;
+ LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Poll IO register
+ *
+ * Poll register until (RegisterValue & DataMask) == Data
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] IoAddress IO address
+ * @param[in] Data Data to compare
+ * @param[in] DataMask And mask
+ * @param[in] Delay Poll for time in 100ns (not supported)
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdIoPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ do {
+ LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
+ } while (TempData != (Value & TempMask));
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Read memory/MMIO
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] MemAddress Memory address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdMemRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ *(UINT8 *) Value = Read64Mem8 (MemAddress);
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ *(UINT16 *) Value = Read64Mem16 (MemAddress);
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ *(UINT32 *) Value = Read64Mem32 (MemAddress);
+ break;
+ default:
+ ASSERT (FALSE);
+ break;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Write memory/MMIO
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] MemAddress Memory address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdMemWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ Write64Mem8 (MemAddress, *((UINT8 *) Value));
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ Write64Mem16 (MemAddress, *((UINT16 *) Value));
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ Write64Mem32 (MemAddress, *((UINT32 *) Value));
+ break;
+ default:
+ ASSERT (FALSE);
+ break;
+ }
+}
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Memory/MMIO read modify write
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] MemAddress Memory address
+ * @param[in] Data OR data
+ * @param[in] DataMask Mask to be used before data write back to register.
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdMemRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
+ Value = (Value & (~TempMask)) | TempData;
+ LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Poll Mmio
+ *
+ * Poll register until (RegisterValue & DataMask) == Data
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] MemAddress Memory address
+ * @param[in] Data Data to compare
+ * @param[in] DataMask AND mask
+ * @param[in] Delay Poll for time in 100ns (not supported)
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdMemPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ do {
+ LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
+ } while (TempData != (Value & TempMask));
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Read PCI config space
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] PciAddress Pci address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdPciRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 LegacyPciAccess;
+ UINT32 MMIOSize;
+ UINT64 RMWrite;
+ UINT64 RMWritePrevious;
+ UINT64 MMIOAddress;
+
+ ASSERT (StdHeader != NULL);
+ ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
+ if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
+ // We need to convert our "portable" PCI address into a "real" PCI access
+ LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
+ if (PciAddress.Address.Register <= 0xFF) {
+ LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
+ LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
+ } else {
+ LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
+ RMWrite = RMWritePrevious | 0x0000400000000000ull;
+ LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
+ LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
+ LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
+ LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
+ }
+ } else {
+ // Setup the MMIO address
+ ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
+ MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
+ LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Write PCI config space
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] PciAddress Pci address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdPciWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 LegacyPciAccess;
+ UINT32 MMIOSize;
+ UINT64 RMWrite;
+ UINT64 RMWritePrevious;
+ UINT64 MMIOAddress;
+
+ ASSERT (StdHeader != NULL);
+ ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
+ if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
+ // We need to convert our "portable" PCI address into a "real" PCI access
+ LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
+ if (PciAddress.Address.Register <= 0xFF) {
+ LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
+ LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
+ } else {
+ LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
+ RMWrite = RMWritePrevious | 0x0000400000000000ull;
+ LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
+ LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
+ LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
+ LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
+ }
+ } else {
+ // Setup the MMIO address
+ ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
+ MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
+ LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * PCI read modify write
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] PciAddress Pci address
+ * @param[in] Data OR Data
+ * @param[in] DataMask Mask to be used before data write back to register.
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdPciRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
+ Value = (Value & (~TempMask)) | TempData;
+ LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Poll PCI config space register
+ *
+ * Poll register until (RegisterValue & DataMask) == Data
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] PciAddress Pci address
+ * @param[in] Data Data to compare
+ * @param[in] DataMask AND mask
+ * @param[in] Delay Poll for time in 100ns (not supported)
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdPciPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ do {
+ LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
+ } while (TempData != (Value & TempMask));
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Get MMIO base address for PCI accesses
+ *
+ * @param[out] MmioAddress PCI MMIO base address
+ * @param[out] MmioSize Size of region in bytes
+ * @param[in] StdHeader Standard configuration header
+ *
+ * @retval TRUE MmioAddress/MmioSize are valid
+ */
+BOOLEAN
+STATIC
+GetPciMmioAddress (
+ OUT UINT64 *MmioAddress,
+ OUT UINT32 *MmioSize,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ BOOLEAN MmioIsEnabled;
+ UINT32 EncodedSize;
+ UINT64 MsrReg;
+
+ ASSERT (StdHeader != NULL);
+
+ MmioIsEnabled = FALSE;
+ LibAmdMsrRead (MSR_MMIO_Cfg_Base, &MsrReg, StdHeader);
+ if ((MsrReg & BIT0) != 0) {
+ *MmioAddress = MsrReg & 0xFFFFFFFFFFF00000ull;
+ EncodedSize = (UINT32) ((MsrReg & 0x3C) >> 2);
+ *MmioSize = ((1 << EncodedSize) * 0x100000);
+ MmioIsEnabled = TRUE;
+ }
+ return MmioIsEnabled;
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Read field of PCI config register.
+ *
+ *
+ *
+ * @param[in] Address Pci address (register must be DWORD aligned)
+ * @param[in] Highbit High bit position of the field in DWORD
+ * @param[in] Lowbit Low bit position of the field in DWORD
+ * @param[out] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ */
+VOID
+LibAmdPciReadBits (
+ IN PCI_ADDR Address,
+ IN UINT8 Highbit,
+ IN UINT8 Lowbit,
+ OUT UINT32 *Value,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
+
+ LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
+ *Value >>= Lowbit; // Shift
+
+ // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
+
+ if ((Highbit - Lowbit) != 31) {
+ *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Write field of PCI config register.
+ *
+ *
+ *
+ * @param[in] Address Pci address (register must be DWORD aligned)
+ * @param[in] Highbit High bit position of the field in DWORD
+ * @param[in] Lowbit Low bit position of the field in DWORD
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ */
+VOID
+LibAmdPciWriteBits (
+ IN PCI_ADDR Address,
+ IN UINT8 Highbit,
+ IN UINT8 Lowbit,
+ IN CONST UINT32 *Value,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 Temp;
+ UINT32 Mask;
+
+ ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
+
+ // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
+
+ if ((Highbit - Lowbit) != 31) {
+ Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
+ } else {
+ Mask = (UINT32) 0xFFFFFFFF;
+ }
+
+ LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
+ Temp &= ~(Mask << Lowbit);
+ Temp |= (*Value & Mask) << Lowbit;
+ LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Locate next capability pointer
+ *
+ * Given a SBDFO this routine will find the next PCI capabilities list entry.
+ * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
+ * returned.
+ * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
+ *
+ * @param[in,out] Address Pci address
+ * @param[in] StdHeader Standard configuration header
+ */
+
+VOID
+LibAmdPciFindNextCap (
+ IN OUT PCI_ADDR *Address,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ PCI_ADDR Base;
+ UINT32 Offset;
+ UINT32 Temp;
+ PCI_ADDR TempAddress;
+
+ ASSERT (Address != NULL);
+ ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
+
+ Base.AddressValue = Address->AddressValue;
+ Offset = Base.Address.Register;
+ Base.Address.Register = 0;
+
+ Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
+
+ // Verify that the SBDFO points to a valid PCI device SANITY CHECK
+ LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
+ if (Temp == 0xFFFFFFFF) {
+ ASSERT (FALSE);
+ return; // There is no device at this address
+ }
+
+ // Verify that the device supports a capability list
+ TempAddress.AddressValue = Base.AddressValue + 0x04;
+ LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
+ if (Temp == 0) {
+ return; // This PCI device does not support capability lists
+ }
+
+ if (Offset != 0) {
+ // If we are continuing on an existing list
+ TempAddress.AddressValue = Base.AddressValue + Offset;
+ LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
+ } else {
+ // We are starting on a new list
+ TempAddress.AddressValue = Base.AddressValue + 0x34;
+ LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
+ }
+
+ if (Temp == 0) {
+ return; // We have reached the end of the capabilities list
+ }
+
+ // Error detection and recovery- The statement below protects against
+ // PCI devices with broken PCI capabilities lists. Detect a pointer
+ // that is not uint32 aligned, points into the first 64 reserved DWORDs
+ // or points back to itself.
+ if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
+ ASSERT (FALSE);
+ return;
+ }
+
+ Address->AddressValue = Base.AddressValue + Temp;
+ return;
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Set memory with value
+ *
+ *
+ * @param[in,out] Destination Pointer to memory range
+ * @param[in] Value Value to set memory with
+ * @param[in] FillLength Size of the memory range
+ * @param[in] StdHeader Standard configuration header (Optional)
+ */
+VOID
+LibAmdMemFill (
+ IN VOID *Destination,
+ IN UINT8 Value,
+ IN UINTN FillLength,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT8 *Dest;
+ ASSERT (StdHeader != NULL);
+ Dest = Destination;
+ while ((FillLength--) != 0) {
+ *Dest++ = Value;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Copy memory
+ *
+ *
+ * @param[in,out] Destination Pointer to destination buffer
+ * @param[in] Source Pointer to source buffer
+ * @param[in] CopyLength buffer length
+ * @param[in] StdHeader Standard configuration header (Optional)
+ */
+VOID
+LibAmdMemCopy (
+ IN VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN CopyLength,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT8 *Dest;
+ CONST UINT8 *SourcePtr;
+ ASSERT (StdHeader != NULL);
+ Dest = Destination;
+ SourcePtr = Source;
+ while ((CopyLength--) != 0) {
+ *Dest++ = *SourcePtr++;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Returns the package type mask for the processor
+ *
+ *
+ * @param[in] StdHeader Standard configuration header (Optional)
+ */
+
+// Returns the package type mask for the processor
+UINT32
+LibAmdGetPackageType (
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 ProcessorPackageType;
+ CPUID_DATA CpuId;
+
+ LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
+ ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
+ return (UINT32) (1 << ProcessorPackageType);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Returns the package type mask for the processor
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] Data data
+ * @param[in] DataMask data
+ * @param[out] TemData typecast data
+ * @param[out] TempDataMask typecast data
+ */
+
+
+VOID
+STATIC
+LibAmdGetDataFromPtr (
+ IN ACCESS_WIDTH AccessWidth,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ OUT UINT32 *TemData,
+ OUT UINT32 *TempDataMask
+ )
+{
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ *TemData = (UINT32)*(UINT8 *) Data;
+ *TempDataMask = (UINT32)*(UINT8 *) DataMask;
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ *TemData = (UINT32)*(UINT16 *) Data;
+ *TempDataMask = (UINT32)*(UINT16 *) DataMask;
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ *TemData = *(UINT32 *) Data;
+ *TempDataMask = *(UINT32 *) DataMask;
+ break;
+ default:
+ IDS_ERROR_TRAP;
+ break;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Returns the package type mask for the processor
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @retval Width in number of bytes
+ */
+
+
+UINT8
+LibAmdAccessWidth (
+ IN ACCESS_WIDTH AccessWidth
+ )
+{
+ UINT8 Width;
+
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ Width = 1;
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ Width = 2;
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ Width = 4;
+ break;
+ case AccessWidth64:
+ case AccessS3SaveWidth64:
+ Width = 8;
+ break;
+ default:
+ Width = 0;
+ IDS_ERROR_TRAP;
+ break;
+ }
+ return Width;
+}
+
+VOID
+CpuidRead (
+ IN UINT32 CpuidFcnAddress,
+ OUT CPUID_DATA *Value
+ )
+{
+ __cpuid ((int *)Value, CpuidFcnAddress);
+}
+
+UINT8
+ReadNumberOfCpuCores(
+ VOID
+ )
+{
+ CPUID_DATA Value;
+ CpuidRead (0x80000008, &Value);
+ return Value.ECX_Reg & 0xff;
+}
diff --git a/src/vendorcode/amd/agesa/common/amdlib.h b/src/vendorcode/amd/agesa/common/amdlib.h
new file mode 100644
index 0000000..f5da228
--- /dev/null
+++ b/src/vendorcode/amd/agesa/common/amdlib.h
@@ -0,0 +1,398 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * AMD Library
+ *
+ * Contains interface to the AMD AGESA library
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project: AGESA
+ * @e sub-project: Lib
+ * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
+ *
+ */
+/*
+ *****************************************************************************
+ *
+ * Copyright (c) 2011, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ***************************************************************************
+ *
+ */
+
+#ifndef _AMD_LIB_H_
+#define _AMD_LIB_H_
+
+/*----------------------------------------------------------------------------------------
+ * D E F I N I T I O N S A N D M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+#define IOCF8 0xCF8
+#define IOCFC 0xCFC
+
+// Reg Values for ReadCpuReg and WriteCpuReg
+#define CR0_REG 0x00
+#define CR4_REG 0x04
+#define DR0_REG 0x10
+#define DR1_REG 0x11
+#define DR2_REG 0x12
+#define DR3_REG 0x13
+#define DR7_REG 0x17
+
+UINT8
+ReadIo8 (
+ IN UINT16 Address
+ );
+
+UINT16
+ReadIo16 (
+ IN UINT16 Address
+ );
+
+UINT32
+ReadIo32 (
+ IN UINT16 Address
+ );
+
+VOID
+WriteIo8 (
+ IN UINT16 Address,
+ IN UINT8 Data
+ );
+
+VOID
+WriteIo16 (
+ IN UINT16 Address,
+ IN UINT16 Data
+ );
+
+VOID
+WriteIo32 (
+ IN UINT16 Address,
+ IN UINT32 Data
+ );
+
+UINT8
+Read64Mem8 (
+ IN UINT64 Address
+ );
+
+UINT16
+Read64Mem16 (
+ IN UINT64 Address
+ );
+
+UINT32
+Read64Mem32 (
+ IN UINT64 Address
+ );
+
+VOID
+Write64Mem8 (
+ IN UINT64 Address,
+ IN UINT8 Data
+ );
+
+VOID
+Write64Mem16 (
+ IN UINT64 Address,
+ IN UINT16 Data
+ );
+
+VOID
+Write64Mem32 (
+ IN UINT64 Address,
+ IN UINT32 Data
+ );
+
+UINT64
+ReadTSC (
+ VOID
+ );
+
+// MSR
+VOID
+LibAmdMsrRead (
+ IN UINT32 MsrAddress,
+ OUT UINT64 *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMsrWrite (
+ IN UINT32 MsrAddress,
+ IN UINT64 *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// IO
+VOID
+LibAmdIoRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdIoWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdIoRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdIoPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// Memory or MMIO
+VOID
+LibAmdMemRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMemWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMemRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMemPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// PCI
+VOID
+LibAmdPciRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciReadBits (
+ IN PCI_ADDR Address,
+ IN UINT8 Highbit,
+ IN UINT8 Lowbit,
+ OUT UINT32 *Value,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciWriteBits (
+ IN PCI_ADDR Address,
+ IN UINT8 Highbit,
+ IN UINT8 Lowbit,
+ IN CONST UINT32 *Value,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciFindNextCap (
+ IN OUT PCI_ADDR *Address,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// CPUID
+VOID
+LibAmdCpuidRead (
+ IN UINT32 CpuidFcnAddress,
+ OUT CPUID_DATA *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// Utility Functions
+VOID
+LibAmdMemFill (
+ IN VOID *Destination,
+ IN UINT8 Value,
+ IN UINTN FillLength,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMemCopy (
+ IN VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN CopyLength,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+UINT32
+LibAmdGetPackageType (
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+UINT8
+LibAmdBitScanReverse (
+ IN UINT32 value
+ );
+UINT8
+LibAmdBitScanForward (
+ IN UINT32 value
+ );
+
+VOID
+LibAmdReadCpuReg (
+ IN UINT8 RegNum,
+ OUT UINT32 *Value
+ );
+VOID
+LibAmdWriteCpuReg (
+ IN UINT8 RegNum,
+ IN UINT32 Value
+ );
+
+VOID
+LibAmdWriteBackInvalidateCache (
+ IN VOID
+ );
+
+VOID
+LibAmdSimNowEnterDebugger (VOID);
+
+VOID
+LibAmdHDTBreakPoint (VOID);
+
+UINT8
+LibAmdAccessWidth (
+ IN ACCESS_WIDTH AccessWidth
+ );
+
+VOID
+LibAmdCLFlush (
+ IN UINT64 Address,
+ IN UINT8 Count
+ );
+
+VOID F10RevDProbeFilterCritical (
+ IN PCI_ADDR PciAddress,
+ IN UINT32 PciRegister
+ );
+
+VOID
+LibAmdFinit (
+ VOID
+ );
+
+VOID
+StopHere (
+ VOID
+ );
+
+/* For f14 or older. */
+VOID
+CpuidRead (
+ IN UINT32 CpuidFcnAddress,
+ OUT CPUID_DATA *Value
+ );
+
+UINT8
+ReadNumberOfCpuCores(
+ VOID
+ );
+
+/* From 16kb, no implementation supplied. */
+VOID
+LibAmdFnclex (
+ VOID);
+
+VOID
+LibAmdReadMxcsr (
+ OUT UINT32 *Value
+ );
+VOID
+LibAmdWriteMxcsr (
+ IN UINT32 *Value
+ );
+
+
+#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f10/Lib/amdlib.c b/src/vendorcode/amd/agesa/f10/Lib/amdlib.c
deleted file mode 100644
index 1076572..0000000
--- a/src/vendorcode/amd/agesa/f10/Lib/amdlib.c
+++ /dev/null
@@ -1,1259 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN VOID *Data,
- IN VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- ;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-
-#ifdef __SSE3__
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-#endif //__SSE3__
-
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 MsrReg;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &MsrReg, StdHeader);
- if ((MsrReg & BIT0) != 0) {
- *MmioAddress = MsrReg & 0xFFFFFFFFFFF00000ull;
- EncodedSize = (UINT32) ((MsrReg & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN VOID *Data,
- IN VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f10/Lib/amdlib.h b/src/vendorcode/amd/agesa/f10/Lib/amdlib.h
deleted file mode 100644
index 367db91..0000000
--- a/src/vendorcode/amd/agesa/f10/Lib/amdlib.h
+++ /dev/null
@@ -1,374 +0,0 @@
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-// PROTOTYPES FOR amdlib32.asm
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (VOID);
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-#ifdef __SSE3__
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- );
-
-VOID LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-#endif
-
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID StopHere(VOID);
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f10/Makefile.inc b/src/vendorcode/amd/agesa/f10/Makefile.inc
index 1109c08..8c6b43a 100644
--- a/src/vendorcode/amd/agesa/f10/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f10/Makefile.inc
@@ -59,6 +59,14 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
+
#libagesa-y += Proc/CPU/Family/0x10/F10IoCstate.c
#libagesa-y += Proc/CPU/Feature/cpuIoCstate.c
#libagesa-y += Proc/Mem/NB/ON/mnprotoon.c
@@ -106,7 +114,6 @@ libagesa-y += Proc/Common/AmdS3LateRestore.c
libagesa-y += Proc/CPU/Table.c
libagesa-y += Proc/HT/htInterface.c
libagesa-y += Proc/IDS/Perf/IdsPerf.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/CPU/Feature/cpuCacheFlushOnHalt.c
libagesa-y += Proc/Mem/Main/minit.c
libagesa-y += Proc/Mem/Feat/INTLVRN/mfintlvrn.c
diff --git a/src/vendorcode/amd/agesa/f12/Lib/amdlib.c b/src/vendorcode/amd/agesa/f12/Lib/amdlib.c
deleted file mode 100644
index ec85f78..0000000
--- a/src/vendorcode/amd/agesa/f12/Lib/amdlib.c
+++ /dev/null
@@ -1,1262 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 48409 $ @e \$Date: 2011-03-09 01:19:40 +0800 (Wed, 09 Mar 2011) $
- *
- */
-/*
- *****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***************************************************************************
- *
- */
-
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- ;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- IDS_HDT_CONSOLE (LIB_PCI_RD, "~PCI RD %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- IDS_HDT_CONSOLE (LIB_PCI_RD, "~MMIO RD %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- IDS_HDT_CONSOLE (LIB_PCI_WR, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- IDS_HDT_CONSOLE (LIB_PCI_WR, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 LocalMsrRegister;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &LocalMsrRegister, StdHeader);
- if ((LocalMsrRegister & BIT0) != 0) {
- *MmioAddress = LocalMsrRegister & 0xFFFFFFFFFFF00000ull;
- EncodedSize = (UINT32) ((LocalMsrRegister & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- CONST UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f12/Lib/amdlib.h b/src/vendorcode/amd/agesa/f12/Lib/amdlib.h
deleted file mode 100644
index 702cde8..0000000
--- a/src/vendorcode/amd/agesa/f12/Lib/amdlib.h
+++ /dev/null
@@ -1,406 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR0_REG 0x00
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-#if !defined __GNUC__
-// PROTOTYPES FOR amdlib32.asm
-void _mm_stream_si128_fs (void *__A, void *__B);
-void _mm_store_si128_fs (void *dest, void *data);
-void _mm_clflush_fs (void *address32);
-#endif
-/*---------------------------------------------------------------------------------------
- * L O C A L F U N C T I O N S
- *---------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID
- );
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-StopHere (
- VOID
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc
index 30efd4c..92b28d7 100644
--- a/src/vendorcode/amd/agesa/f12/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f12/Makefile.inc
@@ -96,10 +96,16 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
-libagesa-y = Legacy/Proc/agesaCallouts.c
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
+libagesa-y += Legacy/Proc/agesaCallouts.c
libagesa-y += Legacy/Proc/Dispatcher.c
libagesa-y += Legacy/Proc/hobTransfer.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/Common/AmdInitEarly.c
libagesa-y += Proc/Common/AmdInitEnv.c
libagesa-y += Proc/Common/AmdInitLate.c
diff --git a/src/vendorcode/amd/agesa/f14/Lib/amdlib.c b/src/vendorcode/amd/agesa/f14/Lib/amdlib.c
deleted file mode 100644
index b28878b..0000000
--- a/src/vendorcode/amd/agesa/f14/Lib/amdlib.c
+++ /dev/null
@@ -1,1262 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44325 $ @e \$Date: 2010-12-22 03:29:53 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- *****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***************************************************************************
- *
- */
-
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- ;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-
-#ifdef __SSE3__
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-#endif //__SSE3__
-
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 MsrReg;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &MsrReg, StdHeader);
- if ((MsrReg & BIT0) != 0) {
- *MmioAddress = MsrReg & 0xFFFFFFFFFFF00000ull;
- EncodedSize = (UINT32) ((MsrReg & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- CONST UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f14/Lib/amdlib.h b/src/vendorcode/amd/agesa/f14/Lib/amdlib.h
deleted file mode 100644
index 25f19a3..0000000
--- a/src/vendorcode/amd/agesa/f14/Lib/amdlib.h
+++ /dev/null
@@ -1,408 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
- *
- */
-/*
- *****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***************************************************************************
- *
- */
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR0_REG 0x00
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-#if !defined __GNUC__
-// PROTOTYPES FOR amdlib32.asm
-void _mm_stream_si128_fs (void *__A, void *__B);
-void _mm_store_si128_fs (void *dest, void *data);
-void _mm_clflush_fs (void *address32);
-#endif
-/*---------------------------------------------------------------------------------------
- * L O C A L F U N C T I O N S
- *---------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID
- );
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-StopHere (
- VOID
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f14/Makefile.inc b/src/vendorcode/amd/agesa/f14/Makefile.inc
index a5f7561..a51c013 100644
--- a/src/vendorcode/amd/agesa/f14/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f14/Makefile.inc
@@ -80,7 +80,15 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
-libagesa-y = Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
+
+libagesa-y += Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c
libagesa-y += Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c
libagesa-y += Proc/GNB/Nb/Family/0x14/F14NbLclkDpm.c
libagesa-y += Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c
@@ -198,7 +206,6 @@ libagesa-y += Proc/CPU/Family/0x14/cpuF14Utilities.c
libagesa-y += Proc/HT/htInterface.c
libagesa-y += Proc/GNB/Gfx/GfxStrapsInit.c
libagesa-y += Proc/GNB/Nb/NbInitAtEarly.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/CPU/Feature/cpuCacheFlushOnHalt.c
libagesa-y += Proc/CPU/Feature/cpuCpb.c
libagesa-y += Proc/Mem/Main/minit.c
diff --git a/src/vendorcode/amd/agesa/f15/Lib/amdlib.c b/src/vendorcode/amd/agesa/f15/Lib/amdlib.c
deleted file mode 100644
index cbb8419..0000000
--- a/src/vendorcode/amd/agesa/f15/Lib/amdlib.c
+++ /dev/null
@@ -1,1283 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 56279 $ @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G2_PEI)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN VOID *Data,
- IN VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- break;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- break;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-UINT64
-MsrRead (
- IN UINT32 MsrAddress
- )
-{
- return __readmsr (MsrAddress);
-}
-
-VOID
-MsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 Value
- )
-{
- __writemsr (MsrAddress, Value);
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- IDS_HDT_CONSOLE (LIB_PCI_RD, "~PCI RD %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- IDS_HDT_CONSOLE (LIB_PCI_RD, "~MMIO RD %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- IDS_HDT_CONSOLE (LIB_PCI_WR, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- IDS_HDT_CONSOLE (LIB_PCI_WR, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 LocalMsrRegister;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &LocalMsrRegister, StdHeader);
- if ((LocalMsrRegister & BIT0) != 0) {
- *MmioAddress = LocalMsrRegister & 0xFFFFFFFFFFF00000;
- EncodedSize = (UINT32) ((LocalMsrRegister & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN VOID *Data,
- IN VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- break;
- }
- return Width;
-}
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f15/Lib/amdlib.h b/src/vendorcode/amd/agesa/f15/Lib/amdlib.h
deleted file mode 100644
index f7a747c..0000000
--- a/src/vendorcode/amd/agesa/f15/Lib/amdlib.h
+++ /dev/null
@@ -1,390 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 02:16:51 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-// PROTOTYPES FOR amdlib32.asm
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID
- );
-
-// MSR
-
-UINT64
-MsrRead (
- IN UINT32 MsrAddress
- );
-
-VOID
-MsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 Value
- );
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-StopHere (
- VOID
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc
index b7bc898..e92308e 100644
--- a/src/vendorcode/amd/agesa/f15/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f15/Makefile.inc
@@ -72,10 +72,16 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
libagesa-y += Legacy/Proc/agesaCallouts.c
libagesa-y += Legacy/Proc/Dispatcher.c
libagesa-y += Legacy/Proc/hobTransfer.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/Common/AmdInitEarly.c
libagesa-y += Proc/Common/AmdInitEnv.c
libagesa-y += Proc/Common/AmdInitLate.c
diff --git a/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.c b/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.c
deleted file mode 100644
index 3008db2..0000000
--- a/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.c
+++ /dev/null
@@ -1,1282 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 48409 $ @e \$Date: 2011-03-08 11:19:40 -0600 (Tue, 08 Mar 2011) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- ;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-#if 0
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-#endif
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-
-VOID
-LibAmdFinit()
-{
- /* TODO: finit */
- __asm__ volatile ("finit");
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- //IDS_HDT_CONSOLE (LIB_PCI_RD, "~PCI RD %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- //IDS_HDT_CONSOLE (LIB_PCI_RD, "~MMIO RD %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- //IDS_HDT_CONSOLE (LIB_PCI_WR, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "LibAmdPciWrite\n");
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- //IDS_HDT_CONSOLE (LIB_PCI_WR, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "LibAmdPciWrite mmio\n");
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 LocalMsrRegister;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &LocalMsrRegister, StdHeader);
- if ((LocalMsrRegister & BIT0) != 0) {
- *MmioAddress = LocalMsrRegister & 0xFFFFFFFFFFF00000;
- EncodedSize = (UINT32) ((LocalMsrRegister & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- CONST UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.h b/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.h
deleted file mode 100644
index ea15c7b..0000000
--- a/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.h
+++ /dev/null
@@ -1,358 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-// PROTOTYPES FOR amdlib32.asm
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID);
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID
-LibAmdFinit (
- VOID);
-
-VOID
-StopHere (
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc
index 986fbc5..6434637 100644
--- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc
@@ -93,10 +93,16 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
libagesa-y += Legacy/Proc/Dispatcher.c
libagesa-y += Legacy/Proc/agesaCallouts.c
libagesa-y += Legacy/Proc/hobTransfer.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/CPU/Family/0x15/TN/F15TnC6State.c
libagesa-y += Proc/CPU/Family/0x15/TN/F15TnCpb.c
libagesa-y += Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h
index bef3016..3fd7c9c 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h
@@ -106,7 +106,7 @@
#endif
#include "Fch.h"
-#include <Lib/amdlib.h>
+#include "amdlib.h"
#include "Common/FchCommonCfg.h"
#include "Common/AcpiLib.h"
#include "Common/FchDef.h"
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsLib.c b/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsLib.c
index 50aa2ee..b6867c5 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsLib.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsLib.c
@@ -930,3 +930,12 @@ IdsLibDataMaskSet32 (
+VOID
+IdsOutPort (
+ IN UINT32 Addr,
+ IN UINT32 Value,
+ IN UINT32 Flag
+ )
+{
+ __outdword ((UINT16) Addr, Value);
+}
diff --git a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c b/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c
deleted file mode 100644
index 5243f23..0000000
--- a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c
+++ /dev/null
@@ -1,1289 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 48409 $ @e \$Date: 2011-03-08 11:19:40 -0600 (Tue, 08 Mar 2011) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- break;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- break;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-#if 0
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-#endif
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-
-VOID
-LibAmdFinit()
-{
- /* TODO: finit */
- __asm__ volatile ("finit");
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- //IDS_HDT_CONSOLE (LIB_PCI_RD, "~PCI RD %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- //IDS_HDT_CONSOLE (LIB_PCI_RD, "~MMIO RD %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- //IDS_HDT_CONSOLE (LIB_PCI_WR, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "LibAmdPciWrite\n");
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- //IDS_HDT_CONSOLE (LIB_PCI_WR, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "LibAmdPciWrite mmio\n");
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 LocalMsrRegister;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &LocalMsrRegister, StdHeader);
- if ((LocalMsrRegister & BIT0) != 0) {
- *MmioAddress = LocalMsrRegister & 0xFFFFFFFFFFF00000;
- EncodedSize = (UINT32) ((LocalMsrRegister & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- CONST UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- break;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.h b/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.h
deleted file mode 100644
index 373ac1f..0000000
--- a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.h
+++ /dev/null
@@ -1,371 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 85030 $ @e \$Date: 2012-12-26 00:20:10 -0600 (Wed, 26 Dec 2012) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-// PROTOTYPES FOR amdlib32.asm
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID);
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID
-StopHere (
- VOID
- );
-
-VOID
-LibAmdFinit (
- VOID);
-
-VOID
-LibAmdFnclex (
- VOID);
-
-VOID
-LibAmdReadMxcsr (
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteMxcsr (
- IN UINT32 *Value
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f16kb/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Makefile.inc
index 2cee89e..d17c301 100644
--- a/src/vendorcode/amd/agesa/f16kb/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f16kb/Makefile.inc
@@ -97,11 +97,16 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
-libagesa-y =
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
libagesa-y += Legacy/Proc/agesaCallouts.c
libagesa-y += Legacy/Proc/Dispatcher.c
libagesa-y += Legacy/Proc/hobTransfer.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/Common/AmdInitEarly.c
libagesa-y += Proc/Common/AmdInitEnv.c
libagesa-y += Proc/Common/AmdInitLate.c
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Library/IdsLib.c b/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Library/IdsLib.c
index 50306bb..2345e1c 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Library/IdsLib.c
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Library/IdsLib.c
@@ -1013,3 +1013,12 @@ IdsLibDataMaskSet32 (
+VOID
+IdsOutPort (
+ IN UINT32 Addr,
+ IN UINT32 Value,
+ IN UINT32 Flag
+ )
+{
+ __outdword ((UINT16) Addr, Value);
+}
1
0
Patch set updated for coreboot: buildgcc: Add option to bootstrap a host gcc
by Nico Huber 19 Apr '16
by Nico Huber 19 Apr '16
19 Apr '16
Nico Huber (nico.h(a)gmx.de) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13473
-gerrit
commit dbba01af1cc898a7548f4e1507536affad6b8fee
Author: Nico Huber <nico.huber(a)secunet.com>
Date: Tue Jan 26 16:10:17 2016 +0100
buildgcc: Add option to bootstrap a host gcc
Bootstrapping gcc is the recommended way if your host gcc's version
doesn't match the gcc version you're going to build. While a build
with an outdated host gcc usually succeeds, an outdated gnat seems
to be a bigger issue.
Some library controversy: gcc likes the libraries it ships with most
but we don't want to install shared libraries. So we build them static
(--disable-shared) and install only the minimum (libgcc, libada,
libstdc++). However, as the code of these libraries might be used to
build a shared library we have to compile them with `-fPIC`.
So far build tested with `make BUILDGCC_OPTIONS="-b -l c,ada"` on
o Ubuntu 14.04 "Trusty Tahr" (i386)
o Debian 8 "Jessie" (x86_64)
o current Arch Linux (x86_64)
Change-Id: Icb47d3e9dbafc55737fbc3ce62a084fb9d5f359a
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
---
util/crossgcc/buildgcc | 55 ++++++++++++++++++++++++++++++++++++++++++++++----
1 file changed, 51 insertions(+), 4 deletions(-)
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index eddafe5..860f3ea 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -18,8 +18,8 @@
cd $(dirname $0)
-CROSSGCC_DATE="April 3rd, 2016"
-CROSSGCC_VERSION="1.38"
+CROSSGCC_DATE="April 19th, 2016"
+CROSSGCC_VERSION="1.39"
CROSSGCC_COMMIT=$( git describe )
# default settings
@@ -30,6 +30,7 @@ LANGUAGES=c
DESTDIR=
SAVETEMPS=0
SKIPPYTHON=1
+BOOTSTRAP=0
# GCC toolchain version numbers
GMP_VERSION=6.1.0
@@ -342,6 +343,9 @@ build_for_target()
build()
{
if package_uses_targetarch $1; then
+ if [ $BOOTSTRAP -eq 1 -a ! -f "${TARGETDIR}/.GCC.success" ]; then
+ build_for_host GCC
+ fi
build_for_target $1
else
build_for_host $1
@@ -381,6 +385,8 @@ myhelp()
printf " [-P|--package <package>] Build a specific package: GCC, CLANG, IASL, GDB\n"
printf " (defaults to $PACKAGE)\n"
printf "GCC specific options:\n"
+ printf " [-b|--bootstrap] bootstrap the host compiler before building\n"
+ printf " the cross compiler\n"
printf " [-p|--platform <platform>] target platform to build cross compiler for\n"
printf " (defaults to $TARGETARCH)\n"
printf " [-l|--languages <languages>] comma separated list of target languages\n"
@@ -493,8 +499,40 @@ build_BINUTILS() {
$MAKE install DESTDIR=$DESTDIR || touch .failed
}
-
-build_GCC() {
+bootstrap_GCC() {
+ # Work around crazy code generator in GCC that confuses CLANG.
+ $CC --version | grep clang >/dev/null 2>&1 && \
+ LOCALCFLAGS="$HOSTCFLAGS -fbracket-depth=1024" || \
+ LOCALCFLAGS="$HOSTCFLAGS"
+
+ CC="$CC" \
+ CFLAGS="$LOCALCFLAGS" \
+ CFLAGS_FOR_BUILD="$LOCALCFLAGS" \
+ CFLAGS_FOR_TARGET="$LOCALCFLAGS -fPIC" \
+ CXXFLAGS="$LOCALCFLAGS" \
+ CXXFLAGS_FOR_BUILD="$LOCALCFLAGS" \
+ CXXFLAGS_FOR_TARGET="$LOCALCFLAGS -fPIC" \
+ ../gcc-${GCC_VERSION}/configure \
+ --prefix=$TARGETDIR --libexecdir=$TARGETDIR/lib \
+ --enable-bootstrap \
+ --disable-werror --disable-nls \
+ --disable-shared --disable-multilib \
+ --disable-libssp --disable-libquadmath --disable-libcc1 \
+ ${GCC_OPTIONS} --enable-languages="${LANGUAGES}" \
+ --with-gmp=$DESTDIR$TARGETDIR --with-mpfr=$DESTDIR$TARGETDIR \
+ --with-mpc=$DESTDIR$TARGETDIR --with-libelf=$DESTDIR$TARGETDIR \
+ --with-pkgversion="coreboot bootstrap v$CROSSGCC_VERSION $CROSSGCC_DATE" \
+ && \
+ $MAKE $JOBS BOOT_CFLAGS="$LOCALCFLAGS" BUILD_CONFIG="" bootstrap && \
+ $MAKE install-gcc \
+ install-target-libgcc \
+ maybe-install-target-libada \
+ maybe-install-target-libstdc++-v3 \
+ DESTDIR=$DESTDIR && \
+ ln -s gcc $DESTDIR$TARGETDIR/bin/cc || touch .failed
+}
+
+build_cross_GCC() {
# Work around crazy code generator in GCC that confuses CLANG.
$CC --version | grep clang >/dev/null 2>&1 && \
HOSTCFLAGS="$HOSTCFLAGS -fbracket-depth=1024"
@@ -532,6 +570,14 @@ build_GCC() {
fi
}
+build_GCC() {
+ if [ "$1" = host ]; then
+ bootstrap_GCC
+ else
+ build_cross_GCC
+ fi
+}
+
build_EXPAT() {
CC="$CC" CFLAGS="$HOSTCFLAGS" ../${EXPAT_DIR}/configure --disable-shared \
--prefix=$TARGETDIR --target=${TARGETARCH} || touch .failed
@@ -657,6 +703,7 @@ while true ; do
-c|--clean) shift; clean=1;;
-t|--savetemps) shift; SAVETEMPS=1;;
-d|--directory) shift; TARGETDIR="$1"; shift;;
+ -b|--bootstrap) shift; BOOTSTRAP=1;;
-p|--platform) shift; TARGETARCH="$1"; shift;;
-l|--languages) shift; LANGUAGES="$1"; shift;;
-D|--destdir) shift; DESTDIR="$1"; shift;;
1
0
Patch set updated for coreboot: buildgcc: Add option to bootstrap a host gcc
by Nico Huber 19 Apr '16
by Nico Huber 19 Apr '16
19 Apr '16
Nico Huber (nico.h(a)gmx.de) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13473
-gerrit
commit d93f18cb9bd3e194cea55a288fa311db3666ecc5
Author: Nico Huber <nico.huber(a)secunet.com>
Date: Tue Jan 26 16:10:17 2016 +0100
buildgcc: Add option to bootstrap a host gcc
Bootstrapping gcc is the recommended way if your host gcc's version
doesn't match the gcc version you're going to build. While a build
with an outdated host gcc usually succeeds, an outdated gnat seems
to be a bigger issue.
Some library controversy: gcc likes the libraries it ships with most
but we don't want to install shared libraries. So we build them static
(--disable-shared) and install only the minimum (libgcc, libada,
libstdc++). However, as the code of these libraries might be used to
build a shared library we have to compile them with `-fPIC`.
So far build tested with `make BUILDGCC_OPTIONS="-b -l c,ada"` on
o Ubuntu 14.04 "Trusty Tahr"
o Debian 8 "Jessie"
o current Arch Linux
Change-Id: Icb47d3e9dbafc55737fbc3ce62a084fb9d5f359a
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
---
util/crossgcc/buildgcc | 55 ++++++++++++++++++++++++++++++++++++++++++++++----
1 file changed, 51 insertions(+), 4 deletions(-)
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index eddafe5..860f3ea 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -18,8 +18,8 @@
cd $(dirname $0)
-CROSSGCC_DATE="April 3rd, 2016"
-CROSSGCC_VERSION="1.38"
+CROSSGCC_DATE="April 19th, 2016"
+CROSSGCC_VERSION="1.39"
CROSSGCC_COMMIT=$( git describe )
# default settings
@@ -30,6 +30,7 @@ LANGUAGES=c
DESTDIR=
SAVETEMPS=0
SKIPPYTHON=1
+BOOTSTRAP=0
# GCC toolchain version numbers
GMP_VERSION=6.1.0
@@ -342,6 +343,9 @@ build_for_target()
build()
{
if package_uses_targetarch $1; then
+ if [ $BOOTSTRAP -eq 1 -a ! -f "${TARGETDIR}/.GCC.success" ]; then
+ build_for_host GCC
+ fi
build_for_target $1
else
build_for_host $1
@@ -381,6 +385,8 @@ myhelp()
printf " [-P|--package <package>] Build a specific package: GCC, CLANG, IASL, GDB\n"
printf " (defaults to $PACKAGE)\n"
printf "GCC specific options:\n"
+ printf " [-b|--bootstrap] bootstrap the host compiler before building\n"
+ printf " the cross compiler\n"
printf " [-p|--platform <platform>] target platform to build cross compiler for\n"
printf " (defaults to $TARGETARCH)\n"
printf " [-l|--languages <languages>] comma separated list of target languages\n"
@@ -493,8 +499,40 @@ build_BINUTILS() {
$MAKE install DESTDIR=$DESTDIR || touch .failed
}
-
-build_GCC() {
+bootstrap_GCC() {
+ # Work around crazy code generator in GCC that confuses CLANG.
+ $CC --version | grep clang >/dev/null 2>&1 && \
+ LOCALCFLAGS="$HOSTCFLAGS -fbracket-depth=1024" || \
+ LOCALCFLAGS="$HOSTCFLAGS"
+
+ CC="$CC" \
+ CFLAGS="$LOCALCFLAGS" \
+ CFLAGS_FOR_BUILD="$LOCALCFLAGS" \
+ CFLAGS_FOR_TARGET="$LOCALCFLAGS -fPIC" \
+ CXXFLAGS="$LOCALCFLAGS" \
+ CXXFLAGS_FOR_BUILD="$LOCALCFLAGS" \
+ CXXFLAGS_FOR_TARGET="$LOCALCFLAGS -fPIC" \
+ ../gcc-${GCC_VERSION}/configure \
+ --prefix=$TARGETDIR --libexecdir=$TARGETDIR/lib \
+ --enable-bootstrap \
+ --disable-werror --disable-nls \
+ --disable-shared --disable-multilib \
+ --disable-libssp --disable-libquadmath --disable-libcc1 \
+ ${GCC_OPTIONS} --enable-languages="${LANGUAGES}" \
+ --with-gmp=$DESTDIR$TARGETDIR --with-mpfr=$DESTDIR$TARGETDIR \
+ --with-mpc=$DESTDIR$TARGETDIR --with-libelf=$DESTDIR$TARGETDIR \
+ --with-pkgversion="coreboot bootstrap v$CROSSGCC_VERSION $CROSSGCC_DATE" \
+ && \
+ $MAKE $JOBS BOOT_CFLAGS="$LOCALCFLAGS" BUILD_CONFIG="" bootstrap && \
+ $MAKE install-gcc \
+ install-target-libgcc \
+ maybe-install-target-libada \
+ maybe-install-target-libstdc++-v3 \
+ DESTDIR=$DESTDIR && \
+ ln -s gcc $DESTDIR$TARGETDIR/bin/cc || touch .failed
+}
+
+build_cross_GCC() {
# Work around crazy code generator in GCC that confuses CLANG.
$CC --version | grep clang >/dev/null 2>&1 && \
HOSTCFLAGS="$HOSTCFLAGS -fbracket-depth=1024"
@@ -532,6 +570,14 @@ build_GCC() {
fi
}
+build_GCC() {
+ if [ "$1" = host ]; then
+ bootstrap_GCC
+ else
+ build_cross_GCC
+ fi
+}
+
build_EXPAT() {
CC="$CC" CFLAGS="$HOSTCFLAGS" ../${EXPAT_DIR}/configure --disable-shared \
--prefix=$TARGETDIR --target=${TARGETARCH} || touch .failed
@@ -657,6 +703,7 @@ while true ; do
-c|--clean) shift; clean=1;;
-t|--savetemps) shift; SAVETEMPS=1;;
-d|--directory) shift; TARGETDIR="$1"; shift;;
+ -b|--bootstrap) shift; BOOTSTRAP=1;;
-p|--platform) shift; TARGETARCH="$1"; shift;;
-l|--languages) shift; LANGUAGES="$1"; shift;;
-D|--destdir) shift; DESTDIR="$1"; shift;;
1
0
19 Apr '16
Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14414
-gerrit
commit a51296fce527e006c4fcfc60b6e4d7891516eedd
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Tue Apr 19 07:17:59 2016 +0300
AGESA vendorcode: Link common amdlib
Having CFLAGS -Os disables -falign-functions. On unlucky builds
this may delay entry to ramstage by 600ms.
Change-Id: Ice6781666a0834f1e8e60a0c93048ac8472f27d9
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
src/mainboard/advansus/a785e-i/Makefile.inc | 4 +-
src/mainboard/asus/m5a88-v/Makefile.inc | 4 +-
src/mainboard/avalue/eax-785e/Makefile.inc | 4 +-
src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c | 2 +-
.../jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h | 2 +-
src/southbridge/amd/agesa/hudson/imc.c | 2 +-
src/vendorcode/amd/agesa/common/amdlib.c | 1266 +++++++++++++++++++
src/vendorcode/amd/agesa/common/amdlib.h | 398 ++++++
src/vendorcode/amd/agesa/f10/Lib/amdlib.c | 1259 -------------------
src/vendorcode/amd/agesa/f10/Lib/amdlib.h | 374 ------
src/vendorcode/amd/agesa/f10/Makefile.inc | 9 +-
src/vendorcode/amd/agesa/f12/Lib/amdlib.c | 1262 -------------------
src/vendorcode/amd/agesa/f12/Lib/amdlib.h | 406 ------
src/vendorcode/amd/agesa/f12/Makefile.inc | 10 +-
src/vendorcode/amd/agesa/f14/Lib/amdlib.c | 1262 -------------------
src/vendorcode/amd/agesa/f14/Lib/amdlib.h | 408 -------
src/vendorcode/amd/agesa/f14/Makefile.inc | 11 +-
src/vendorcode/amd/agesa/f15/Lib/amdlib.c | 1283 -------------------
src/vendorcode/amd/agesa/f15/Lib/amdlib.h | 390 ------
src/vendorcode/amd/agesa/f15/Makefile.inc | 8 +-
src/vendorcode/amd/agesa/f15tn/Lib/amdlib.c | 1282 -------------------
src/vendorcode/amd/agesa/f15tn/Lib/amdlib.h | 358 ------
src/vendorcode/amd/agesa/f15tn/Makefile.inc | 8 +-
.../amd/agesa/f15tn/Proc/Fch/FchPlatform.h | 2 +-
.../amd/agesa/f15tn/Proc/IDS/Library/IdsLib.c | 9 +
src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c | 1289 --------------------
src/vendorcode/amd/agesa/f16kb/Lib/amdlib.h | 371 ------
src/vendorcode/amd/agesa/f16kb/Makefile.inc | 9 +-
.../amd/agesa/f16kb/Proc/IDS/Library/IdsLib.c | 9 +
29 files changed, 1738 insertions(+), 9963 deletions(-)
diff --git a/src/mainboard/advansus/a785e-i/Makefile.inc b/src/mainboard/advansus/a785e-i/Makefile.inc
index 45c257a..7b6a8e6 100644
--- a/src/mainboard/advansus/a785e-i/Makefile.inc
+++ b/src/mainboard/advansus/a785e-i/Makefile.inc
@@ -2,8 +2,8 @@
#SB800 CIMx share AGESA V5 lib code
ifneq ($(CONFIG_CPU_AMD_AGESA),y)
AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
- romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
- ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
+ romstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
+ ramstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
AGESA_INC := -I$(AGESA_ROOT)/ \
-I$(AGESA_ROOT)/../common \
diff --git a/src/mainboard/asus/m5a88-v/Makefile.inc b/src/mainboard/asus/m5a88-v/Makefile.inc
index 45c257a..7b6a8e6 100644
--- a/src/mainboard/asus/m5a88-v/Makefile.inc
+++ b/src/mainboard/asus/m5a88-v/Makefile.inc
@@ -2,8 +2,8 @@
#SB800 CIMx share AGESA V5 lib code
ifneq ($(CONFIG_CPU_AMD_AGESA),y)
AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
- romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
- ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
+ romstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
+ ramstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
AGESA_INC := -I$(AGESA_ROOT)/ \
-I$(AGESA_ROOT)/../common \
diff --git a/src/mainboard/avalue/eax-785e/Makefile.inc b/src/mainboard/avalue/eax-785e/Makefile.inc
index 45c257a..7b6a8e6 100644
--- a/src/mainboard/avalue/eax-785e/Makefile.inc
+++ b/src/mainboard/avalue/eax-785e/Makefile.inc
@@ -2,8 +2,8 @@
#SB800 CIMx share AGESA V5 lib code
ifneq ($(CONFIG_CPU_AMD_AGESA),y)
AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
- romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
- ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
+ romstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
+ ramstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
AGESA_INC := -I$(AGESA_ROOT)/ \
-I$(AGESA_ROOT)/../common \
diff --git a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c
index 038ad8b..37caa6e 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c
@@ -16,7 +16,7 @@
#include "AGESA.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <Lib/amdlib.h>
+#include <amdlib.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#include <vendorcode/amd/cimx/sb800/SB800.h>
#include <stdint.h>
diff --git a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
index d0a9892..a91bd0f 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
+++ b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
@@ -18,7 +18,7 @@
#define _PLATFORM_GNB_PCIE_COMPLEX_H
#include <vendorcode/amd/agesa/f14/AGESA.h>
-#include <vendorcode/amd/agesa/f14/Lib/amdlib.h>
+#include <amdlib.h>
/**
* @brief Graphic NorthBridge (GNB) General Purpose Port (GPP)
diff --git a/src/southbridge/amd/agesa/hudson/imc.c b/src/southbridge/amd/agesa/hudson/imc.c
index a077ade..4da6814 100644
--- a/src/southbridge/amd/agesa/hudson/imc.c
+++ b/src/southbridge/amd/agesa/hudson/imc.c
@@ -18,7 +18,7 @@
#include <delay.h>
#include "Porting.h"
#include "AGESA.h"
-#include <Lib/amdlib.h>
+#include <amdlib.h>
#include <Proc/Fch/Fch.h>
#include <Proc/Fch/Common/FchCommonCfg.h>
#include <Proc/Fch/FchPlatform.h>
diff --git a/src/vendorcode/amd/agesa/common/amdlib.c b/src/vendorcode/amd/agesa/common/amdlib.c
new file mode 100644
index 0000000..1f52fe0
--- /dev/null
+++ b/src/vendorcode/amd/agesa/common/amdlib.c
@@ -0,0 +1,1266 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * AMD Library
+ *
+ * Contains interface to the AMD AGESA library
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project: AGESA
+ * @e sub-project: Lib
+ * @e \$Revision: 44325 $ @e \$Date: 2010-12-22 03:29:53 -0700 (Wed, 22 Dec 2010) $
+ *
+ */
+/*
+ *****************************************************************************
+ *
+ * Copyright (c) 2011, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ***************************************************************************
+ *
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ * M O D U L E S U S E D
+ *----------------------------------------------------------------------------------------
+ */
+
+#include "AGESA.h"
+#include "Ids.h"
+#include "cpuRegisters.h"
+#include "amdlib.h"
+#include "Filecode.h"
+CODE_GROUP (G1_PEICC)
+RDATA_GROUP (G1_PEICC)
+
+#define FILECODE LIB_AMDLIB_FILECODE
+
+/*----------------------------------------------------------------------------------------
+ * D E F I N I T I O N S A N D M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ * T Y P E D E F S A N D S T R U C T U R E S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ * P R O T O T Y P E S O F L O C A L F U N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+BOOLEAN
+STATIC
+GetPciMmioAddress (
+ OUT UINT64 *MmioAddress,
+ OUT UINT32 *MmioSize,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+STATIC
+LibAmdGetDataFromPtr (
+ IN ACCESS_WIDTH AccessWidth,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ OUT UINT32 *TemData,
+ OUT UINT32 *TempDataMask
+ );
+
+/*----------------------------------------------------------------------------------------
+ * E X P O R T E D F U N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+UINT8
+ReadIo8 (
+ IN UINT16 Address
+ )
+{
+ return __inbyte (Address);
+}
+UINT16
+ReadIo16 (
+ IN UINT16 Address
+ )
+{
+ return __inword (Address);
+}
+UINT32
+ReadIo32 (
+ IN UINT16 Address
+ )
+{
+ return __indword (Address);
+}
+VOID
+WriteIo8 (
+ IN UINT16 Address,
+ IN UINT8 Data
+ )
+{
+ __outbyte (Address, Data);
+}
+VOID
+WriteIo16 (
+ IN UINT16 Address,
+ IN UINT16 Data
+ )
+{
+ __outword (Address, Data);
+}
+VOID
+WriteIo32 (
+ IN UINT16 Address,
+ IN UINT32 Data
+ )
+{
+ __outdword (Address, Data);
+}
+STATIC
+UINT64 SetFsBase (
+ UINT64 address
+ )
+{
+ UINT64 hwcr;
+ hwcr = __readmsr (0xC0010015);
+ __writemsr (0xC0010015, hwcr | 1 << 17);
+ __writemsr (0xC0000100, address);
+ return hwcr;
+}
+STATIC
+VOID
+RestoreHwcr (
+ UINT64
+ value
+ )
+{
+ __writemsr (0xC0010015, value);
+}
+UINT8
+Read64Mem8 (
+ IN UINT64 Address
+ )
+{
+ UINT8 dataRead;
+ UINT64 hwcrSave;
+ if ((Address >> 32) == 0) {
+ return *(volatile UINT8 *) (UINTN) Address;
+ }
+ hwcrSave = SetFsBase (Address);
+ dataRead = __readfsbyte (0);
+ RestoreHwcr (hwcrSave);
+ return dataRead;
+}
+UINT16
+Read64Mem16 (
+ IN UINT64 Address
+ )
+{
+ UINT16 dataRead;
+ UINT64 hwcrSave;
+ if ((Address >> 32) == 0) {
+ return *(volatile UINT16 *) (UINTN) Address;
+ }
+ hwcrSave = SetFsBase (Address);
+ dataRead = __readfsword (0);
+ RestoreHwcr (hwcrSave);
+ return dataRead;
+}
+UINT32
+Read64Mem32 (
+ IN UINT64 Address
+ )
+{
+ UINT32 dataRead;
+ UINT64 hwcrSave;
+ if ((Address >> 32) == 0) {
+ return *(volatile UINT32 *) (UINTN) Address;
+ }
+ hwcrSave = SetFsBase (Address);
+ dataRead = __readfsdword (0);
+ RestoreHwcr (hwcrSave);
+ return dataRead;
+ }
+VOID
+Write64Mem8 (
+ IN UINT64 Address,
+ IN UINT8 Data
+ )
+{
+ if ((Address >> 32) == 0){
+ *(volatile UINT8 *) (UINTN) Address = Data;
+ }
+ else {
+ UINT64 hwcrSave;
+ hwcrSave = SetFsBase (Address);
+ __writefsbyte (0, Data);
+ RestoreHwcr (hwcrSave);
+ }
+}
+VOID
+Write64Mem16 (
+ IN UINT64 Address,
+ IN UINT16 Data
+ )
+{
+ if ((Address >> 32) == 0){
+ *(volatile UINT16 *) (UINTN) Address = Data;
+ }
+ else {
+ UINT64 hwcrSave;
+ hwcrSave = SetFsBase (Address);
+ __writefsword (0, Data);
+ RestoreHwcr (hwcrSave);
+ }
+}
+VOID
+Write64Mem32 (
+ IN UINT64 Address,
+ IN UINT32 Data
+ )
+{
+ if ((Address >> 32) == 0){
+ *(volatile UINT32 *) (UINTN) Address = Data;
+ }
+ else {
+ UINT64 hwcrSave;
+ hwcrSave = SetFsBase (Address);
+ __writefsdword (0, Data);
+ RestoreHwcr (hwcrSave);
+ }
+}
+VOID
+LibAmdReadCpuReg (
+ IN UINT8 RegNum,
+ OUT UINT32 *Value
+ )
+{
+ *Value = 0;
+ switch (RegNum){
+ case CR4_REG:
+ *Value = __readcr4 ();
+ break;
+ case DR0_REG:
+ *Value = __readdr (0);
+ break;
+ case DR1_REG:
+ *Value = __readdr (1);
+ break;
+ case DR2_REG:
+ *Value = __readdr (2);
+ break;
+ case DR3_REG:
+ *Value = __readdr (3);
+ break;
+ case DR7_REG:
+ *Value = __readdr (7);
+ break;
+ default:
+ *Value = -1;
+ break;
+ }
+}
+VOID
+LibAmdWriteCpuReg (
+ IN UINT8 RegNum,
+ IN UINT32 Value
+ )
+{
+ switch (RegNum){
+ case CR4_REG:
+ __writecr4 (Value);
+ break;
+ case DR0_REG:
+ __writedr (0, Value);
+ break;
+ case DR1_REG:
+ __writedr (1, Value);
+ break;
+ case DR2_REG:
+ __writedr (2, Value);
+ break;
+ case DR3_REG:
+ __writedr (3, Value);
+ break;
+ case DR7_REG:
+ __writedr (7, Value);
+ break;
+ default:
+ break;
+ }
+}
+VOID
+LibAmdWriteBackInvalidateCache (
+ IN VOID
+ )
+{
+ __wbinvd ();
+}
+VOID
+LibAmdHDTBreakPoint (
+ VOID
+ )
+{
+ __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
+ __debugbreak (); // do you really need icebp? If so, go back to asm code
+}
+UINT8
+LibAmdBitScanForward (
+ IN UINT32 value
+ )
+{
+ UINTN Index;
+ for (Index = 0; Index < 32; Index++){
+ if (value & (1 << Index)) break;
+ }
+ return (UINT8) Index;
+}
+
+UINT8
+LibAmdBitScanReverse (
+ IN UINT32 value
+)
+{
+ uint8_t bit = 31;
+ do {
+ if (value & (1 << 31))
+ return bit;
+
+ value <<= 1;
+ bit--;
+
+ } while (value != 0);
+
+ return 0xFF; /* Error code indicating no bit found */
+}
+
+VOID
+LibAmdMsrRead (
+ IN UINT32 MsrAddress,
+ OUT UINT64 *Value,
+ IN OUT AMD_CONFIG_PARAMS *ConfigPtr
+ )
+{
+ *Value = __readmsr (MsrAddress);
+}
+VOID
+LibAmdMsrWrite (
+ IN UINT32 MsrAddress,
+ IN UINT64 *Value,
+ IN OUT AMD_CONFIG_PARAMS *ConfigPtr
+ )
+{
+ __writemsr (MsrAddress, *Value);
+}
+void LibAmdCpuidRead (
+ IN UINT32 CpuidFcnAddress,
+ OUT CPUID_DATA* Value,
+ IN OUT AMD_CONFIG_PARAMS *ConfigPtr
+ )
+{
+ __cpuid ((int *)Value, CpuidFcnAddress);
+}
+UINT64
+ReadTSC (
+ VOID
+ )
+{
+ return __rdtsc ();
+}
+VOID
+LibAmdSimNowEnterDebugger (
+ VOID
+ )
+{
+ STATIC CONST UINT8 opcode [] = {0x60, // pushad
+ 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
+ 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
+ 0x0F, 0xA2, // cpuid
+ 0x61, // popad
+ 0xC3 // ret
+ };
+ ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
+}
+
+#ifdef __SSE3__
+VOID F10RevDProbeFilterCritical (
+ IN PCI_ADDR PciAddress,
+ IN UINT32 PciRegister
+ )
+{
+ UINT64 msrsave;
+ msrsave = __readmsr (0xC001001F);
+ __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
+ _mm_mfence ();
+ __outdword (0xCF8, PciAddress.AddressValue);
+ _mm_mfence ();
+ __outdword (0xCFC, PciRegister | 2);
+ _mm_mfence ();
+ __writemsr (0xC001001F, msrsave);
+}
+
+VOID
+LibAmdCLFlush (
+ IN UINT64 Address,
+ IN UINT8 Count
+ )
+{
+ UINT64 hwcrSave;
+ UINT8 *address32;
+ UINTN Index;
+ address32 = 0;
+ hwcrSave = SetFsBase (Address);
+ for (Index = 0; Index < Count; Index++){
+ _mm_mfence ();
+ _mm_clflush_fs (&address32 [Index * 64]);
+ }
+ RestoreHwcr (hwcrSave);
+}
+#endif //__SSE3__
+
+VOID
+StopHere (
+ VOID
+ )
+{
+ VOLATILE UINTN x = 1;
+ while (x);
+}
+
+VOID
+LibAmdFinit()
+{
+ /* TODO: finit */
+ __asm__ volatile ("finit");
+}
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Read IO port
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] IoAddress IO port address
+ * @param[in] Value Pointer to save data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdIoRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ *(UINT8 *) Value = ReadIo8 (IoAddress);
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ *(UINT16 *) Value = ReadIo16 (IoAddress);
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ *(UINT32 *) Value = ReadIo32 (IoAddress);
+ break;
+ default:
+ ASSERT (FALSE);
+ break;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Write IO port
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] IoAddress IO port address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdIoWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ WriteIo8 (IoAddress, *(UINT8 *) Value);
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ WriteIo16 (IoAddress, *(UINT16 *) Value);
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ WriteIo32 (IoAddress, *(UINT32 *) Value);
+ break;
+ default:
+ ASSERT (FALSE);
+ break;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * IO read modify write
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] IoAddress IO address
+ * @param[in] Data OR data
+ * @param[in] DataMask Mask to be used before data write back to register.
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdIoRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value = 0;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
+ Value = (Value & (~TempMask)) | TempData;
+ LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Poll IO register
+ *
+ * Poll register until (RegisterValue & DataMask) == Data
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] IoAddress IO address
+ * @param[in] Data Data to compare
+ * @param[in] DataMask And mask
+ * @param[in] Delay Poll for time in 100ns (not supported)
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdIoPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ do {
+ LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
+ } while (TempData != (Value & TempMask));
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Read memory/MMIO
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] MemAddress Memory address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdMemRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ *(UINT8 *) Value = Read64Mem8 (MemAddress);
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ *(UINT16 *) Value = Read64Mem16 (MemAddress);
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ *(UINT32 *) Value = Read64Mem32 (MemAddress);
+ break;
+ default:
+ ASSERT (FALSE);
+ break;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Write memory/MMIO
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] MemAddress Memory address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdMemWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ Write64Mem8 (MemAddress, *((UINT8 *) Value));
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ Write64Mem16 (MemAddress, *((UINT16 *) Value));
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ Write64Mem32 (MemAddress, *((UINT32 *) Value));
+ break;
+ default:
+ ASSERT (FALSE);
+ break;
+ }
+}
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Memory/MMIO read modify write
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] MemAddress Memory address
+ * @param[in] Data OR data
+ * @param[in] DataMask Mask to be used before data write back to register.
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdMemRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
+ Value = (Value & (~TempMask)) | TempData;
+ LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Poll Mmio
+ *
+ * Poll register until (RegisterValue & DataMask) == Data
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] MemAddress Memory address
+ * @param[in] Data Data to compare
+ * @param[in] DataMask AND mask
+ * @param[in] Delay Poll for time in 100ns (not supported)
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdMemPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ do {
+ LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
+ } while (TempData != (Value & TempMask));
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Read PCI config space
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] PciAddress Pci address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdPciRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 LegacyPciAccess;
+ UINT32 MMIOSize;
+ UINT64 RMWrite;
+ UINT64 RMWritePrevious;
+ UINT64 MMIOAddress;
+
+ ASSERT (StdHeader != NULL);
+ ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
+ if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
+ // We need to convert our "portable" PCI address into a "real" PCI access
+ LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
+ if (PciAddress.Address.Register <= 0xFF) {
+ LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
+ LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
+ } else {
+ LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
+ RMWrite = RMWritePrevious | 0x0000400000000000ull;
+ LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
+ LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
+ LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
+ LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
+ }
+ } else {
+ // Setup the MMIO address
+ ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
+ MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
+ LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Write PCI config space
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] PciAddress Pci address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdPciWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 LegacyPciAccess;
+ UINT32 MMIOSize;
+ UINT64 RMWrite;
+ UINT64 RMWritePrevious;
+ UINT64 MMIOAddress;
+
+ ASSERT (StdHeader != NULL);
+ ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
+ if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
+ // We need to convert our "portable" PCI address into a "real" PCI access
+ LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
+ if (PciAddress.Address.Register <= 0xFF) {
+ LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
+ LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
+ } else {
+ LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
+ RMWrite = RMWritePrevious | 0x0000400000000000ull;
+ LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
+ LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
+ LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
+ LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
+ }
+ } else {
+ // Setup the MMIO address
+ ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
+ MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
+ LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * PCI read modify write
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] PciAddress Pci address
+ * @param[in] Data OR Data
+ * @param[in] DataMask Mask to be used before data write back to register.
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdPciRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
+ Value = (Value & (~TempMask)) | TempData;
+ LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Poll PCI config space register
+ *
+ * Poll register until (RegisterValue & DataMask) == Data
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] PciAddress Pci address
+ * @param[in] Data Data to compare
+ * @param[in] DataMask AND mask
+ * @param[in] Delay Poll for time in 100ns (not supported)
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdPciPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ do {
+ LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
+ } while (TempData != (Value & TempMask));
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Get MMIO base address for PCI accesses
+ *
+ * @param[out] MmioAddress PCI MMIO base address
+ * @param[out] MmioSize Size of region in bytes
+ * @param[in] StdHeader Standard configuration header
+ *
+ * @retval TRUE MmioAddress/MmioSize are valid
+ */
+BOOLEAN
+STATIC
+GetPciMmioAddress (
+ OUT UINT64 *MmioAddress,
+ OUT UINT32 *MmioSize,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ BOOLEAN MmioIsEnabled;
+ UINT32 EncodedSize;
+ UINT64 MsrReg;
+
+ ASSERT (StdHeader != NULL);
+
+ MmioIsEnabled = FALSE;
+ LibAmdMsrRead (MSR_MMIO_Cfg_Base, &MsrReg, StdHeader);
+ if ((MsrReg & BIT0) != 0) {
+ *MmioAddress = MsrReg & 0xFFFFFFFFFFF00000ull;
+ EncodedSize = (UINT32) ((MsrReg & 0x3C) >> 2);
+ *MmioSize = ((1 << EncodedSize) * 0x100000);
+ MmioIsEnabled = TRUE;
+ }
+ return MmioIsEnabled;
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Read field of PCI config register.
+ *
+ *
+ *
+ * @param[in] Address Pci address (register must be DWORD aligned)
+ * @param[in] Highbit High bit position of the field in DWORD
+ * @param[in] Lowbit Low bit position of the field in DWORD
+ * @param[out] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ */
+VOID
+LibAmdPciReadBits (
+ IN PCI_ADDR Address,
+ IN UINT8 Highbit,
+ IN UINT8 Lowbit,
+ OUT UINT32 *Value,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
+
+ LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
+ *Value >>= Lowbit; // Shift
+
+ // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
+
+ if ((Highbit - Lowbit) != 31) {
+ *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Write field of PCI config register.
+ *
+ *
+ *
+ * @param[in] Address Pci address (register must be DWORD aligned)
+ * @param[in] Highbit High bit position of the field in DWORD
+ * @param[in] Lowbit Low bit position of the field in DWORD
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ */
+VOID
+LibAmdPciWriteBits (
+ IN PCI_ADDR Address,
+ IN UINT8 Highbit,
+ IN UINT8 Lowbit,
+ IN CONST UINT32 *Value,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 Temp;
+ UINT32 Mask;
+
+ ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
+
+ // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
+
+ if ((Highbit - Lowbit) != 31) {
+ Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
+ } else {
+ Mask = (UINT32) 0xFFFFFFFF;
+ }
+
+ LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
+ Temp &= ~(Mask << Lowbit);
+ Temp |= (*Value & Mask) << Lowbit;
+ LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Locate next capability pointer
+ *
+ * Given a SBDFO this routine will find the next PCI capabilities list entry.
+ * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
+ * returned.
+ * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
+ *
+ * @param[in,out] Address Pci address
+ * @param[in] StdHeader Standard configuration header
+ */
+
+VOID
+LibAmdPciFindNextCap (
+ IN OUT PCI_ADDR *Address,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ PCI_ADDR Base;
+ UINT32 Offset;
+ UINT32 Temp;
+ PCI_ADDR TempAddress;
+
+ ASSERT (Address != NULL);
+ ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
+
+ Base.AddressValue = Address->AddressValue;
+ Offset = Base.Address.Register;
+ Base.Address.Register = 0;
+
+ Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
+
+ // Verify that the SBDFO points to a valid PCI device SANITY CHECK
+ LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
+ if (Temp == 0xFFFFFFFF) {
+ ASSERT (FALSE);
+ return; // There is no device at this address
+ }
+
+ // Verify that the device supports a capability list
+ TempAddress.AddressValue = Base.AddressValue + 0x04;
+ LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
+ if (Temp == 0) {
+ return; // This PCI device does not support capability lists
+ }
+
+ if (Offset != 0) {
+ // If we are continuing on an existing list
+ TempAddress.AddressValue = Base.AddressValue + Offset;
+ LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
+ } else {
+ // We are starting on a new list
+ TempAddress.AddressValue = Base.AddressValue + 0x34;
+ LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
+ }
+
+ if (Temp == 0) {
+ return; // We have reached the end of the capabilities list
+ }
+
+ // Error detection and recovery- The statement below protects against
+ // PCI devices with broken PCI capabilities lists. Detect a pointer
+ // that is not uint32 aligned, points into the first 64 reserved DWORDs
+ // or points back to itself.
+ if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
+ ASSERT (FALSE);
+ return;
+ }
+
+ Address->AddressValue = Base.AddressValue + Temp;
+ return;
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Set memory with value
+ *
+ *
+ * @param[in,out] Destination Pointer to memory range
+ * @param[in] Value Value to set memory with
+ * @param[in] FillLength Size of the memory range
+ * @param[in] StdHeader Standard configuration header (Optional)
+ */
+VOID
+LibAmdMemFill (
+ IN VOID *Destination,
+ IN UINT8 Value,
+ IN UINTN FillLength,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT8 *Dest;
+ ASSERT (StdHeader != NULL);
+ Dest = Destination;
+ while ((FillLength--) != 0) {
+ *Dest++ = Value;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Copy memory
+ *
+ *
+ * @param[in,out] Destination Pointer to destination buffer
+ * @param[in] Source Pointer to source buffer
+ * @param[in] CopyLength buffer length
+ * @param[in] StdHeader Standard configuration header (Optional)
+ */
+VOID
+LibAmdMemCopy (
+ IN VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN CopyLength,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT8 *Dest;
+ CONST UINT8 *SourcePtr;
+ ASSERT (StdHeader != NULL);
+ Dest = Destination;
+ SourcePtr = Source;
+ while ((CopyLength--) != 0) {
+ *Dest++ = *SourcePtr++;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Returns the package type mask for the processor
+ *
+ *
+ * @param[in] StdHeader Standard configuration header (Optional)
+ */
+
+// Returns the package type mask for the processor
+UINT32
+LibAmdGetPackageType (
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 ProcessorPackageType;
+ CPUID_DATA CpuId;
+
+ LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
+ ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
+ return (UINT32) (1 << ProcessorPackageType);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Returns the package type mask for the processor
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] Data data
+ * @param[in] DataMask data
+ * @param[out] TemData typecast data
+ * @param[out] TempDataMask typecast data
+ */
+
+
+VOID
+STATIC
+LibAmdGetDataFromPtr (
+ IN ACCESS_WIDTH AccessWidth,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ OUT UINT32 *TemData,
+ OUT UINT32 *TempDataMask
+ )
+{
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ *TemData = (UINT32)*(UINT8 *) Data;
+ *TempDataMask = (UINT32)*(UINT8 *) DataMask;
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ *TemData = (UINT32)*(UINT16 *) Data;
+ *TempDataMask = (UINT32)*(UINT16 *) DataMask;
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ *TemData = *(UINT32 *) Data;
+ *TempDataMask = *(UINT32 *) DataMask;
+ break;
+ default:
+ IDS_ERROR_TRAP;
+ break;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Returns the package type mask for the processor
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @retval Width in number of bytes
+ */
+
+
+UINT8
+LibAmdAccessWidth (
+ IN ACCESS_WIDTH AccessWidth
+ )
+{
+ UINT8 Width;
+
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ Width = 1;
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ Width = 2;
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ Width = 4;
+ break;
+ case AccessWidth64:
+ case AccessS3SaveWidth64:
+ Width = 8;
+ break;
+ default:
+ Width = 0;
+ IDS_ERROR_TRAP;
+ break;
+ }
+ return Width;
+}
+
+VOID
+CpuidRead (
+ IN UINT32 CpuidFcnAddress,
+ OUT CPUID_DATA *Value
+ )
+{
+ __cpuid ((int *)Value, CpuidFcnAddress);
+}
+
+UINT8
+ReadNumberOfCpuCores(
+ VOID
+ )
+{
+ CPUID_DATA Value;
+ CpuidRead (0x80000008, &Value);
+ return Value.ECX_Reg & 0xff;
+}
diff --git a/src/vendorcode/amd/agesa/common/amdlib.h b/src/vendorcode/amd/agesa/common/amdlib.h
new file mode 100644
index 0000000..f5da228
--- /dev/null
+++ b/src/vendorcode/amd/agesa/common/amdlib.h
@@ -0,0 +1,398 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * AMD Library
+ *
+ * Contains interface to the AMD AGESA library
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project: AGESA
+ * @e sub-project: Lib
+ * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
+ *
+ */
+/*
+ *****************************************************************************
+ *
+ * Copyright (c) 2011, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ***************************************************************************
+ *
+ */
+
+#ifndef _AMD_LIB_H_
+#define _AMD_LIB_H_
+
+/*----------------------------------------------------------------------------------------
+ * D E F I N I T I O N S A N D M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+#define IOCF8 0xCF8
+#define IOCFC 0xCFC
+
+// Reg Values for ReadCpuReg and WriteCpuReg
+#define CR0_REG 0x00
+#define CR4_REG 0x04
+#define DR0_REG 0x10
+#define DR1_REG 0x11
+#define DR2_REG 0x12
+#define DR3_REG 0x13
+#define DR7_REG 0x17
+
+UINT8
+ReadIo8 (
+ IN UINT16 Address
+ );
+
+UINT16
+ReadIo16 (
+ IN UINT16 Address
+ );
+
+UINT32
+ReadIo32 (
+ IN UINT16 Address
+ );
+
+VOID
+WriteIo8 (
+ IN UINT16 Address,
+ IN UINT8 Data
+ );
+
+VOID
+WriteIo16 (
+ IN UINT16 Address,
+ IN UINT16 Data
+ );
+
+VOID
+WriteIo32 (
+ IN UINT16 Address,
+ IN UINT32 Data
+ );
+
+UINT8
+Read64Mem8 (
+ IN UINT64 Address
+ );
+
+UINT16
+Read64Mem16 (
+ IN UINT64 Address
+ );
+
+UINT32
+Read64Mem32 (
+ IN UINT64 Address
+ );
+
+VOID
+Write64Mem8 (
+ IN UINT64 Address,
+ IN UINT8 Data
+ );
+
+VOID
+Write64Mem16 (
+ IN UINT64 Address,
+ IN UINT16 Data
+ );
+
+VOID
+Write64Mem32 (
+ IN UINT64 Address,
+ IN UINT32 Data
+ );
+
+UINT64
+ReadTSC (
+ VOID
+ );
+
+// MSR
+VOID
+LibAmdMsrRead (
+ IN UINT32 MsrAddress,
+ OUT UINT64 *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMsrWrite (
+ IN UINT32 MsrAddress,
+ IN UINT64 *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// IO
+VOID
+LibAmdIoRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdIoWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdIoRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdIoPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// Memory or MMIO
+VOID
+LibAmdMemRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMemWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMemRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMemPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// PCI
+VOID
+LibAmdPciRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciReadBits (
+ IN PCI_ADDR Address,
+ IN UINT8 Highbit,
+ IN UINT8 Lowbit,
+ OUT UINT32 *Value,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciWriteBits (
+ IN PCI_ADDR Address,
+ IN UINT8 Highbit,
+ IN UINT8 Lowbit,
+ IN CONST UINT32 *Value,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciFindNextCap (
+ IN OUT PCI_ADDR *Address,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// CPUID
+VOID
+LibAmdCpuidRead (
+ IN UINT32 CpuidFcnAddress,
+ OUT CPUID_DATA *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// Utility Functions
+VOID
+LibAmdMemFill (
+ IN VOID *Destination,
+ IN UINT8 Value,
+ IN UINTN FillLength,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMemCopy (
+ IN VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN CopyLength,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+UINT32
+LibAmdGetPackageType (
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+UINT8
+LibAmdBitScanReverse (
+ IN UINT32 value
+ );
+UINT8
+LibAmdBitScanForward (
+ IN UINT32 value
+ );
+
+VOID
+LibAmdReadCpuReg (
+ IN UINT8 RegNum,
+ OUT UINT32 *Value
+ );
+VOID
+LibAmdWriteCpuReg (
+ IN UINT8 RegNum,
+ IN UINT32 Value
+ );
+
+VOID
+LibAmdWriteBackInvalidateCache (
+ IN VOID
+ );
+
+VOID
+LibAmdSimNowEnterDebugger (VOID);
+
+VOID
+LibAmdHDTBreakPoint (VOID);
+
+UINT8
+LibAmdAccessWidth (
+ IN ACCESS_WIDTH AccessWidth
+ );
+
+VOID
+LibAmdCLFlush (
+ IN UINT64 Address,
+ IN UINT8 Count
+ );
+
+VOID F10RevDProbeFilterCritical (
+ IN PCI_ADDR PciAddress,
+ IN UINT32 PciRegister
+ );
+
+VOID
+LibAmdFinit (
+ VOID
+ );
+
+VOID
+StopHere (
+ VOID
+ );
+
+/* For f14 or older. */
+VOID
+CpuidRead (
+ IN UINT32 CpuidFcnAddress,
+ OUT CPUID_DATA *Value
+ );
+
+UINT8
+ReadNumberOfCpuCores(
+ VOID
+ );
+
+/* From 16kb, no implementation supplied. */
+VOID
+LibAmdFnclex (
+ VOID);
+
+VOID
+LibAmdReadMxcsr (
+ OUT UINT32 *Value
+ );
+VOID
+LibAmdWriteMxcsr (
+ IN UINT32 *Value
+ );
+
+
+#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f10/Lib/amdlib.c b/src/vendorcode/amd/agesa/f10/Lib/amdlib.c
deleted file mode 100644
index 1076572..0000000
--- a/src/vendorcode/amd/agesa/f10/Lib/amdlib.c
+++ /dev/null
@@ -1,1259 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN VOID *Data,
- IN VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- ;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-
-#ifdef __SSE3__
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-#endif //__SSE3__
-
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 MsrReg;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &MsrReg, StdHeader);
- if ((MsrReg & BIT0) != 0) {
- *MmioAddress = MsrReg & 0xFFFFFFFFFFF00000ull;
- EncodedSize = (UINT32) ((MsrReg & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN VOID *Data,
- IN VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f10/Lib/amdlib.h b/src/vendorcode/amd/agesa/f10/Lib/amdlib.h
deleted file mode 100644
index 367db91..0000000
--- a/src/vendorcode/amd/agesa/f10/Lib/amdlib.h
+++ /dev/null
@@ -1,374 +0,0 @@
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-// PROTOTYPES FOR amdlib32.asm
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (VOID);
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-#ifdef __SSE3__
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- );
-
-VOID LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-#endif
-
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID StopHere(VOID);
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f10/Makefile.inc b/src/vendorcode/amd/agesa/f10/Makefile.inc
index 1109c08..8c6b43a 100644
--- a/src/vendorcode/amd/agesa/f10/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f10/Makefile.inc
@@ -59,6 +59,14 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
+
#libagesa-y += Proc/CPU/Family/0x10/F10IoCstate.c
#libagesa-y += Proc/CPU/Feature/cpuIoCstate.c
#libagesa-y += Proc/Mem/NB/ON/mnprotoon.c
@@ -106,7 +114,6 @@ libagesa-y += Proc/Common/AmdS3LateRestore.c
libagesa-y += Proc/CPU/Table.c
libagesa-y += Proc/HT/htInterface.c
libagesa-y += Proc/IDS/Perf/IdsPerf.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/CPU/Feature/cpuCacheFlushOnHalt.c
libagesa-y += Proc/Mem/Main/minit.c
libagesa-y += Proc/Mem/Feat/INTLVRN/mfintlvrn.c
diff --git a/src/vendorcode/amd/agesa/f12/Lib/amdlib.c b/src/vendorcode/amd/agesa/f12/Lib/amdlib.c
deleted file mode 100644
index ec85f78..0000000
--- a/src/vendorcode/amd/agesa/f12/Lib/amdlib.c
+++ /dev/null
@@ -1,1262 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 48409 $ @e \$Date: 2011-03-09 01:19:40 +0800 (Wed, 09 Mar 2011) $
- *
- */
-/*
- *****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***************************************************************************
- *
- */
-
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- ;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- IDS_HDT_CONSOLE (LIB_PCI_RD, "~PCI RD %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- IDS_HDT_CONSOLE (LIB_PCI_RD, "~MMIO RD %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- IDS_HDT_CONSOLE (LIB_PCI_WR, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- IDS_HDT_CONSOLE (LIB_PCI_WR, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 LocalMsrRegister;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &LocalMsrRegister, StdHeader);
- if ((LocalMsrRegister & BIT0) != 0) {
- *MmioAddress = LocalMsrRegister & 0xFFFFFFFFFFF00000ull;
- EncodedSize = (UINT32) ((LocalMsrRegister & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- CONST UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f12/Lib/amdlib.h b/src/vendorcode/amd/agesa/f12/Lib/amdlib.h
deleted file mode 100644
index 702cde8..0000000
--- a/src/vendorcode/amd/agesa/f12/Lib/amdlib.h
+++ /dev/null
@@ -1,406 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR0_REG 0x00
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-#if !defined __GNUC__
-// PROTOTYPES FOR amdlib32.asm
-void _mm_stream_si128_fs (void *__A, void *__B);
-void _mm_store_si128_fs (void *dest, void *data);
-void _mm_clflush_fs (void *address32);
-#endif
-/*---------------------------------------------------------------------------------------
- * L O C A L F U N C T I O N S
- *---------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID
- );
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-StopHere (
- VOID
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc
index 30efd4c..92b28d7 100644
--- a/src/vendorcode/amd/agesa/f12/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f12/Makefile.inc
@@ -96,10 +96,16 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
-libagesa-y = Legacy/Proc/agesaCallouts.c
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
+libagesa-y += Legacy/Proc/agesaCallouts.c
libagesa-y += Legacy/Proc/Dispatcher.c
libagesa-y += Legacy/Proc/hobTransfer.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/Common/AmdInitEarly.c
libagesa-y += Proc/Common/AmdInitEnv.c
libagesa-y += Proc/Common/AmdInitLate.c
diff --git a/src/vendorcode/amd/agesa/f14/Lib/amdlib.c b/src/vendorcode/amd/agesa/f14/Lib/amdlib.c
deleted file mode 100644
index b28878b..0000000
--- a/src/vendorcode/amd/agesa/f14/Lib/amdlib.c
+++ /dev/null
@@ -1,1262 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44325 $ @e \$Date: 2010-12-22 03:29:53 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- *****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***************************************************************************
- *
- */
-
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- ;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-
-#ifdef __SSE3__
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-#endif //__SSE3__
-
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 MsrReg;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &MsrReg, StdHeader);
- if ((MsrReg & BIT0) != 0) {
- *MmioAddress = MsrReg & 0xFFFFFFFFFFF00000ull;
- EncodedSize = (UINT32) ((MsrReg & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- CONST UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f14/Lib/amdlib.h b/src/vendorcode/amd/agesa/f14/Lib/amdlib.h
deleted file mode 100644
index 25f19a3..0000000
--- a/src/vendorcode/amd/agesa/f14/Lib/amdlib.h
+++ /dev/null
@@ -1,408 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
- *
- */
-/*
- *****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***************************************************************************
- *
- */
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR0_REG 0x00
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-#if !defined __GNUC__
-// PROTOTYPES FOR amdlib32.asm
-void _mm_stream_si128_fs (void *__A, void *__B);
-void _mm_store_si128_fs (void *dest, void *data);
-void _mm_clflush_fs (void *address32);
-#endif
-/*---------------------------------------------------------------------------------------
- * L O C A L F U N C T I O N S
- *---------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID
- );
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-StopHere (
- VOID
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f14/Makefile.inc b/src/vendorcode/amd/agesa/f14/Makefile.inc
index a5f7561..a51c013 100644
--- a/src/vendorcode/amd/agesa/f14/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f14/Makefile.inc
@@ -80,7 +80,15 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
-libagesa-y = Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
+
+libagesa-y += Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c
libagesa-y += Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c
libagesa-y += Proc/GNB/Nb/Family/0x14/F14NbLclkDpm.c
libagesa-y += Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c
@@ -198,7 +206,6 @@ libagesa-y += Proc/CPU/Family/0x14/cpuF14Utilities.c
libagesa-y += Proc/HT/htInterface.c
libagesa-y += Proc/GNB/Gfx/GfxStrapsInit.c
libagesa-y += Proc/GNB/Nb/NbInitAtEarly.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/CPU/Feature/cpuCacheFlushOnHalt.c
libagesa-y += Proc/CPU/Feature/cpuCpb.c
libagesa-y += Proc/Mem/Main/minit.c
diff --git a/src/vendorcode/amd/agesa/f15/Lib/amdlib.c b/src/vendorcode/amd/agesa/f15/Lib/amdlib.c
deleted file mode 100644
index cbb8419..0000000
--- a/src/vendorcode/amd/agesa/f15/Lib/amdlib.c
+++ /dev/null
@@ -1,1283 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 56279 $ @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G2_PEI)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN VOID *Data,
- IN VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- break;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- break;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-UINT64
-MsrRead (
- IN UINT32 MsrAddress
- )
-{
- return __readmsr (MsrAddress);
-}
-
-VOID
-MsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 Value
- )
-{
- __writemsr (MsrAddress, Value);
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- IDS_HDT_CONSOLE (LIB_PCI_RD, "~PCI RD %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- IDS_HDT_CONSOLE (LIB_PCI_RD, "~MMIO RD %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- IDS_HDT_CONSOLE (LIB_PCI_WR, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- IDS_HDT_CONSOLE (LIB_PCI_WR, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 LocalMsrRegister;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &LocalMsrRegister, StdHeader);
- if ((LocalMsrRegister & BIT0) != 0) {
- *MmioAddress = LocalMsrRegister & 0xFFFFFFFFFFF00000;
- EncodedSize = (UINT32) ((LocalMsrRegister & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN VOID *Data,
- IN VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- break;
- }
- return Width;
-}
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f15/Lib/amdlib.h b/src/vendorcode/amd/agesa/f15/Lib/amdlib.h
deleted file mode 100644
index f7a747c..0000000
--- a/src/vendorcode/amd/agesa/f15/Lib/amdlib.h
+++ /dev/null
@@ -1,390 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 02:16:51 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-// PROTOTYPES FOR amdlib32.asm
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID
- );
-
-// MSR
-
-UINT64
-MsrRead (
- IN UINT32 MsrAddress
- );
-
-VOID
-MsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 Value
- );
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-StopHere (
- VOID
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc
index b7bc898..e92308e 100644
--- a/src/vendorcode/amd/agesa/f15/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f15/Makefile.inc
@@ -72,10 +72,16 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
libagesa-y += Legacy/Proc/agesaCallouts.c
libagesa-y += Legacy/Proc/Dispatcher.c
libagesa-y += Legacy/Proc/hobTransfer.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/Common/AmdInitEarly.c
libagesa-y += Proc/Common/AmdInitEnv.c
libagesa-y += Proc/Common/AmdInitLate.c
diff --git a/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.c b/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.c
deleted file mode 100644
index 3008db2..0000000
--- a/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.c
+++ /dev/null
@@ -1,1282 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 48409 $ @e \$Date: 2011-03-08 11:19:40 -0600 (Tue, 08 Mar 2011) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- ;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-#if 0
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-#endif
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-
-VOID
-LibAmdFinit()
-{
- /* TODO: finit */
- __asm__ volatile ("finit");
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- //IDS_HDT_CONSOLE (LIB_PCI_RD, "~PCI RD %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- //IDS_HDT_CONSOLE (LIB_PCI_RD, "~MMIO RD %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- //IDS_HDT_CONSOLE (LIB_PCI_WR, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "LibAmdPciWrite\n");
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- //IDS_HDT_CONSOLE (LIB_PCI_WR, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "LibAmdPciWrite mmio\n");
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 LocalMsrRegister;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &LocalMsrRegister, StdHeader);
- if ((LocalMsrRegister & BIT0) != 0) {
- *MmioAddress = LocalMsrRegister & 0xFFFFFFFFFFF00000;
- EncodedSize = (UINT32) ((LocalMsrRegister & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- CONST UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.h b/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.h
deleted file mode 100644
index ea15c7b..0000000
--- a/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.h
+++ /dev/null
@@ -1,358 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-// PROTOTYPES FOR amdlib32.asm
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID);
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID
-LibAmdFinit (
- VOID);
-
-VOID
-StopHere (
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc
index 986fbc5..6434637 100644
--- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc
@@ -93,10 +93,16 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
libagesa-y += Legacy/Proc/Dispatcher.c
libagesa-y += Legacy/Proc/agesaCallouts.c
libagesa-y += Legacy/Proc/hobTransfer.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/CPU/Family/0x15/TN/F15TnC6State.c
libagesa-y += Proc/CPU/Family/0x15/TN/F15TnCpb.c
libagesa-y += Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h
index bef3016..3fd7c9c 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h
@@ -106,7 +106,7 @@
#endif
#include "Fch.h"
-#include <Lib/amdlib.h>
+#include "amdlib.h"
#include "Common/FchCommonCfg.h"
#include "Common/AcpiLib.h"
#include "Common/FchDef.h"
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsLib.c b/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsLib.c
index 50aa2ee..b6867c5 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsLib.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsLib.c
@@ -930,3 +930,12 @@ IdsLibDataMaskSet32 (
+VOID
+IdsOutPort (
+ IN UINT32 Addr,
+ IN UINT32 Value,
+ IN UINT32 Flag
+ )
+{
+ __outdword ((UINT16) Addr, Value);
+}
diff --git a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c b/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c
deleted file mode 100644
index 5243f23..0000000
--- a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c
+++ /dev/null
@@ -1,1289 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 48409 $ @e \$Date: 2011-03-08 11:19:40 -0600 (Tue, 08 Mar 2011) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- break;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- break;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-#if 0
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-#endif
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-
-VOID
-LibAmdFinit()
-{
- /* TODO: finit */
- __asm__ volatile ("finit");
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- //IDS_HDT_CONSOLE (LIB_PCI_RD, "~PCI RD %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- //IDS_HDT_CONSOLE (LIB_PCI_RD, "~MMIO RD %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- //IDS_HDT_CONSOLE (LIB_PCI_WR, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "LibAmdPciWrite\n");
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- //IDS_HDT_CONSOLE (LIB_PCI_WR, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "LibAmdPciWrite mmio\n");
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 LocalMsrRegister;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &LocalMsrRegister, StdHeader);
- if ((LocalMsrRegister & BIT0) != 0) {
- *MmioAddress = LocalMsrRegister & 0xFFFFFFFFFFF00000;
- EncodedSize = (UINT32) ((LocalMsrRegister & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- CONST UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- break;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.h b/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.h
deleted file mode 100644
index 373ac1f..0000000
--- a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.h
+++ /dev/null
@@ -1,371 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 85030 $ @e \$Date: 2012-12-26 00:20:10 -0600 (Wed, 26 Dec 2012) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-// PROTOTYPES FOR amdlib32.asm
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID);
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID
-StopHere (
- VOID
- );
-
-VOID
-LibAmdFinit (
- VOID);
-
-VOID
-LibAmdFnclex (
- VOID);
-
-VOID
-LibAmdReadMxcsr (
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteMxcsr (
- IN UINT32 *Value
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f16kb/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Makefile.inc
index 2cee89e..d17c301 100644
--- a/src/vendorcode/amd/agesa/f16kb/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f16kb/Makefile.inc
@@ -97,11 +97,16 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
-libagesa-y =
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
libagesa-y += Legacy/Proc/agesaCallouts.c
libagesa-y += Legacy/Proc/Dispatcher.c
libagesa-y += Legacy/Proc/hobTransfer.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/Common/AmdInitEarly.c
libagesa-y += Proc/Common/AmdInitEnv.c
libagesa-y += Proc/Common/AmdInitLate.c
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Library/IdsLib.c b/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Library/IdsLib.c
index 50306bb..2345e1c 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Library/IdsLib.c
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Library/IdsLib.c
@@ -1013,3 +1013,12 @@ IdsLibDataMaskSet32 (
+VOID
+IdsOutPort (
+ IN UINT32 Addr,
+ IN UINT32 Value,
+ IN UINT32 Flag
+ )
+{
+ __outdword ((UINT16) Addr, Value);
+}
1
0
18 Apr '16
Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14414
-gerrit
commit 217ae2955923be1df9a00ccc5793839943c504e4
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Tue Apr 19 07:17:59 2016 +0300
AGESA vendorcode: Link common amdlib
Having CFLAGS -Os disables -falign-functions. On unlucky builds
this may delay entry to ramstage by 600ms.
Change-Id: Ice6781666a0834f1e8e60a0c93048ac8472f27d9
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
src/mainboard/advansus/a785e-i/Makefile.inc | 4 +-
src/mainboard/asus/m5a88-v/Makefile.inc | 4 +-
src/mainboard/avalue/eax-785e/Makefile.inc | 4 +-
src/vendorcode/amd/agesa/common/amdlib.c | 1275 ++++++++++++++++++++++++++
src/vendorcode/amd/agesa/common/amdlib.h | 404 +++++++++
src/vendorcode/amd/agesa/f10/Lib/amdlib.c | 1259 --------------------------
src/vendorcode/amd/agesa/f10/Lib/amdlib.h | 374 --------
src/vendorcode/amd/agesa/f10/Makefile.inc | 9 +-
src/vendorcode/amd/agesa/f12/Lib/amdlib.c | 1262 --------------------------
src/vendorcode/amd/agesa/f12/Lib/amdlib.h | 406 ---------
src/vendorcode/amd/agesa/f12/Makefile.inc | 10 +-
src/vendorcode/amd/agesa/f14/Lib/amdlib.c | 1262 --------------------------
src/vendorcode/amd/agesa/f14/Lib/amdlib.h | 408 ---------
src/vendorcode/amd/agesa/f14/Makefile.inc | 11 +-
src/vendorcode/amd/agesa/f15/Lib/amdlib.c | 1283 --------------------------
src/vendorcode/amd/agesa/f15/Lib/amdlib.h | 390 --------
src/vendorcode/amd/agesa/f15/Makefile.inc | 8 +-
src/vendorcode/amd/agesa/f15tn/Lib/amdlib.c | 1282 --------------------------
src/vendorcode/amd/agesa/f15tn/Lib/amdlib.h | 358 --------
src/vendorcode/amd/agesa/f15tn/Makefile.inc | 8 +-
src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c | 1289 ---------------------------
src/vendorcode/amd/agesa/f16kb/Lib/amdlib.h | 371 --------
src/vendorcode/amd/agesa/f16kb/Makefile.inc | 9 +-
23 files changed, 1731 insertions(+), 9959 deletions(-)
diff --git a/src/mainboard/advansus/a785e-i/Makefile.inc b/src/mainboard/advansus/a785e-i/Makefile.inc
index 45c257a..7b6a8e6 100644
--- a/src/mainboard/advansus/a785e-i/Makefile.inc
+++ b/src/mainboard/advansus/a785e-i/Makefile.inc
@@ -2,8 +2,8 @@
#SB800 CIMx share AGESA V5 lib code
ifneq ($(CONFIG_CPU_AMD_AGESA),y)
AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
- romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
- ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
+ romstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
+ ramstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
AGESA_INC := -I$(AGESA_ROOT)/ \
-I$(AGESA_ROOT)/../common \
diff --git a/src/mainboard/asus/m5a88-v/Makefile.inc b/src/mainboard/asus/m5a88-v/Makefile.inc
index 45c257a..7b6a8e6 100644
--- a/src/mainboard/asus/m5a88-v/Makefile.inc
+++ b/src/mainboard/asus/m5a88-v/Makefile.inc
@@ -2,8 +2,8 @@
#SB800 CIMx share AGESA V5 lib code
ifneq ($(CONFIG_CPU_AMD_AGESA),y)
AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
- romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
- ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
+ romstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
+ ramstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
AGESA_INC := -I$(AGESA_ROOT)/ \
-I$(AGESA_ROOT)/../common \
diff --git a/src/mainboard/avalue/eax-785e/Makefile.inc b/src/mainboard/avalue/eax-785e/Makefile.inc
index 45c257a..7b6a8e6 100644
--- a/src/mainboard/avalue/eax-785e/Makefile.inc
+++ b/src/mainboard/avalue/eax-785e/Makefile.inc
@@ -2,8 +2,8 @@
#SB800 CIMx share AGESA V5 lib code
ifneq ($(CONFIG_CPU_AMD_AGESA),y)
AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
- romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
- ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
+ romstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
+ ramstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
AGESA_INC := -I$(AGESA_ROOT)/ \
-I$(AGESA_ROOT)/../common \
diff --git a/src/vendorcode/amd/agesa/common/amdlib.c b/src/vendorcode/amd/agesa/common/amdlib.c
new file mode 100644
index 0000000..13cb4fc
--- /dev/null
+++ b/src/vendorcode/amd/agesa/common/amdlib.c
@@ -0,0 +1,1275 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * AMD Library
+ *
+ * Contains interface to the AMD AGESA library
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project: AGESA
+ * @e sub-project: Lib
+ * @e \$Revision: 44325 $ @e \$Date: 2010-12-22 03:29:53 -0700 (Wed, 22 Dec 2010) $
+ *
+ */
+/*
+ *****************************************************************************
+ *
+ * Copyright (c) 2011, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ***************************************************************************
+ *
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ * M O D U L E S U S E D
+ *----------------------------------------------------------------------------------------
+ */
+
+#include "AGESA.h"
+#include "Ids.h"
+#include "cpuRegisters.h"
+#include "amdlib.h"
+#include "Filecode.h"
+CODE_GROUP (G1_PEICC)
+RDATA_GROUP (G1_PEICC)
+
+#define FILECODE LIB_AMDLIB_FILECODE
+
+/*----------------------------------------------------------------------------------------
+ * D E F I N I T I O N S A N D M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ * T Y P E D E F S A N D S T R U C T U R E S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ * P R O T O T Y P E S O F L O C A L F U N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+BOOLEAN
+STATIC
+GetPciMmioAddress (
+ OUT UINT64 *MmioAddress,
+ OUT UINT32 *MmioSize,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+STATIC
+LibAmdGetDataFromPtr (
+ IN ACCESS_WIDTH AccessWidth,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ OUT UINT32 *TemData,
+ OUT UINT32 *TempDataMask
+ );
+
+/*----------------------------------------------------------------------------------------
+ * E X P O R T E D F U N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+UINT8
+ReadIo8 (
+ IN UINT16 Address
+ )
+{
+ return __inbyte (Address);
+}
+UINT16
+ReadIo16 (
+ IN UINT16 Address
+ )
+{
+ return __inword (Address);
+}
+UINT32
+ReadIo32 (
+ IN UINT16 Address
+ )
+{
+ return __indword (Address);
+}
+VOID
+WriteIo8 (
+ IN UINT16 Address,
+ IN UINT8 Data
+ )
+{
+ __outbyte (Address, Data);
+}
+VOID
+WriteIo16 (
+ IN UINT16 Address,
+ IN UINT16 Data
+ )
+{
+ __outword (Address, Data);
+}
+VOID
+WriteIo32 (
+ IN UINT16 Address,
+ IN UINT32 Data
+ )
+{
+ __outdword (Address, Data);
+}
+STATIC
+UINT64 SetFsBase (
+ UINT64 address
+ )
+{
+ UINT64 hwcr;
+ hwcr = __readmsr (0xC0010015);
+ __writemsr (0xC0010015, hwcr | 1 << 17);
+ __writemsr (0xC0000100, address);
+ return hwcr;
+}
+STATIC
+VOID
+RestoreHwcr (
+ UINT64
+ value
+ )
+{
+ __writemsr (0xC0010015, value);
+}
+UINT8
+Read64Mem8 (
+ IN UINT64 Address
+ )
+{
+ UINT8 dataRead;
+ UINT64 hwcrSave;
+ if ((Address >> 32) == 0) {
+ return *(volatile UINT8 *) (UINTN) Address;
+ }
+ hwcrSave = SetFsBase (Address);
+ dataRead = __readfsbyte (0);
+ RestoreHwcr (hwcrSave);
+ return dataRead;
+}
+UINT16
+Read64Mem16 (
+ IN UINT64 Address
+ )
+{
+ UINT16 dataRead;
+ UINT64 hwcrSave;
+ if ((Address >> 32) == 0) {
+ return *(volatile UINT16 *) (UINTN) Address;
+ }
+ hwcrSave = SetFsBase (Address);
+ dataRead = __readfsword (0);
+ RestoreHwcr (hwcrSave);
+ return dataRead;
+}
+UINT32
+Read64Mem32 (
+ IN UINT64 Address
+ )
+{
+ UINT32 dataRead;
+ UINT64 hwcrSave;
+ if ((Address >> 32) == 0) {
+ return *(volatile UINT32 *) (UINTN) Address;
+ }
+ hwcrSave = SetFsBase (Address);
+ dataRead = __readfsdword (0);
+ RestoreHwcr (hwcrSave);
+ return dataRead;
+ }
+VOID
+Write64Mem8 (
+ IN UINT64 Address,
+ IN UINT8 Data
+ )
+{
+ if ((Address >> 32) == 0){
+ *(volatile UINT8 *) (UINTN) Address = Data;
+ }
+ else {
+ UINT64 hwcrSave;
+ hwcrSave = SetFsBase (Address);
+ __writefsbyte (0, Data);
+ RestoreHwcr (hwcrSave);
+ }
+}
+VOID
+Write64Mem16 (
+ IN UINT64 Address,
+ IN UINT16 Data
+ )
+{
+ if ((Address >> 32) == 0){
+ *(volatile UINT16 *) (UINTN) Address = Data;
+ }
+ else {
+ UINT64 hwcrSave;
+ hwcrSave = SetFsBase (Address);
+ __writefsword (0, Data);
+ RestoreHwcr (hwcrSave);
+ }
+}
+VOID
+Write64Mem32 (
+ IN UINT64 Address,
+ IN UINT32 Data
+ )
+{
+ if ((Address >> 32) == 0){
+ *(volatile UINT32 *) (UINTN) Address = Data;
+ }
+ else {
+ UINT64 hwcrSave;
+ hwcrSave = SetFsBase (Address);
+ __writefsdword (0, Data);
+ RestoreHwcr (hwcrSave);
+ }
+}
+VOID
+LibAmdReadCpuReg (
+ IN UINT8 RegNum,
+ OUT UINT32 *Value
+ )
+{
+ *Value = 0;
+ switch (RegNum){
+ case CR4_REG:
+ *Value = __readcr4 ();
+ break;
+ case DR0_REG:
+ *Value = __readdr (0);
+ break;
+ case DR1_REG:
+ *Value = __readdr (1);
+ break;
+ case DR2_REG:
+ *Value = __readdr (2);
+ break;
+ case DR3_REG:
+ *Value = __readdr (3);
+ break;
+ case DR7_REG:
+ *Value = __readdr (7);
+ break;
+ default:
+ *Value = -1;
+ break;
+ }
+}
+VOID
+LibAmdWriteCpuReg (
+ IN UINT8 RegNum,
+ IN UINT32 Value
+ )
+{
+ switch (RegNum){
+ case CR4_REG:
+ __writecr4 (Value);
+ break;
+ case DR0_REG:
+ __writedr (0, Value);
+ break;
+ case DR1_REG:
+ __writedr (1, Value);
+ break;
+ case DR2_REG:
+ __writedr (2, Value);
+ break;
+ case DR3_REG:
+ __writedr (3, Value);
+ break;
+ case DR7_REG:
+ __writedr (7, Value);
+ break;
+ default:
+ break;
+ }
+}
+VOID
+LibAmdWriteBackInvalidateCache (
+ IN VOID
+ )
+{
+ __wbinvd ();
+}
+VOID
+LibAmdHDTBreakPoint (
+ VOID
+ )
+{
+ __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
+ __debugbreak (); // do you really need icebp? If so, go back to asm code
+}
+UINT8
+LibAmdBitScanForward (
+ IN UINT32 value
+ )
+{
+ UINTN Index;
+ for (Index = 0; Index < 32; Index++){
+ if (value & (1 << Index)) break;
+ }
+ return (UINT8) Index;
+}
+
+UINT8
+LibAmdBitScanReverse (
+ IN UINT32 value
+)
+{
+ uint8_t bit = 31;
+ do {
+ if (value & (1 << 31))
+ return bit;
+
+ value <<= 1;
+ bit--;
+
+ } while (value != 0);
+
+ return 0xFF; /* Error code indicating no bit found */
+}
+
+VOID
+LibAmdMsrRead (
+ IN UINT32 MsrAddress,
+ OUT UINT64 *Value,
+ IN OUT AMD_CONFIG_PARAMS *ConfigPtr
+ )
+{
+ *Value = __readmsr (MsrAddress);
+}
+VOID
+LibAmdMsrWrite (
+ IN UINT32 MsrAddress,
+ IN UINT64 *Value,
+ IN OUT AMD_CONFIG_PARAMS *ConfigPtr
+ )
+{
+ __writemsr (MsrAddress, *Value);
+}
+void LibAmdCpuidRead (
+ IN UINT32 CpuidFcnAddress,
+ OUT CPUID_DATA* Value,
+ IN OUT AMD_CONFIG_PARAMS *ConfigPtr
+ )
+{
+ __cpuid ((int *)Value, CpuidFcnAddress);
+}
+UINT64
+ReadTSC (
+ VOID
+ )
+{
+ return __rdtsc ();
+}
+VOID
+LibAmdSimNowEnterDebugger (
+ VOID
+ )
+{
+ STATIC CONST UINT8 opcode [] = {0x60, // pushad
+ 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
+ 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
+ 0x0F, 0xA2, // cpuid
+ 0x61, // popad
+ 0xC3 // ret
+ };
+ ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
+}
+
+#ifdef __SSE3__
+VOID F10RevDProbeFilterCritical (
+ IN PCI_ADDR PciAddress,
+ IN UINT32 PciRegister
+ )
+{
+ UINT64 msrsave;
+ msrsave = __readmsr (0xC001001F);
+ __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
+ _mm_mfence ();
+ __outdword (0xCF8, PciAddress.AddressValue);
+ _mm_mfence ();
+ __outdword (0xCFC, PciRegister | 2);
+ _mm_mfence ();
+ __writemsr (0xC001001F, msrsave);
+}
+
+VOID
+LibAmdCLFlush (
+ IN UINT64 Address,
+ IN UINT8 Count
+ )
+{
+ UINT64 hwcrSave;
+ UINT8 *address32;
+ UINTN Index;
+ address32 = 0;
+ hwcrSave = SetFsBase (Address);
+ for (Index = 0; Index < Count; Index++){
+ _mm_mfence ();
+ _mm_clflush_fs (&address32 [Index * 64]);
+ }
+ RestoreHwcr (hwcrSave);
+}
+#endif //__SSE3__
+
+VOID
+IdsOutPort (
+ IN UINT32 Addr,
+ IN UINT32 Value,
+ IN UINT32 Flag
+ )
+{
+ __outdword ((UINT16) Addr, Value);
+}
+VOID
+StopHere (
+ VOID
+ )
+{
+ VOLATILE UINTN x = 1;
+ while (x);
+}
+
+VOID
+LibAmdFinit()
+{
+ /* TODO: finit */
+ __asm__ volatile ("finit");
+}
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Read IO port
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] IoAddress IO port address
+ * @param[in] Value Pointer to save data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdIoRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ *(UINT8 *) Value = ReadIo8 (IoAddress);
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ *(UINT16 *) Value = ReadIo16 (IoAddress);
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ *(UINT32 *) Value = ReadIo32 (IoAddress);
+ break;
+ default:
+ ASSERT (FALSE);
+ break;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Write IO port
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] IoAddress IO port address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdIoWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ WriteIo8 (IoAddress, *(UINT8 *) Value);
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ WriteIo16 (IoAddress, *(UINT16 *) Value);
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ WriteIo32 (IoAddress, *(UINT32 *) Value);
+ break;
+ default:
+ ASSERT (FALSE);
+ break;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * IO read modify write
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] IoAddress IO address
+ * @param[in] Data OR data
+ * @param[in] DataMask Mask to be used before data write back to register.
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdIoRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value = 0;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
+ Value = (Value & (~TempMask)) | TempData;
+ LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Poll IO register
+ *
+ * Poll register until (RegisterValue & DataMask) == Data
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] IoAddress IO address
+ * @param[in] Data Data to compare
+ * @param[in] DataMask And mask
+ * @param[in] Delay Poll for time in 100ns (not supported)
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdIoPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ do {
+ LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
+ } while (TempData != (Value & TempMask));
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Read memory/MMIO
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] MemAddress Memory address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdMemRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ *(UINT8 *) Value = Read64Mem8 (MemAddress);
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ *(UINT16 *) Value = Read64Mem16 (MemAddress);
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ *(UINT32 *) Value = Read64Mem32 (MemAddress);
+ break;
+ default:
+ ASSERT (FALSE);
+ break;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Write memory/MMIO
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] MemAddress Memory address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdMemWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ Write64Mem8 (MemAddress, *((UINT8 *) Value));
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ Write64Mem16 (MemAddress, *((UINT16 *) Value));
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ Write64Mem32 (MemAddress, *((UINT32 *) Value));
+ break;
+ default:
+ ASSERT (FALSE);
+ break;
+ }
+}
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Memory/MMIO read modify write
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] MemAddress Memory address
+ * @param[in] Data OR data
+ * @param[in] DataMask Mask to be used before data write back to register.
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdMemRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
+ Value = (Value & (~TempMask)) | TempData;
+ LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Poll Mmio
+ *
+ * Poll register until (RegisterValue & DataMask) == Data
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] MemAddress Memory address
+ * @param[in] Data Data to compare
+ * @param[in] DataMask AND mask
+ * @param[in] Delay Poll for time in 100ns (not supported)
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdMemPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ do {
+ LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
+ } while (TempData != (Value & TempMask));
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Read PCI config space
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] PciAddress Pci address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdPciRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 LegacyPciAccess;
+ UINT32 MMIOSize;
+ UINT64 RMWrite;
+ UINT64 RMWritePrevious;
+ UINT64 MMIOAddress;
+
+ ASSERT (StdHeader != NULL);
+ ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
+ if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
+ // We need to convert our "portable" PCI address into a "real" PCI access
+ LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
+ if (PciAddress.Address.Register <= 0xFF) {
+ LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
+ LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
+ } else {
+ LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
+ RMWrite = RMWritePrevious | 0x0000400000000000ull;
+ LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
+ LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
+ LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
+ LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
+ }
+ } else {
+ // Setup the MMIO address
+ ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
+ MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
+ LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Write PCI config space
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] PciAddress Pci address
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdPciWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 LegacyPciAccess;
+ UINT32 MMIOSize;
+ UINT64 RMWrite;
+ UINT64 RMWritePrevious;
+ UINT64 MMIOAddress;
+
+ ASSERT (StdHeader != NULL);
+ ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
+ if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
+ // We need to convert our "portable" PCI address into a "real" PCI access
+ LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
+ if (PciAddress.Address.Register <= 0xFF) {
+ LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
+ LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
+ } else {
+ LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
+ RMWrite = RMWritePrevious | 0x0000400000000000ull;
+ LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
+ LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
+ LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
+ LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
+ }
+ } else {
+ // Setup the MMIO address
+ ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
+ MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
+ LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * PCI read modify write
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] PciAddress Pci address
+ * @param[in] Data OR Data
+ * @param[in] DataMask Mask to be used before data write back to register.
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdPciRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
+ Value = (Value & (~TempMask)) | TempData;
+ LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Poll PCI config space register
+ *
+ * Poll register until (RegisterValue & DataMask) == Data
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] PciAddress Pci address
+ * @param[in] Data Data to compare
+ * @param[in] DataMask AND mask
+ * @param[in] Delay Poll for time in 100ns (not supported)
+ * @param[in] StdHeader Standard configuration header
+ *
+ */
+VOID
+LibAmdPciPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 TempData = 0;
+ UINT32 TempMask = 0;
+ UINT32 Value;
+ LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
+ do {
+ LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
+ } while (TempData != (Value & TempMask));
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Get MMIO base address for PCI accesses
+ *
+ * @param[out] MmioAddress PCI MMIO base address
+ * @param[out] MmioSize Size of region in bytes
+ * @param[in] StdHeader Standard configuration header
+ *
+ * @retval TRUE MmioAddress/MmioSize are valid
+ */
+BOOLEAN
+STATIC
+GetPciMmioAddress (
+ OUT UINT64 *MmioAddress,
+ OUT UINT32 *MmioSize,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ BOOLEAN MmioIsEnabled;
+ UINT32 EncodedSize;
+ UINT64 MsrReg;
+
+ ASSERT (StdHeader != NULL);
+
+ MmioIsEnabled = FALSE;
+ LibAmdMsrRead (MSR_MMIO_Cfg_Base, &MsrReg, StdHeader);
+ if ((MsrReg & BIT0) != 0) {
+ *MmioAddress = MsrReg & 0xFFFFFFFFFFF00000ull;
+ EncodedSize = (UINT32) ((MsrReg & 0x3C) >> 2);
+ *MmioSize = ((1 << EncodedSize) * 0x100000);
+ MmioIsEnabled = TRUE;
+ }
+ return MmioIsEnabled;
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Read field of PCI config register.
+ *
+ *
+ *
+ * @param[in] Address Pci address (register must be DWORD aligned)
+ * @param[in] Highbit High bit position of the field in DWORD
+ * @param[in] Lowbit Low bit position of the field in DWORD
+ * @param[out] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ */
+VOID
+LibAmdPciReadBits (
+ IN PCI_ADDR Address,
+ IN UINT8 Highbit,
+ IN UINT8 Lowbit,
+ OUT UINT32 *Value,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
+
+ LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
+ *Value >>= Lowbit; // Shift
+
+ // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
+
+ if ((Highbit - Lowbit) != 31) {
+ *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Write field of PCI config register.
+ *
+ *
+ *
+ * @param[in] Address Pci address (register must be DWORD aligned)
+ * @param[in] Highbit High bit position of the field in DWORD
+ * @param[in] Lowbit Low bit position of the field in DWORD
+ * @param[in] Value Pointer to data
+ * @param[in] StdHeader Standard configuration header
+ */
+VOID
+LibAmdPciWriteBits (
+ IN PCI_ADDR Address,
+ IN UINT8 Highbit,
+ IN UINT8 Lowbit,
+ IN CONST UINT32 *Value,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 Temp;
+ UINT32 Mask;
+
+ ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
+
+ // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
+
+ if ((Highbit - Lowbit) != 31) {
+ Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
+ } else {
+ Mask = (UINT32) 0xFFFFFFFF;
+ }
+
+ LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
+ Temp &= ~(Mask << Lowbit);
+ Temp |= (*Value & Mask) << Lowbit;
+ LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Locate next capability pointer
+ *
+ * Given a SBDFO this routine will find the next PCI capabilities list entry.
+ * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
+ * returned.
+ * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
+ *
+ * @param[in,out] Address Pci address
+ * @param[in] StdHeader Standard configuration header
+ */
+
+VOID
+LibAmdPciFindNextCap (
+ IN OUT PCI_ADDR *Address,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ PCI_ADDR Base;
+ UINT32 Offset;
+ UINT32 Temp;
+ PCI_ADDR TempAddress;
+
+ ASSERT (Address != NULL);
+ ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
+
+ Base.AddressValue = Address->AddressValue;
+ Offset = Base.Address.Register;
+ Base.Address.Register = 0;
+
+ Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
+
+ // Verify that the SBDFO points to a valid PCI device SANITY CHECK
+ LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
+ if (Temp == 0xFFFFFFFF) {
+ ASSERT (FALSE);
+ return; // There is no device at this address
+ }
+
+ // Verify that the device supports a capability list
+ TempAddress.AddressValue = Base.AddressValue + 0x04;
+ LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
+ if (Temp == 0) {
+ return; // This PCI device does not support capability lists
+ }
+
+ if (Offset != 0) {
+ // If we are continuing on an existing list
+ TempAddress.AddressValue = Base.AddressValue + Offset;
+ LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
+ } else {
+ // We are starting on a new list
+ TempAddress.AddressValue = Base.AddressValue + 0x34;
+ LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
+ }
+
+ if (Temp == 0) {
+ return; // We have reached the end of the capabilities list
+ }
+
+ // Error detection and recovery- The statement below protects against
+ // PCI devices with broken PCI capabilities lists. Detect a pointer
+ // that is not uint32 aligned, points into the first 64 reserved DWORDs
+ // or points back to itself.
+ if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
+ ASSERT (FALSE);
+ return;
+ }
+
+ Address->AddressValue = Base.AddressValue + Temp;
+ return;
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Set memory with value
+ *
+ *
+ * @param[in,out] Destination Pointer to memory range
+ * @param[in] Value Value to set memory with
+ * @param[in] FillLength Size of the memory range
+ * @param[in] StdHeader Standard configuration header (Optional)
+ */
+VOID
+LibAmdMemFill (
+ IN VOID *Destination,
+ IN UINT8 Value,
+ IN UINTN FillLength,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT8 *Dest;
+ ASSERT (StdHeader != NULL);
+ Dest = Destination;
+ while ((FillLength--) != 0) {
+ *Dest++ = Value;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Copy memory
+ *
+ *
+ * @param[in,out] Destination Pointer to destination buffer
+ * @param[in] Source Pointer to source buffer
+ * @param[in] CopyLength buffer length
+ * @param[in] StdHeader Standard configuration header (Optional)
+ */
+VOID
+LibAmdMemCopy (
+ IN VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN CopyLength,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT8 *Dest;
+ CONST UINT8 *SourcePtr;
+ ASSERT (StdHeader != NULL);
+ Dest = Destination;
+ SourcePtr = Source;
+ while ((CopyLength--) != 0) {
+ *Dest++ = *SourcePtr++;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Returns the package type mask for the processor
+ *
+ *
+ * @param[in] StdHeader Standard configuration header (Optional)
+ */
+
+// Returns the package type mask for the processor
+UINT32
+LibAmdGetPackageType (
+ IN AMD_CONFIG_PARAMS *StdHeader
+ )
+{
+ UINT32 ProcessorPackageType;
+ CPUID_DATA CpuId;
+
+ LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
+ ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
+ return (UINT32) (1 << ProcessorPackageType);
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Returns the package type mask for the processor
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @param[in] Data data
+ * @param[in] DataMask data
+ * @param[out] TemData typecast data
+ * @param[out] TempDataMask typecast data
+ */
+
+
+VOID
+STATIC
+LibAmdGetDataFromPtr (
+ IN ACCESS_WIDTH AccessWidth,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ OUT UINT32 *TemData,
+ OUT UINT32 *TempDataMask
+ )
+{
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ *TemData = (UINT32)*(UINT8 *) Data;
+ *TempDataMask = (UINT32)*(UINT8 *) DataMask;
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ *TemData = (UINT32)*(UINT16 *) Data;
+ *TempDataMask = (UINT32)*(UINT16 *) DataMask;
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ *TemData = *(UINT32 *) Data;
+ *TempDataMask = *(UINT32 *) DataMask;
+ break;
+ default:
+ IDS_ERROR_TRAP;
+ break;
+ }
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Returns the package type mask for the processor
+ *
+ *
+ * @param[in] AccessWidth Access width
+ * @retval Width in number of bytes
+ */
+
+
+UINT8
+LibAmdAccessWidth (
+ IN ACCESS_WIDTH AccessWidth
+ )
+{
+ UINT8 Width;
+
+ switch (AccessWidth) {
+ case AccessWidth8:
+ case AccessS3SaveWidth8:
+ Width = 1;
+ break;
+ case AccessWidth16:
+ case AccessS3SaveWidth16:
+ Width = 2;
+ break;
+ case AccessWidth32:
+ case AccessS3SaveWidth32:
+ Width = 4;
+ break;
+ case AccessWidth64:
+ case AccessS3SaveWidth64:
+ Width = 8;
+ break;
+ default:
+ Width = 0;
+ IDS_ERROR_TRAP;
+ break;
+ }
+ return Width;
+}
+
+VOID
+CpuidRead (
+ IN UINT32 CpuidFcnAddress,
+ OUT CPUID_DATA *Value
+ )
+{
+ __cpuid ((int *)Value, CpuidFcnAddress);
+}
+
+UINT8
+ReadNumberOfCpuCores(
+ VOID
+ )
+{
+ CPUID_DATA Value;
+ CpuidRead (0x80000008, &Value);
+ return Value.ECX_Reg & 0xff;
+}
diff --git a/src/vendorcode/amd/agesa/common/amdlib.h b/src/vendorcode/amd/agesa/common/amdlib.h
new file mode 100644
index 0000000..be6e4c4
--- /dev/null
+++ b/src/vendorcode/amd/agesa/common/amdlib.h
@@ -0,0 +1,404 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * AMD Library
+ *
+ * Contains interface to the AMD AGESA library
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project: AGESA
+ * @e sub-project: Lib
+ * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
+ *
+ */
+/*
+ *****************************************************************************
+ *
+ * Copyright (c) 2011, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ***************************************************************************
+ *
+ */
+
+#ifndef _AMD_LIB_H_
+#define _AMD_LIB_H_
+
+/*----------------------------------------------------------------------------------------
+ * D E F I N I T I O N S A N D M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+#define IOCF8 0xCF8
+#define IOCFC 0xCFC
+
+// Reg Values for ReadCpuReg and WriteCpuReg
+#define CR0_REG 0x00
+#define CR4_REG 0x04
+#define DR0_REG 0x10
+#define DR1_REG 0x11
+#define DR2_REG 0x12
+#define DR3_REG 0x13
+#define DR7_REG 0x17
+
+UINT8
+ReadIo8 (
+ IN UINT16 Address
+ );
+
+UINT16
+ReadIo16 (
+ IN UINT16 Address
+ );
+
+UINT32
+ReadIo32 (
+ IN UINT16 Address
+ );
+
+VOID
+WriteIo8 (
+ IN UINT16 Address,
+ IN UINT8 Data
+ );
+
+VOID
+WriteIo16 (
+ IN UINT16 Address,
+ IN UINT16 Data
+ );
+
+VOID
+WriteIo32 (
+ IN UINT16 Address,
+ IN UINT32 Data
+ );
+
+UINT8
+Read64Mem8 (
+ IN UINT64 Address
+ );
+
+UINT16
+Read64Mem16 (
+ IN UINT64 Address
+ );
+
+UINT32
+Read64Mem32 (
+ IN UINT64 Address
+ );
+
+VOID
+Write64Mem8 (
+ IN UINT64 Address,
+ IN UINT8 Data
+ );
+
+VOID
+Write64Mem16 (
+ IN UINT64 Address,
+ IN UINT16 Data
+ );
+
+VOID
+Write64Mem32 (
+ IN UINT64 Address,
+ IN UINT32 Data
+ );
+
+UINT64
+ReadTSC (
+ VOID
+ );
+
+// MSR
+VOID
+LibAmdMsrRead (
+ IN UINT32 MsrAddress,
+ OUT UINT64 *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMsrWrite (
+ IN UINT32 MsrAddress,
+ IN UINT64 *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// IO
+VOID
+LibAmdIoRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdIoWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdIoRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdIoPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT16 IoAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// Memory or MMIO
+VOID
+LibAmdMemRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMemWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMemRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMemPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN UINT64 MemAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// PCI
+VOID
+LibAmdPciRead (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ OUT VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciWrite (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciRMW (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciPoll (
+ IN ACCESS_WIDTH AccessWidth,
+ IN PCI_ADDR PciAddress,
+ IN CONST VOID *Data,
+ IN CONST VOID *DataMask,
+ IN UINT64 Delay,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciReadBits (
+ IN PCI_ADDR Address,
+ IN UINT8 Highbit,
+ IN UINT8 Lowbit,
+ OUT UINT32 *Value,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciWriteBits (
+ IN PCI_ADDR Address,
+ IN UINT8 Highbit,
+ IN UINT8 Lowbit,
+ IN CONST UINT32 *Value,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdPciFindNextCap (
+ IN OUT PCI_ADDR *Address,
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// CPUID
+VOID
+LibAmdCpuidRead (
+ IN UINT32 CpuidFcnAddress,
+ OUT CPUID_DATA *Value,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+// Utility Functions
+VOID
+LibAmdMemFill (
+ IN VOID *Destination,
+ IN UINT8 Value,
+ IN UINTN FillLength,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+VOID
+LibAmdMemCopy (
+ IN VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN CopyLength,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+UINT32
+LibAmdGetPackageType (
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+UINT8
+LibAmdBitScanReverse (
+ IN UINT32 value
+ );
+UINT8
+LibAmdBitScanForward (
+ IN UINT32 value
+ );
+
+VOID
+LibAmdReadCpuReg (
+ IN UINT8 RegNum,
+ OUT UINT32 *Value
+ );
+VOID
+LibAmdWriteCpuReg (
+ IN UINT8 RegNum,
+ IN UINT32 Value
+ );
+
+VOID
+LibAmdWriteBackInvalidateCache (
+ IN VOID
+ );
+
+VOID
+LibAmdSimNowEnterDebugger (VOID);
+
+VOID
+LibAmdHDTBreakPoint (VOID);
+
+UINT8
+LibAmdAccessWidth (
+ IN ACCESS_WIDTH AccessWidth
+ );
+
+VOID
+LibAmdCLFlush (
+ IN UINT64 Address,
+ IN UINT8 Count
+ );
+
+VOID F10RevDProbeFilterCritical (
+ IN PCI_ADDR PciAddress,
+ IN UINT32 PciRegister
+ );
+VOID
+IdsOutPort (
+ IN UINT32 Addr,
+ IN UINT32 Value,
+ IN UINT32 Flag
+ );
+
+VOID
+LibAmdFinit (
+ VOID
+ );
+
+VOID
+StopHere (
+ VOID
+ );
+
+/* For f14 or older. */
+VOID
+CpuidRead (
+ IN UINT32 CpuidFcnAddress,
+ OUT CPUID_DATA *Value
+ );
+
+UINT8
+ReadNumberOfCpuCores(
+ VOID
+ );
+
+/* From 16kb, no implementation supplied. */
+VOID
+LibAmdFnclex (
+ VOID);
+
+VOID
+LibAmdReadMxcsr (
+ OUT UINT32 *Value
+ );
+VOID
+LibAmdWriteMxcsr (
+ IN UINT32 *Value
+ );
+
+
+#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f10/Lib/amdlib.c b/src/vendorcode/amd/agesa/f10/Lib/amdlib.c
deleted file mode 100644
index 1076572..0000000
--- a/src/vendorcode/amd/agesa/f10/Lib/amdlib.c
+++ /dev/null
@@ -1,1259 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN VOID *Data,
- IN VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- ;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-
-#ifdef __SSE3__
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-#endif //__SSE3__
-
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 MsrReg;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &MsrReg, StdHeader);
- if ((MsrReg & BIT0) != 0) {
- *MmioAddress = MsrReg & 0xFFFFFFFFFFF00000ull;
- EncodedSize = (UINT32) ((MsrReg & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN VOID *Data,
- IN VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f10/Lib/amdlib.h b/src/vendorcode/amd/agesa/f10/Lib/amdlib.h
deleted file mode 100644
index 367db91..0000000
--- a/src/vendorcode/amd/agesa/f10/Lib/amdlib.h
+++ /dev/null
@@ -1,374 +0,0 @@
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-// PROTOTYPES FOR amdlib32.asm
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (VOID);
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-#ifdef __SSE3__
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- );
-
-VOID LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-#endif
-
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID StopHere(VOID);
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f10/Makefile.inc b/src/vendorcode/amd/agesa/f10/Makefile.inc
index 1109c08..8c6b43a 100644
--- a/src/vendorcode/amd/agesa/f10/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f10/Makefile.inc
@@ -59,6 +59,14 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
+
#libagesa-y += Proc/CPU/Family/0x10/F10IoCstate.c
#libagesa-y += Proc/CPU/Feature/cpuIoCstate.c
#libagesa-y += Proc/Mem/NB/ON/mnprotoon.c
@@ -106,7 +114,6 @@ libagesa-y += Proc/Common/AmdS3LateRestore.c
libagesa-y += Proc/CPU/Table.c
libagesa-y += Proc/HT/htInterface.c
libagesa-y += Proc/IDS/Perf/IdsPerf.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/CPU/Feature/cpuCacheFlushOnHalt.c
libagesa-y += Proc/Mem/Main/minit.c
libagesa-y += Proc/Mem/Feat/INTLVRN/mfintlvrn.c
diff --git a/src/vendorcode/amd/agesa/f12/Lib/amdlib.c b/src/vendorcode/amd/agesa/f12/Lib/amdlib.c
deleted file mode 100644
index ec85f78..0000000
--- a/src/vendorcode/amd/agesa/f12/Lib/amdlib.c
+++ /dev/null
@@ -1,1262 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 48409 $ @e \$Date: 2011-03-09 01:19:40 +0800 (Wed, 09 Mar 2011) $
- *
- */
-/*
- *****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***************************************************************************
- *
- */
-
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- ;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- IDS_HDT_CONSOLE (LIB_PCI_RD, "~PCI RD %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- IDS_HDT_CONSOLE (LIB_PCI_RD, "~MMIO RD %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- IDS_HDT_CONSOLE (LIB_PCI_WR, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- IDS_HDT_CONSOLE (LIB_PCI_WR, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 LocalMsrRegister;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &LocalMsrRegister, StdHeader);
- if ((LocalMsrRegister & BIT0) != 0) {
- *MmioAddress = LocalMsrRegister & 0xFFFFFFFFFFF00000ull;
- EncodedSize = (UINT32) ((LocalMsrRegister & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- CONST UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f12/Lib/amdlib.h b/src/vendorcode/amd/agesa/f12/Lib/amdlib.h
deleted file mode 100644
index 702cde8..0000000
--- a/src/vendorcode/amd/agesa/f12/Lib/amdlib.h
+++ /dev/null
@@ -1,406 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR0_REG 0x00
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-#if !defined __GNUC__
-// PROTOTYPES FOR amdlib32.asm
-void _mm_stream_si128_fs (void *__A, void *__B);
-void _mm_store_si128_fs (void *dest, void *data);
-void _mm_clflush_fs (void *address32);
-#endif
-/*---------------------------------------------------------------------------------------
- * L O C A L F U N C T I O N S
- *---------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID
- );
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-StopHere (
- VOID
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc
index 30efd4c..92b28d7 100644
--- a/src/vendorcode/amd/agesa/f12/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f12/Makefile.inc
@@ -96,10 +96,16 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
-libagesa-y = Legacy/Proc/agesaCallouts.c
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
+libagesa-y += Legacy/Proc/agesaCallouts.c
libagesa-y += Legacy/Proc/Dispatcher.c
libagesa-y += Legacy/Proc/hobTransfer.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/Common/AmdInitEarly.c
libagesa-y += Proc/Common/AmdInitEnv.c
libagesa-y += Proc/Common/AmdInitLate.c
diff --git a/src/vendorcode/amd/agesa/f14/Lib/amdlib.c b/src/vendorcode/amd/agesa/f14/Lib/amdlib.c
deleted file mode 100644
index b28878b..0000000
--- a/src/vendorcode/amd/agesa/f14/Lib/amdlib.c
+++ /dev/null
@@ -1,1262 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44325 $ @e \$Date: 2010-12-22 03:29:53 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- *****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***************************************************************************
- *
- */
-
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- ;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-
-#ifdef __SSE3__
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-#endif //__SSE3__
-
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000ull;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 MsrReg;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &MsrReg, StdHeader);
- if ((MsrReg & BIT0) != 0) {
- *MmioAddress = MsrReg & 0xFFFFFFFFFFF00000ull;
- EncodedSize = (UINT32) ((MsrReg & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- CONST UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f14/Lib/amdlib.h b/src/vendorcode/amd/agesa/f14/Lib/amdlib.h
deleted file mode 100644
index 25f19a3..0000000
--- a/src/vendorcode/amd/agesa/f14/Lib/amdlib.h
+++ /dev/null
@@ -1,408 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
- *
- */
-/*
- *****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***************************************************************************
- *
- */
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR0_REG 0x00
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-#if !defined __GNUC__
-// PROTOTYPES FOR amdlib32.asm
-void _mm_stream_si128_fs (void *__A, void *__B);
-void _mm_store_si128_fs (void *dest, void *data);
-void _mm_clflush_fs (void *address32);
-#endif
-/*---------------------------------------------------------------------------------------
- * L O C A L F U N C T I O N S
- *---------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID
- );
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-StopHere (
- VOID
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f14/Makefile.inc b/src/vendorcode/amd/agesa/f14/Makefile.inc
index a5f7561..a51c013 100644
--- a/src/vendorcode/amd/agesa/f14/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f14/Makefile.inc
@@ -80,7 +80,15 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
-libagesa-y = Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
+
+libagesa-y += Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c
libagesa-y += Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c
libagesa-y += Proc/GNB/Nb/Family/0x14/F14NbLclkDpm.c
libagesa-y += Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c
@@ -198,7 +206,6 @@ libagesa-y += Proc/CPU/Family/0x14/cpuF14Utilities.c
libagesa-y += Proc/HT/htInterface.c
libagesa-y += Proc/GNB/Gfx/GfxStrapsInit.c
libagesa-y += Proc/GNB/Nb/NbInitAtEarly.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/CPU/Feature/cpuCacheFlushOnHalt.c
libagesa-y += Proc/CPU/Feature/cpuCpb.c
libagesa-y += Proc/Mem/Main/minit.c
diff --git a/src/vendorcode/amd/agesa/f15/Lib/amdlib.c b/src/vendorcode/amd/agesa/f15/Lib/amdlib.c
deleted file mode 100644
index cbb8419..0000000
--- a/src/vendorcode/amd/agesa/f15/Lib/amdlib.c
+++ /dev/null
@@ -1,1283 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 56279 $ @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G2_PEI)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN VOID *Data,
- IN VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- break;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- break;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-UINT64
-MsrRead (
- IN UINT32 MsrAddress
- )
-{
- return __readmsr (MsrAddress);
-}
-
-VOID
-MsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 Value
- )
-{
- __writemsr (MsrAddress, Value);
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- IDS_HDT_CONSOLE (LIB_PCI_RD, "~PCI RD %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- IDS_HDT_CONSOLE (LIB_PCI_RD, "~MMIO RD %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- IDS_HDT_CONSOLE (LIB_PCI_WR, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- IDS_HDT_CONSOLE (LIB_PCI_WR, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 LocalMsrRegister;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &LocalMsrRegister, StdHeader);
- if ((LocalMsrRegister & BIT0) != 0) {
- *MmioAddress = LocalMsrRegister & 0xFFFFFFFFFFF00000;
- EncodedSize = (UINT32) ((LocalMsrRegister & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN VOID *Data,
- IN VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- break;
- }
- return Width;
-}
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f15/Lib/amdlib.h b/src/vendorcode/amd/agesa/f15/Lib/amdlib.h
deleted file mode 100644
index f7a747c..0000000
--- a/src/vendorcode/amd/agesa/f15/Lib/amdlib.h
+++ /dev/null
@@ -1,390 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 02:16:51 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-// PROTOTYPES FOR amdlib32.asm
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID
- );
-
-// MSR
-
-UINT64
-MsrRead (
- IN UINT32 MsrAddress
- );
-
-VOID
-MsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 Value
- );
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN VOID *Data,
- IN VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-StopHere (
- VOID
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc
index b7bc898..e92308e 100644
--- a/src/vendorcode/amd/agesa/f15/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f15/Makefile.inc
@@ -72,10 +72,16 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
libagesa-y += Legacy/Proc/agesaCallouts.c
libagesa-y += Legacy/Proc/Dispatcher.c
libagesa-y += Legacy/Proc/hobTransfer.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/Common/AmdInitEarly.c
libagesa-y += Proc/Common/AmdInitEnv.c
libagesa-y += Proc/Common/AmdInitLate.c
diff --git a/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.c b/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.c
deleted file mode 100644
index 3008db2..0000000
--- a/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.c
+++ /dev/null
@@ -1,1282 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 48409 $ @e \$Date: 2011-03-08 11:19:40 -0600 (Tue, 08 Mar 2011) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- ;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-#if 0
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-#endif
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-
-VOID
-LibAmdFinit()
-{
- /* TODO: finit */
- __asm__ volatile ("finit");
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- //IDS_HDT_CONSOLE (LIB_PCI_RD, "~PCI RD %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- //IDS_HDT_CONSOLE (LIB_PCI_RD, "~MMIO RD %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- //IDS_HDT_CONSOLE (LIB_PCI_WR, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "LibAmdPciWrite\n");
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- //IDS_HDT_CONSOLE (LIB_PCI_WR, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "LibAmdPciWrite mmio\n");
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 LocalMsrRegister;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &LocalMsrRegister, StdHeader);
- if ((LocalMsrRegister & BIT0) != 0) {
- *MmioAddress = LocalMsrRegister & 0xFFFFFFFFFFF00000;
- EncodedSize = (UINT32) ((LocalMsrRegister & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- CONST UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.h b/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.h
deleted file mode 100644
index ea15c7b..0000000
--- a/src/vendorcode/amd/agesa/f15tn/Lib/amdlib.h
+++ /dev/null
@@ -1,358 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-// PROTOTYPES FOR amdlib32.asm
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID);
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID
-LibAmdFinit (
- VOID);
-
-VOID
-StopHere (
- VOID
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc
index 986fbc5..6434637 100644
--- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc
@@ -93,10 +93,16 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
libagesa-y += Legacy/Proc/Dispatcher.c
libagesa-y += Legacy/Proc/agesaCallouts.c
libagesa-y += Legacy/Proc/hobTransfer.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/CPU/Family/0x15/TN/F15TnC6State.c
libagesa-y += Proc/CPU/Family/0x15/TN/F15TnCpb.c
libagesa-y += Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c
diff --git a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c b/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c
deleted file mode 100644
index 5243f23..0000000
--- a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c
+++ /dev/null
@@ -1,1289 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 48409 $ @e \$Date: 2011-03-08 11:19:40 -0600 (Tue, 08 Mar 2011) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-/*----------------------------------------------------------------------------------------
- * M O D U L E S U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- * D E F I N I T I O N S A N D M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- * T Y P E D E F S A N D S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------------------
- * P R O T O T Y P E S O F L O C A L F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- );
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- );
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- );
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- );
-
-/*----------------------------------------------------------------------------------------
- * E X P O R T E D F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
- IN UINT16 Address
- )
-{
- return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
- IN UINT16 Address
- )
-{
- return __inword (Address);
-}
-UINT32
-ReadIo32 (
- IN UINT16 Address
- )
-{
- return __indword (Address);
-}
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- )
-{
- __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- )
-{
- __outword (Address, Data);
-}
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- )
-{
- __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
- UINT64 address
- )
-{
- UINT64 hwcr;
- hwcr = __readmsr (0xC0010015);
- __writemsr (0xC0010015, hwcr | 1 << 17);
- __writemsr (0xC0000100, address);
- return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
- UINT64
- value
- )
-{
- __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- )
-{
- UINT8 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT8 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsbyte (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- )
-{
- UINT16 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT16 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
-}
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- )
-{
- UINT32 dataRead;
- UINT64 hwcrSave;
- if ((Address >> 32) == 0) {
- return *(volatile UINT32 *) (UINTN) Address;
- }
- hwcrSave = SetFsBase (Address);
- dataRead = __readfsdword (0);
- RestoreHwcr (hwcrSave);
- return dataRead;
- }
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT8 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsbyte (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- if ((Address >> 32) == 0){
- *(volatile UINT32 *) (UINTN) Address = Data;
- }
- else {
- UINT64 hwcrSave;
- hwcrSave = SetFsBase (Address);
- __writefsdword (0, Data);
- RestoreHwcr (hwcrSave);
- }
-}
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- )
-{
- *Value = 0;
- switch (RegNum){
- case CR4_REG:
- *Value = __readcr4 ();
- break;
- case DR0_REG:
- *Value = __readdr (0);
- break;
- case DR1_REG:
- *Value = __readdr (1);
- break;
- case DR2_REG:
- *Value = __readdr (2);
- break;
- case DR3_REG:
- *Value = __readdr (3);
- break;
- case DR7_REG:
- *Value = __readdr (7);
- break;
- default:
- *Value = -1;
- break;
- }
-}
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- )
-{
- switch (RegNum){
- case CR4_REG:
- __writecr4 (Value);
- break;
- case DR0_REG:
- __writedr (0, Value);
- break;
- case DR1_REG:
- __writedr (1, Value);
- break;
- case DR2_REG:
- __writedr (2, Value);
- break;
- case DR3_REG:
- __writedr (3, Value);
- break;
- case DR7_REG:
- __writedr (7, Value);
- break;
- default:
- break;
- }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- )
-{
- __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
- VOID
- )
-{
- __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
- __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- )
-{
- UINTN Index;
- for (Index = 0; Index < 32; Index++){
- if (value & (1 << Index)) break;
- }
- return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
-)
-{
- uint8_t bit = 31;
- do {
- if (value & (1 << 31))
- return bit;
-
- value <<= 1;
- bit--;
-
- } while (value != 0);
-
- return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA* Value,
- IN OUT AMD_CONFIG_PARAMS *ConfigPtr
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
- VOID
- )
-{
- return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
- VOID
- )
-{
- STATIC CONST UINT8 opcode [] = {0x60, // pushad
- 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
- 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
- 0x0F, 0xA2, // cpuid
- 0x61, // popad
- 0xC3 // ret
- };
- ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-#if 0
-VOID F10RevDProbeFilterCritical (
- IN PCI_ADDR PciAddress,
- IN UINT32 PciRegister
- )
-{
- UINT64 msrsave;
- msrsave = __readmsr (0xC001001F);
- __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg
- _mm_mfence ();
- __outdword (0xCF8, PciAddress.AddressValue);
- _mm_mfence ();
- __outdword (0xCFC, PciRegister | 2);
- _mm_mfence ();
- __writemsr (0xC001001F, msrsave);
-}
-#endif
-VOID
-IdsOutPort (
- IN UINT32 Addr,
- IN UINT32 Value,
- IN UINT32 Flag
- )
-{
- __outdword ((UINT16) Addr, Value);
-}
-VOID
-StopHere (
- VOID
- )
-{
- VOLATILE UINTN x = 1;
- while (x);
-}
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- )
-{
- UINT64 hwcrSave;
- UINT8 *address32;
- UINTN Index;
- address32 = 0;
- hwcrSave = SetFsBase (Address);
- for (Index = 0; Index < Count; Index++){
- _mm_mfence ();
- _mm_clflush_fs (&address32 [Index * 64]);
- }
- RestoreHwcr (hwcrSave);
-}
-
-VOID
-LibAmdFinit()
-{
- /* TODO: finit */
- __asm__ volatile ("finit");
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to save data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = ReadIo8 (IoAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = ReadIo16 (IoAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = ReadIo32 (IoAddress);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO port address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- WriteIo8 (IoAddress, *(UINT8 *) Value);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- WriteIo16 (IoAddress, *(UINT16 *) Value);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- WriteIo32 (IoAddress, *(UINT32 *) Value);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] IoAddress IO address
- * @param[in] Data Data to compare
- * @param[in] DataMask And mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *(UINT8 *) Value = Read64Mem8 (MemAddress);
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *(UINT16 *) Value = Read64Mem16 (MemAddress);
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *(UINT32 *) Value = Read64Mem32 (MemAddress);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Write64Mem8 (MemAddress, *((UINT8 *) Value));
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Write64Mem16 (MemAddress, *((UINT16 *) Value));
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Write64Mem32 (MemAddress, *((UINT32 *) Value));
- break;
- default:
- ASSERT (FALSE);
- break;
- }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data OR data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData;
- UINT32 TempMask;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] MemAddress Memory address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- //IDS_HDT_CONSOLE (LIB_PCI_RD, "~PCI RD %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
- //IDS_HDT_CONSOLE (LIB_PCI_RD, "~MMIO RD %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 LegacyPciAccess;
- UINT32 MMIOSize;
- UINT64 RMWrite;
- UINT64 RMWritePrevious;
- UINT64 MMIOAddress;
-
- ASSERT (StdHeader != NULL);
- ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
- if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
- // We need to convert our "portable" PCI address into a "real" PCI access
- LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
- if (PciAddress.Address.Register <= 0xFF) {
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- } else {
- LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader);
- RMWrite = RMWritePrevious | 0x0000400000000000;
- LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
- LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
- LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
- LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
- }
- //IDS_HDT_CONSOLE (LIB_PCI_WR, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "LibAmdPciWrite\n");
- } else {
- // Setup the MMIO address
- ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
- MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
- LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
- //IDS_HDT_CONSOLE (LIB_PCI_WR, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
- //printk(BIOS_DEBUG, "LibAmdPciWrite mmio\n");
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data OR Data
- * @param[in] DataMask Mask to be used before data write back to register.
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- Value = (Value & (~TempMask)) | TempData;
- LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- * Poll register until (RegisterValue & DataMask) == Data
- *
- * @param[in] AccessWidth Access width
- * @param[in] PciAddress Pci address
- * @param[in] Data Data to compare
- * @param[in] DataMask AND mask
- * @param[in] Delay Poll for time in 100ns (not supported)
- * @param[in] StdHeader Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 TempData = 0;
- UINT32 TempMask = 0;
- UINT32 Value;
- LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
- do {
- LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
- } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress PCI MMIO base address
- * @param[out] MmioSize Size of region in bytes
- * @param[in] StdHeader Standard configuration header
- *
- * @retval TRUE MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
- OUT UINT64 *MmioAddress,
- OUT UINT32 *MmioSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- BOOLEAN MmioIsEnabled;
- UINT32 EncodedSize;
- UINT64 LocalMsrRegister;
-
- ASSERT (StdHeader != NULL);
-
- MmioIsEnabled = FALSE;
- LibAmdMsrRead (MSR_MMIO_Cfg_Base, &LocalMsrRegister, StdHeader);
- if ((LocalMsrRegister & BIT0) != 0) {
- *MmioAddress = LocalMsrRegister & 0xFFFFFFFFFFF00000;
- EncodedSize = (UINT32) ((LocalMsrRegister & 0x3C) >> 2);
- *MmioSize = ((1 << EncodedSize) * 0x100000);
- MmioIsEnabled = TRUE;
- }
- return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[out] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
- *Value >>= Lowbit; // Shift
-
- // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in] Address Pci address (register must be DWORD aligned)
- * @param[in] Highbit High bit position of the field in DWORD
- * @param[in] Lowbit Low bit position of the field in DWORD
- * @param[in] Value Pointer to data
- * @param[in] StdHeader Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 Temp;
- UINT32 Mask;
-
- ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
- // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
- if ((Highbit - Lowbit) != 31) {
- Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
- } else {
- Mask = (UINT32) 0xFFFFFFFF;
- }
-
- LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
- Temp &= ~(Mask << Lowbit);
- Temp |= (*Value & Mask) << Lowbit;
- LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- * Given a SBDFO this routine will find the next PCI capabilities list entry.
- * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- * returned.
- * To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address Pci address
- * @param[in] StdHeader Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR Base;
- UINT32 Offset;
- UINT32 Temp;
- PCI_ADDR TempAddress;
-
- ASSERT (Address != NULL);
- ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
- Base.AddressValue = Address->AddressValue;
- Offset = Base.Address.Register;
- Base.Address.Register = 0;
-
- Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
- // Verify that the SBDFO points to a valid PCI device SANITY CHECK
- LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
- if (Temp == 0xFFFFFFFF) {
- ASSERT (FALSE);
- return; // There is no device at this address
- }
-
- // Verify that the device supports a capability list
- TempAddress.AddressValue = Base.AddressValue + 0x04;
- LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
- if (Temp == 0) {
- return; // This PCI device does not support capability lists
- }
-
- if (Offset != 0) {
- // If we are continuing on an existing list
- TempAddress.AddressValue = Base.AddressValue + Offset;
- LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
- } else {
- // We are starting on a new list
- TempAddress.AddressValue = Base.AddressValue + 0x34;
- LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
- }
-
- if (Temp == 0) {
- return; // We have reached the end of the capabilities list
- }
-
- // Error detection and recovery- The statement below protects against
- // PCI devices with broken PCI capabilities lists. Detect a pointer
- // that is not uint32 aligned, points into the first 64 reserved DWORDs
- // or points back to itself.
- if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
- ASSERT (FALSE);
- return;
- }
-
- Address->AddressValue = Base.AddressValue + Temp;
- return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination Pointer to memory range
- * @param[in] Value Value to set memory with
- * @param[in] FillLength Size of the memory range
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- while ((FillLength--) != 0) {
- *Dest++ = Value;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination Pointer to destination buffer
- * @param[in] Source Pointer to source buffer
- * @param[in] CopyLength buffer length
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 *Dest;
- CONST UINT8 *SourcePtr;
- ASSERT (StdHeader != NULL);
- Dest = Destination;
- SourcePtr = Source;
- while ((CopyLength--) != 0) {
- *Dest++ = *SourcePtr++;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] StdHeader Standard configuration header (Optional)
- */
-
-// Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 ProcessorPackageType;
- CPUID_DATA CpuId;
-
- LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
- ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
- return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @param[in] Data data
- * @param[in] DataMask data
- * @param[out] TemData typecast data
- * @param[out] TempDataMask typecast data
- */
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
- IN ACCESS_WIDTH AccessWidth,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- OUT UINT32 *TemData,
- OUT UINT32 *TempDataMask
- )
-{
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- *TemData = (UINT32)*(UINT8 *) Data;
- *TempDataMask = (UINT32)*(UINT8 *) DataMask;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- *TemData = (UINT32)*(UINT16 *) Data;
- *TempDataMask = (UINT32)*(UINT16 *) DataMask;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- *TemData = *(UINT32 *) Data;
- *TempDataMask = *(UINT32 *) DataMask;
- break;
- default:
- IDS_ERROR_TRAP;
- break;
- }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in] AccessWidth Access width
- * @retval Width in number of bytes
- */
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- )
-{
- UINT8 Width;
-
- switch (AccessWidth) {
- case AccessWidth8:
- case AccessS3SaveWidth8:
- Width = 1;
- break;
- case AccessWidth16:
- case AccessS3SaveWidth16:
- Width = 2;
- break;
- case AccessWidth32:
- case AccessS3SaveWidth32:
- Width = 4;
- break;
- case AccessWidth64:
- case AccessS3SaveWidth64:
- Width = 8;
- break;
- default:
- Width = 0;
- IDS_ERROR_TRAP;
- break;
- }
- return Width;
-}
-
-VOID
-CpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value
- )
-{
- __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
- VOID
- )
-{
- CPUID_DATA Value;
- CpuidRead (0x80000008, &Value);
- return Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.h b/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.h
deleted file mode 100644
index 373ac1f..0000000
--- a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.h
+++ /dev/null
@@ -1,371 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Lib
- * @e \$Revision: 85030 $ @e \$Date: 2012-12-26 00:20:10 -0600 (Wed, 26 Dec 2012) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define CR4_REG 0x04
-#define DR0_REG 0x10
-#define DR1_REG 0x11
-#define DR2_REG 0x12
-#define DR3_REG 0x13
-#define DR7_REG 0x17
-
-// PROTOTYPES FOR amdlib32.asm
-UINT8
-ReadIo8 (
- IN UINT16 Address
- );
-
-UINT16
-ReadIo16 (
- IN UINT16 Address
- );
-
-UINT32
-ReadIo32 (
- IN UINT16 Address
- );
-
-VOID
-WriteIo8 (
- IN UINT16 Address,
- IN UINT8 Data
- );
-
-VOID
-WriteIo16 (
- IN UINT16 Address,
- IN UINT16 Data
- );
-
-VOID
-WriteIo32 (
- IN UINT16 Address,
- IN UINT32 Data
- );
-
-UINT8
-Read64Mem8 (
- IN UINT64 Address
- );
-
-UINT16
-Read64Mem16 (
- IN UINT64 Address
- );
-
-UINT32
-Read64Mem32 (
- IN UINT64 Address
- );
-
-VOID
-Write64Mem8 (
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-VOID
-Write64Mem16 (
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-VOID
-Write64Mem32 (
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-UINT64
-ReadTSC (
- VOID);
-
-// MSR
-VOID
-LibAmdMsrRead (
- IN UINT32 MsrAddress,
- OUT UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMsrWrite (
- IN UINT32 MsrAddress,
- IN UINT64 *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// IO
-VOID
-LibAmdIoRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdIoPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT16 IoAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN UINT64 MemAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// PCI
-VOID
-LibAmdPciRead (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- OUT VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWrite (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciRMW (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciPoll (
- IN ACCESS_WIDTH AccessWidth,
- IN PCI_ADDR PciAddress,
- IN CONST VOID *Data,
- IN CONST VOID *DataMask,
- IN UINT64 Delay,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciReadBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- OUT UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciWriteBits (
- IN PCI_ADDR Address,
- IN UINT8 Highbit,
- IN UINT8 Lowbit,
- IN CONST UINT32 *Value,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdPciFindNextCap (
- IN OUT PCI_ADDR *Address,
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
- IN UINT32 CpuidFcnAddress,
- OUT CPUID_DATA *Value,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
- IN VOID *Destination,
- IN UINT8 Value,
- IN UINTN FillLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-VOID
-LibAmdMemCopy (
- IN VOID *Destination,
- IN CONST VOID *Source,
- IN UINTN CopyLength,
- IN OUT AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT32
-LibAmdGetPackageType (
- IN AMD_CONFIG_PARAMS *StdHeader
- );
-
-UINT8
-LibAmdBitScanReverse (
- IN UINT32 value
- );
-UINT8
-LibAmdBitScanForward (
- IN UINT32 value
- );
-
-VOID
-LibAmdReadCpuReg (
- IN UINT8 RegNum,
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteCpuReg (
- IN UINT8 RegNum,
- IN UINT32 Value
- );
-
-VOID
-LibAmdWriteBackInvalidateCache (
- IN VOID
- );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
- IN ACCESS_WIDTH AccessWidth
- );
-
-VOID
-LibAmdCLFlush (
- IN UINT64 Address,
- IN UINT8 Count
- );
-
-VOID
-StopHere (
- VOID
- );
-
-VOID
-LibAmdFinit (
- VOID);
-
-VOID
-LibAmdFnclex (
- VOID);
-
-VOID
-LibAmdReadMxcsr (
- OUT UINT32 *Value
- );
-VOID
-LibAmdWriteMxcsr (
- IN UINT32 *Value
- );
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/f16kb/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Makefile.inc
index 2cee89e..d17c301 100644
--- a/src/vendorcode/amd/agesa/f16kb/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f16kb/Makefile.inc
@@ -97,11 +97,16 @@ else
$(eval $(call create_class_compiler,libagesa,x86_64))
endif
-libagesa-y =
+# Do not optimise performance-critical low-level IO for size with -Os,
+# request -O2 with -falign-functions.
+
+libagesa-y = ../common/amdlib.c
+
+$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
+
libagesa-y += Legacy/Proc/agesaCallouts.c
libagesa-y += Legacy/Proc/Dispatcher.c
libagesa-y += Legacy/Proc/hobTransfer.c
-libagesa-y += Lib/amdlib.c
libagesa-y += Proc/Common/AmdInitEarly.c
libagesa-y += Proc/Common/AmdInitEnv.c
libagesa-y += Proc/Common/AmdInitLate.c
1
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