Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14234
-gerrit
commit 63951b8222f874e46282b3c4dac2976c6cbe8ef3
Author: Julius Werner <jwerner(a)chromium.org>
Date: Wed Mar 23 16:08:11 2016 -0700
google/oak: Log hardware watchdog in eventlog
The MT8173 hardware watchdog can assert an external signal which we use
to reset the TPM on Oak. Therefore we do not need to do the same
double-reset dance as on other Chromebooks to ensure that we reset in a
correct state.
Still, we have a situation where we need to reconfigure the watchdog
early in the bootblock in a way that will clear information about the
previous reboot from the status register, and we need that information
later in ramstage to log the right event. Let's reuse the same watchdog
tombstone mechanism from other boards, except that we don't perform a
second reset and the tombstone is simply used to communicate between
bootblock and ramstage within the same boot.
BRANCH=None
BUG=None
TEST=Run 'mem w 0x10007004 0x8' on Oak, observe how it reboots and how
'mosys eventlog list' shows a hardware watchdog reboot event afterwards.
Change-Id: I1ade018eba652af91814fdaec233b9920f2df01f
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 07af37e11499e86e730f7581862e8f0d67a04218
Original-Change-Id: I0b9c6b83b20d6e1362d650ac2ee49fff45b29767
Original-Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/334449
Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
---
src/mainboard/google/oak/mainboard.c | 1 +
src/soc/mediatek/mt8173/include/soc/memlayout.ld | 3 ++-
src/soc/mediatek/mt8173/wdt.c | 6 ++++--
src/vendorcode/google/chromeos/chromeos.h | 2 ++
src/vendorcode/google/chromeos/watchdog.c | 7 ++++++-
5 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/google/oak/mainboard.c b/src/mainboard/google/oak/mainboard.c
index 4208730..e99a5c0 100644
--- a/src/mainboard/google/oak/mainboard.c
+++ b/src/mainboard/google/oak/mainboard.c
@@ -164,6 +164,7 @@ static void mainboard_init(device_t dev)
configure_ext_buck();
elog_init();
+ elog_add_watchdog_reset();
elog_add_boot_reason();
}
diff --git a/src/soc/mediatek/mt8173/include/soc/memlayout.ld b/src/soc/mediatek/mt8173/include/soc/memlayout.ld
index 771f326..5b92153 100644
--- a/src/soc/mediatek/mt8173/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8173/include/soc/memlayout.ld
@@ -40,7 +40,8 @@ SECTIONS
SRAM_START(0x00100000)
VBOOT2_WORK(0x00100000, 12K)
PRERAM_CBMEM_CONSOLE(0x00103000, 16K)
- PRERAM_CBFS_CACHE(0x00107000, 16K)
+ WATCHDOG_TOMBSTONE(0x00107000, 4)
+ PRERAM_CBFS_CACHE(0x00107004, 16K - 4)
TIMESTAMP(0x0010B000, 4K)
ROMSTAGE(0x0010C000, 92K)
STACK(0x00124000, 16K)
diff --git a/src/soc/mediatek/mt8173/wdt.c b/src/soc/mediatek/mt8173/wdt.c
index ba63c13..93ffe09 100644
--- a/src/soc/mediatek/mt8173/wdt.c
+++ b/src/soc/mediatek/mt8173/wdt.c
@@ -18,6 +18,7 @@
#include <reset.h>
#include <soc/addressmap.h>
#include <soc/wdt.h>
+#include <vendorcode/google/chromeos/chromeos.h>
static struct mt8173_wdt_regs * const mt8173_wdt = (void *)RGU_BASE;
@@ -29,9 +30,10 @@ int mtk_wdt_init(void)
wdt_sta = read32(&mt8173_wdt->wdt_status);
printk(BIOS_INFO, "WDT: Last reset was ");
- if (wdt_sta & MTK_WDT_STA_HW_RST)
+ if (wdt_sta & MTK_WDT_STA_HW_RST) {
printk(BIOS_INFO, "hardware watchdog\n");
- else if (wdt_sta & MTK_WDT_STA_SW_RST)
+ mark_watchdog_tombstone();
+ } else if (wdt_sta & MTK_WDT_STA_SW_RST)
printk(BIOS_INFO, "normal software reboot\n");
else if (wdt_sta & MTK_WDT_STA_SPM_RST)
printk(BIOS_INFO, "SPM reboot\n");
diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h
index 03f1516..57a2f71 100644
--- a/src/vendorcode/google/chromeos/chromeos.h
+++ b/src/vendorcode/google/chromeos/chromeos.h
@@ -34,10 +34,12 @@ void elog_add_boot_reason(void);
/* functions implemented in watchdog.c */
void elog_add_watchdog_reset(void);
+void mark_watchdog_tombstone(void);
void reboot_from_watchdog(void);
#else
static inline void elog_add_boot_reason(void) { return; }
static inline void elog_add_watchdog_reset(void) { return; }
+static inline void mark_watchdog_tombstone(void) { return; }
static inline void reboot_from_watchdog(void) { return; }
#endif /* CONFIG_CHROMEOS */
diff --git a/src/vendorcode/google/chromeos/watchdog.c b/src/vendorcode/google/chromeos/watchdog.c
index 79f7dde..a2b18b7 100644
--- a/src/vendorcode/google/chromeos/watchdog.c
+++ b/src/vendorcode/google/chromeos/watchdog.c
@@ -30,9 +30,14 @@ void elog_add_watchdog_reset(void)
write32(_watchdog_tombstone, 0);
}
+void mark_watchdog_tombstone(void)
+{
+ write32(_watchdog_tombstone, WATCHDOG_TOMBSTONE_MAGIC);
+}
+
void reboot_from_watchdog(void)
{
printk(BIOS_INFO, "Last reset was watchdog, reboot again to reset TPM!\n");
- write32(_watchdog_tombstone, WATCHDOG_TOMBSTONE_MAGIC);
+ mark_watchdog_tombstone();
hard_reset();
}
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14233
-gerrit
commit 3090e776db5d86de8d3beaf9895fbed74a6f4f30
Author: Benson Leung <bleung(a)chromium.org>
Date: Tue Mar 22 13:37:51 2016 -0700
google/chell: Adjust nuvoton 8825 button thresholds again.
Changing these thresholds again for new tuning in March of 2016.
Something's changed in the latest firmware to cause all
values previously read on Chell to float down.
Set "nuvoton,sar-threshold" property to thresholds
based on tuning with the Android Wired Headphone
Compatibility Kit and Chell DVT.
Signed-off-by: Benson Leung <bleung(a)chromium.org>
BUG=chrome-os-partner:49333
BRANCH=none
TEST=Run evtest, selecting the input event for sklnau8825adi
Using the Nominal headphones from the kit, check that the
buttons for "KEY_VOLUMEDOWN", "KEY_VOLUMEUP", "KEY_MEDIA",
and code 582 (?) (should be voice search, but evtest doesn't understand)
All of these buttons should work properly.
Change-Id: Ie5ff1d35599d2cca5ce76467ecd7ec3ecab42d8b
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 1d13e967addb5cd31e6196e32541cda97ae00257
Original-Change-Id: I11de7a0853a3598f3834e8bae3140b9942cbd0b0
Original-Reviewed-on: https://chromium-review.googlesource.com/334402
Original-Commit-Ready: Benson Leung <bleung(a)chromium.org>
Original-Tested-by: Benson Leung <bleung(a)chromium.org>
Original-Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org>
---
src/mainboard/google/chell/acpi/mainboard.asl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/google/chell/acpi/mainboard.asl b/src/mainboard/google/chell/acpi/mainboard.asl
index a7c7bfe..67de19d 100644
--- a/src/mainboard/google/chell/acpi/mainboard.asl
+++ b/src/mainboard/google/chell/acpi/mainboard.asl
@@ -172,7 +172,7 @@ Scope (\_SB.PCI0.I2C4)
* Compatibility Kit and a Chell EVT
*/
Package () {"nuvoton,sar-threshold",
- Package () {0x20, 0x32, 0x50, 0x70}},
+ Package () {0x0c, 0x1c, 0x38, 0x60}},
Package () {"nuvoton,sar-hysteresis", 1},
/* VDDA for button impedance measurement */
Package () {"nuvoton,sar-voltage", 0},
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13914
-gerrit
commit 8dd3dc3c4b803eca6c76f1615be30b48d697f6a8
Author: huang lin <hl(a)rock-chips.com>
Date: Thu Mar 3 15:29:34 2016 +0800
libpayload: mmu: Initialize the base 4GiB as device memory
This allows to accommodate different platforms' default
configurations, memory configuration is fine tuned later during boot
process.
BUG=chrome-os-partner:51537
BRANCH=none
TEST=none yet, the full stack of patches boots fine on EVB
Change-Id: I39da4ce247422f67451711ac0ed5a5e1119ed836
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 97a9a71ade4df8a501043f9ae58463a3135e2a4f
Original-Change-Id: I39da4ce247422f67451711ac0ed5a5e1119ed836
Original-Signed-off-by: huang lin <hl(a)rock-chips.com>
Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/332384
Original-Reviewed-by: Furquan Shaikh <furquan(a)chromium.org>
---
payloads/libpayload/arch/arm64/mmu.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/payloads/libpayload/arch/arm64/mmu.c b/payloads/libpayload/arch/arm64/mmu.c
index f07e4c4..553b2d5 100644
--- a/payloads/libpayload/arch/arm64/mmu.c
+++ b/payloads/libpayload/arch/arm64/mmu.c
@@ -260,7 +260,7 @@ void mmu_config_range(void *start, size_t size, uint64_t tag)
* Desc : Initialize mmu based on the mmu_memrange passed. ttb_buffer is used as
* the base address for xlat tables. TTB_DEFAULT_SIZE defines the max number of
* tables that can be used
- * Assuming that memory 0-2GiB is device memory.
+ * Assuming that memory 0-4GiB is device memory.
*/
uint64_t mmu_init(struct mmu_ranges *mmu_ranges)
{
@@ -275,7 +275,14 @@ uint64_t mmu_init(struct mmu_ranges *mmu_ranges)
printf("Libpayload ARM64: TTB_BUFFER: 0x%p Max Tables: %d\n",
(void*)xlat_addr, max_tables);
- mmu_config_range(NULL, 0x80000000, TYPE_DEV_MEM);
+ /*
+ * To keep things simple we start with mapping the entire base 4GB as
+ * device memory. This accommodates various architectures' default
+ * settings (for instance rk3399 mmio starts at 0xf8000000); it is
+ * fine tuned (e.g. mapping DRAM areas as write-back) later in the
+ * boot process.
+ */
+ mmu_config_range(NULL, 0x100000000, TYPE_DEV_MEM);
for (; i < mmu_ranges->used; i++)
mmu_config_range((void *)mmu_ranges->entries[i].base,
Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14232
-gerrit
commit 35289c96d2112bc754d89be76ece52066c327fc8
Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Date: Sun Apr 3 20:52:01 2016 -0700
crossgcc: Fix compilation on clang systems
Most targets have been broken on systems with CLANG being the default
compiler (OS X and some BSDs). CLANG dislikes some of GCC's autogenerated
code. We also missed switching CFLAGS to CXXFLAGS when GCC switched to C++
compilation per default.
Change-Id: I87caa1a15982c431048aa79748ea7ef655a9a3a1
Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
---
util/crossgcc/buildgcc | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index 525b574..96e4c19 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -18,8 +18,8 @@
cd $(dirname $0)
-CROSSGCC_DATE="March 21st, 2016"
-CROSSGCC_VERSION="1.37"
+CROSSGCC_DATE="April 3rd, 2016"
+CROSSGCC_VERSION="1.38"
# default settings
PACKAGE=GCC
@@ -453,13 +453,20 @@ build_BINUTILS() {
build_GCC() {
+ # Work around crazy code generator in GCC that confuses CLANG.
+ $CC --version | grep clang &>/dev/null &&
+ HOSTCFLAGS="$HOSTCFLAGS -fbracket-depth=1024"
+
# GCC does not honor HOSTCFLAGS at all. CFLAGS are used for
# both target and host object files.
# There's a work-around called CFLAGS_FOR_BUILD and CFLAGS_FOR_TARGET
# but it does not seem to work properly. At least the host library
# libiberty is not compiled with CFLAGS_FOR_BUILD.
+ # Also set the CXX version of the flags because GCC is now compiled
+ # using C++.
CC="$CC" CFLAGS_FOR_TARGET="-O2 -Dinhibit_libc" CFLAGS="$HOSTCFLAGS" \
- CFLAGS_FOR_BUILD="$HOSTCFLAGS" ../gcc-${GCC_VERSION}/configure \
+ CFLAGS_FOR_BUILD="$HOSTCFLAGS" CXXFLAGS="$HOSTCFLAGS" \
+ CXXFLAGS_FOR_BUILD="$HOSTCFLAGS" ../gcc-${GCC_VERSION}/configure \
--prefix=$TARGETDIR --libexecdir=$TARGETDIR/lib \
--target=${TARGETARCH} --disable-werror --disable-shared \
--enable-lto --enable-plugins --enable-gold --enable-ld=default \
Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14231
-gerrit
commit 56967907a1bb7d8c879606bd16c273ddee499ec2
Author: Martin Roth <martinroth(a)google.com>
Date: Sat Apr 2 11:10:08 2016 -0600
crossgcc/Makefile.inc: Update jenkins-build-toolchain
Because the builders have the coreboot cross-compilers in their path,
the XGCCPATH variable needs to be set after building the new toolchain
before it will be used.
- Set XGCC to $DEST/bin if $DEST is set, use the default location
otherwise.
- Add KEEP_SOURCES option to help speed up compilation (Slightly).
- log .xcompile for verification that the right toolchain was used.
- Verify that test-toolchain passes.
Change-Id: I7c270dab94be7e8f801d527169767018a24986e4
Signed-off-by: Martin Roth <martinroth(a)google.com>
---
util/crossgcc/Makefile.inc | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/util/crossgcc/Makefile.inc b/util/crossgcc/Makefile.inc
index 5be4c10..83a6478 100644
--- a/util/crossgcc/Makefile.inc
+++ b/util/crossgcc/Makefile.inc
@@ -69,7 +69,8 @@ endif # ifeq ($(COMPILER_OUT_OF_DATE),1)
# This target controls what the jenkins builder tests
jenkins-build-toolchain:
- $(MAKE) crosstools clang \
- BUILDGCC_OPTIONS='-y --nocolor'
+ $(MAKE) crosstools clang KEEP_SOURCES=1 BUILDGCC_OPTIONS='-y --nocolor'
rm -f .xcompile
- $(MAKE) what-jenkins-does
+ $(MAKE) what-jenkins-does XGCCPATH=$(if $(DEST),$(DEST)/bin,$(top)/util/crossgcc/xgcc/bin)
+ cat .xcompile
+ $(MAKE) test-toolchain
Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14229
-gerrit
commit 8dc03374528ebc93194885e013a94c90a4d170b2
Author: Martin Roth <martinroth(a)google.com>
Date: Fri Apr 1 18:46:29 2016 -0600
crossgcc: skip TARGETARCH for tools that don't use it
Many of the tools and libraries don't use a target architecture, but
they were still getting put in one. This change separates out the
builds that need the target architecture from the ones that don't,
and sets the build directory accordingly.
This will help keep from rebuilding the libraries when building all
of the tools if you keep the temporary files around (-t option).
Change-Id: Id6c17719332f2244657f103f5f07ca7812d51af1
Signed-off-by: Martin Roth <martinroth(a)google.com>
---
util/crossgcc/buildgcc | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index 525b574..7782739 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -286,13 +286,25 @@ is_package_enabled()
echo "$PACKAGES" |grep -q "\<$1\>"
}
+package_uses_targetarch()
+{
+ if [ "$1" = "GCC" ] || [ "$1" = "GDB" ] || [ "$1" = "BINUTILS" ] || \
+ [ "$1" = "PYTHON" ] || [ "$1" = "EXPAT" ]; then
+ true
+ else
+ false
+ fi
+}
+
build() {
package=$1
fn_exists build_$package || return
version="$(eval echo \$$package"_VERSION")"
- BUILDDIR=build-${TARGETARCH}-$package
+ package_uses_targetarch "$package" && \
+ BUILDDIR=build-${TARGETARCH}-$package || \
+ BUILDDIR=build-$package
mkdir -p ${BUILDDIR}
@@ -321,7 +333,7 @@ cleanup()
{
printf "Cleaning up temporary files... "
for package in $PACKAGES; do
- rm -rf build-${TARGETARCH}-$package $(eval echo \$$package"_DIR")
+ rm -rf build-${TARGETARCH}-$package build-$package $(eval echo \$$package"_DIR")
done
rm -f getopt
printf "${green}ok${NC}\n"
Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14229
-gerrit
commit 3460b99f226fa00a4765a54d1bebe3bb2002ccf5
Author: Martin Roth <martinroth(a)google.com>
Date: Fri Apr 1 18:46:29 2016 -0600
crossgcc: skip TARGETARCH for tools that don't use it
Many of the tools and libraries don't use a target architecture, but
they were still getting put in one. This change separates out the
builds that need the target architecture from the ones that don't,
and sets the build directory accordingly.
This will help keep from rebuilding the libraries when building all
of the tools if you keep the temporary files around (-t option).
Change-Id: Id6c17719332f2244657f103f5f07ca7812d51af1
Signed-off-by: Martin Roth <martinroth(a)google.com>
---
util/crossgcc/buildgcc | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index 81afc1f..74b26ab 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -287,13 +287,25 @@ is_package_enabled()
echo "$PACKAGES" |grep -q "\<$1\>"
}
+package_uses_targetarch()
+{
+ if [ "$1" = "GCC" ] || [ "$1" = "GDB" ] || [ "$1" = "BINUTILS" ] || \
+ [ "$1" = "PYTHON" ] || [ "$1" = "EXPAT" ]; then
+ true
+ else
+ false
+ fi
+}
+
build() {
package=$1
fn_exists build_$package || return
version="$(eval echo \$$package"_VERSION")"
- BUILDDIR=build-${TARGETARCH}-$package
+ package_uses_targetarch "$package" && \
+ BUILDDIR=build-${TARGETARCH}-$package || \
+ BUILDDIR=build-$package
mkdir -p ${BUILDDIR}
@@ -322,7 +334,7 @@ cleanup()
{
printf "Cleaning up temporary files... "
for package in $PACKAGES; do
- rm -rf build-${TARGETARCH}-$package $(eval echo \$$package"_DIR")
+ rm -rf build-${TARGETARCH}-$package build-$package $(eval echo \$$package"_DIR")
done
rm -f getopt
printf "${green}ok${NC}\n"