coreboot-gerrit March 2016

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: roda/rk9: Remove #include early_serial.c from romstage
by gerrit＠coreboot.org 08 Mar '16

08 Mar '16

the following patch was just integrated into master: commit 6321d7c14bf96719d199cfe921d4299c93cd441f Author: Antonello Dettori <dev(a)dettori.io> Date: Mon Mar 7 01:59:48 2016 +0000 roda/rk9: Remove #include early_serial.c from romstage Remove dependency on early_serial.c and instead use the Super I/O's header to access the functions needed. Also re-organize some of the superio code in order to succesfully compile the rom. Change-Id: I85a6f1352ae3b91c3c98e4d3fa0b90b87e02babc Signed-off-by: Antonello Dettori <dev(a)dettori.io> Reviewed-on: https://review.coreboot.org/13925 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Martin Roth <martinroth(a)google.com> See https://review.coreboot.org/13925 for details. -gerrit

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Patch set updated for coreboot: payloads/seabios: Add "git revision" to the SeaBIOS version menu
by Antonello Dettori 08 Mar '16

08 Mar '16

Antonello Dettori (dev(a)dettori.io) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13937 -gerrit commit 2ac16b2345acb6540bc442528c94bd2b7701034c Author: Antonello Dettori <dev(a)dettori.io> Date: Mon Mar 7 23:56:57 2016 +0000 payloads/seabios: Add "git revision" to the SeaBIOS version menu Add an option to specify a git revision from which to build SeaBIOS. Change-Id: Ifbf3b82e784f79395ab7cd07c5804f72928d7640 Signed-off-by: Antonello Dettori <dev(a)dettori.io> --- payloads/external/Makefile.inc | 2 ++ payloads/external/SeaBIOS/Kconfig | 16 ++++++++++++++++ payloads/external/SeaBIOS/Makefile.inc | 7 +++++++ 3 files changed, 25 insertions(+) diff --git a/payloads/external/Makefile.inc b/payloads/external/Makefile.inc index 557de2a..5eb1062 100644 --- a/payloads/external/Makefile.inc +++ b/payloads/external/Makefile.inc @@ -45,6 +45,8 @@ seabios: AS="$(AS_x86_32)" IASL="$(IASL)" \ CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \ CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \ + CONFIG_SEABIOS_REVISION=$(CONFIG_SEABIOS_REVISION) \ + CONFIG_SEABIOS_REVISION_ID=$(CONFIG_SEABIOS_REVISION_ID) \ CONFIG_PAYLOAD_CONFIGFILE=$(CONFIG_PAYLOAD_CONFIGFILE) \ CONFIG_SEABIOS_THREAD_OPTIONROMS=$(CONFIG_SEABIOS_THREAD_OPTIONROMS) \ CONFIG_SEABIOS_VGA_COREBOOT=$(CONFIG_SEABIOS_VGA_COREBOOT) \ diff --git a/payloads/external/SeaBIOS/Kconfig b/payloads/external/SeaBIOS/Kconfig index 70f5ce2..8a8d931 100644 --- a/payloads/external/SeaBIOS/Kconfig +++ b/payloads/external/SeaBIOS/Kconfig @@ -12,9 +12,25 @@ config SEABIOS_MASTER bool "master" help Newest SeaBIOS version +config SEABIOS_REVISION + bool "git revision" + help + Select this option if you have a specific commit or branch + that you want to use as the revision from which to + build SeaBIOS. + + You will be able to specify the name of a branch or a commit id + later. endchoice +config SEABIOS_REVISION_ID + string "Insert a commit's SHA-1 or a branch name" + depends on SEABIOS_REVISION + default "origin/master" + help + The commit's SHA-1 or branch name of the revision to use. + config SEABIOS_PS2_TIMEOUT prompt "PS/2 keyboard controller initialization timeout (milliseconds)" default 0 diff --git a/payloads/external/SeaBIOS/Makefile.inc b/payloads/external/SeaBIOS/Makefile.inc index e478a09..a722eed 100644 --- a/payloads/external/SeaBIOS/Makefile.inc +++ b/payloads/external/SeaBIOS/Makefile.inc @@ -1,5 +1,6 @@ TAG-$(CONFIG_SEABIOS_MASTER)=origin/master TAG-$(CONFIG_SEABIOS_STABLE)=01a84bea2d28a19d2405c1ecac4bdef17683cc0c +TAG-$(CONFIG_SEABIOS_REVISION)=$(CONFIG_SEABIOS_REVISION_ID) unexport KCONFIG_AUTOHEADER unexport KCONFIG_AUTOCONFIG @@ -31,6 +32,12 @@ ifeq ($(CONFIG_CONSOLE_SERIAL)$(CONFIG_DRIVERS_UART_8250IO),yy) else echo "# CONFIG_DEBUG_SERIAL is not set" >> seabios/.config endif +ifeq ($(CONFIG_SEABIOS_REVISION),y) +ifeq ($(CONFIG_SEABIOS_REVISION_ID),) + echo "Error: There is no revision specified for SeaBIOS" + false +endif +endif ifneq ($(CONFIG_SEABIOS_THREAD_OPTIONROMS),y) echo "# CONFIG_THREAD_OPTIONROMS is not set" >> seabios/.config endif

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Patch set updated for coreboot: Makefile: Build-time overlap check for programs loaded after coreboot
by Julius Werner 08 Mar '16

08 Mar '16

Julius Werner (jwerner(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13949 -gerrit commit 8b00f58d568a141d6e7d45acb0f309ad451ccd09 Author: Julius Werner <jwerner(a)chromium.org> Date: Mon Mar 7 17:55:43 2016 -0800 Makefile: Build-time overlap check for programs loaded after coreboot On non-x86 platforms, coreboot uses the memlayout.ld mechanism to statically allocate the different memory regions it needs and guarantees at build time that there are no dangerous overlaps between them. At the end of its (ramstage) execution, however, it usually loads a payload (and possibly other platform-specific components) that is not integrated into the coreboot build system and therefore cannot provide the same overlap guarantees through memlayout.ld. This creates a dangerous memory hazard where a new component could be loaded over memory areas that are still in use by the code-loading ramstage and lead to arbitrary memory corruption bugs. This patch fills this gap in our build-time correctness guarantees by adding the necessary checks as a new intermediate Makefile target on route to assembling the final image. It will parse the memory footprint information of the payload (and other platform-specific post-ramstage components) from CBFS and compare it to a list of memory areas known to be still in use during late ramstage, generating a build failure in case of a possible hazard. BUG=chrome-os-partner:48008 TEST=Built Oak while moving critical regions in the way of BL31 or the payload, observing the desired build-time errors. Built Nyan, Jerry and Falco without issues for good measure. Change-Id: I3ebd2c1caa4df959421265e26f9cab2c54909b68 Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- Makefile.inc | 46 +++++++++++++++++++++++++++++++++++++++++++++ src/arch/arm/Makefile.inc | 4 ++++ src/arch/arm64/Makefile.inc | 8 ++++++++ src/arch/mips/Makefile.inc | 4 ++++ src/arch/riscv/Makefile.inc | 4 ++++ 5 files changed, 66 insertions(+) diff --git a/Makefile.inc b/Makefile.inc index 68012d9..0849d65 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -842,6 +842,52 @@ board_id-type := raw $(obj)/board_id: printf $(CONFIG_BOARD_ID_STRING) > $@ +# Ensure that no payload segment overlaps with memory regions used by ramstage +# (not for x86 since it can relocate itself in that case) +ifneq ($(CONFIG_ARCH_X86),y) +check-ramstage-overlap-regions := ramstage +check-ramstage-overlap-files := +ifneq ($(CONFIG_PAYLOAD_NONE),y) +check-ramstage-overlap-files += $(CONFIG_CBFS_PREFIX)/payload +endif + +# will output one or more lines of "<load address in hex> <memlen in decimal>" +cbfs-get-segments-cmd = $(CBFSTOOL) $(obj)/coreboot.pre print -v | sed -n \ + '\%$(1)%,\%^[^ ]\{4\}%s% .*load: $0x[0-9a-fA-F]*$,.*length: [0-9]*/$[0-9]*$.*%\1 \2%p' + +ramstage-symbol-addr-cmd = $(OBJDUMP_ramstage) -t $(objcbfs)/ramstage.elf | \ + sed -n '/ $(1)$$/s/^$[0-9a-fA-F]*$ .*/0x\1/p' + +check-ramstage-overlaps: $(obj)/coreboot.pre + programs=$$($(foreach file,$(check-ramstage-overlap-files), \ + $(call cbfs-get-segments-cmd,$(file)) ; )) ; \ + regions=$$($(foreach region,$(check-ramstage-overlap-regions), \ + echo $(region) ; \ + $(call ramstage-symbol-addr-cmd,_$(region)) ; \ + $(call ramstage-symbol-addr-cmd,_e$(region)) ; )) ; \ + pstart= ; pend= ; \ + for x in $$programs; do \ + if [ -z $$pstart ]; then pstart=$$(($$x)) ; continue ; fi ; \ + pend=$$(($$pstart + $$x)) ; \ + rname= ; rstart= ; rend= ; \ + for y in $$regions ; do \ + if [ -z $$rname ]; then rname=$$y ; continue ; fi ; \ + if [ -z $$rstart ]; then rstart=$$(($$y)) ; continue ; fi ; \ + rend=$$(($$y)) ; \ + if [ $$pstart -lt $$rend -a $$rstart -lt $$pend ]; then \ + echo "ERROR: Ramstage region _$$rname overlapped by:" \ + $(check-ramstage-overlap-files) ; \ + exit 1 ; \ + fi ; \ + rname= ; rstart= ; rend= ; \ + done ; \ + pstart= ; pend= ; \ + done + +INTERMEDIATE+=check-ramstage-overlaps +PHONY+=check-ramstage-overlaps +endif + junit.xml: echo "Building $(UTIL)" echo '<?xml version="1.0" encoding="utf-8"?><testsuite>' > $@.tmp diff --git a/src/arch/arm/Makefile.inc b/src/arch/arm/Makefile.inc index b04a3db..d9c88c0 100644 --- a/src/arch/arm/Makefile.inc +++ b/src/arch/arm/Makefile.inc @@ -25,6 +25,10 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM),y) CBFSTOOL_PRE1_OPTS = -m arm -s $(CONFIG_CBFS_SIZE) endif +ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM),y) +check-ramstage-overlap-regions += postram_cbfs_cache stack ttb +endif + ifeq ($(CONFIG_ARCH_ARM),y) subdirs-y += libgcc/ subdirs-y += armv4/ armv7/ diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc index f44ee51..dffdd9c 100644 --- a/src/arch/arm64/Makefile.inc +++ b/src/arch/arm64/Makefile.inc @@ -33,6 +33,10 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM64),y) CBFSTOOL_PRE1_OPTS = -m arm64 -s $(CONFIG_CBFS_SIZE) endif +ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM64),y) +check-ramstage-overlap-regions += postram_cbfs_cache stack ttb +endif + ################################################################################ # bootblock ################################################################################ @@ -182,6 +186,8 @@ $(BL31_CBFS)-type := stage $(BL31_CBFS)-compression := $(CBFS_COMPRESS_FLAG) cbfs-files-y += $(BL31_CBFS) +check-ramstage-overlap-files += $(BL31_CBFS) + ifeq ($(CONFIG_ARM64_USE_SECURE_OS),y) SECURE_OS_FILE := $(CONFIG_ARM64_SECURE_OS_FILE) @@ -190,6 +196,8 @@ $(SECURE_OS_FILE_CBFS)-file := $(SECURE_OS_FILE) $(SECURE_OS_FILE_CBFS)-type := stage cbfs-files-y += $(SECURE_OS_FILE_CBFS) +check-ramstage-overlap-files += $(SECURE_OS_FILE_CBFS) + endif # CONFIG_ARM64_USE_SECURE_OS endif # CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE diff --git a/src/arch/mips/Makefile.inc b/src/arch/mips/Makefile.inc index a037525..0901388 100644 --- a/src/arch/mips/Makefile.inc +++ b/src/arch/mips/Makefile.inc @@ -22,6 +22,10 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_MIPS),y) CBFSTOOL_PRE1_OPTS = -m mips -s $(CONFIG_CBFS_SIZE) endif +ifeq ($(CONFIG_ARCH_RAMSTAGE_MIPS),y) +check-ramstage-overlap-regions += stack +endif + ############################################################################### # bootblock ############################################################################### diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc index 2d4d7e6..4abaf58 100644 --- a/src/arch/riscv/Makefile.inc +++ b/src/arch/riscv/Makefile.inc @@ -19,6 +19,10 @@ riscv_flags = -I$(src)/arch/riscv/ riscv_asm_flags = +ifeq ($(CONFIG_ARCH_RAMSTAGE_RISCV),y) +check-ramstage-overlap-regions += stack +endif + ################################################################################ ## bootblock ################################################################################

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Patch set updated for coreboot: Makefile: Build-time overlap check for programs loaded after coreboot
by Julius Werner 08 Mar '16

08 Mar '16

Julius Werner (jwerner(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13949 -gerrit commit 59e3046666f6b92b1ac8eddcf9db762d9c1220e7 Author: Julius Werner <jwerner(a)chromium.org> Date: Mon Mar 7 17:55:43 2016 -0800 Makefile: Build-time overlap check for programs loaded after coreboot On non-x86 platforms, coreboot uses the memlayout.ld mechanism to statically allocate the different memory regions it needs and guarantees at build time that there are no dangerous overlaps between them. At the end of its (ramstage) execution, however, it usually loads a payload (and possibly other platform-specific components) that is not integrated into the coreboot build system and therefore cannot provide the same overlap guarantees through memlayout.ld. This creates a dangerous memory hazard where a new component could be loaded over memory areas that are still in use by the code-loading ramstage and lead to arbitrary memory corruption bugs. This patch fills this gap in our build-time correctness guarantees by adding the necessary checks as a new intermediate Makefile target on route to assembling the final image. It will parse the memory footprint information of the payload (and other platform-specific post-ramstage components) from CBFS and compare it to a list of memory areas known to be still in use during late ramstage, generating a build failure in case of a possible hazard. BUG=chrome-os-partner:48008 TEST=Built Oak while moving critical regions in the way of BL31 or the payload, observing the desired build-time errors. Built Nyan, Jerry and Falco without issues for good measure. Change-Id: I3ebd2c1caa4df959421265e26f9cab2c54909b68 Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- Makefile.inc | 46 +++++++++++++++++++++++++++++++++++++++++++++ src/arch/arm/Makefile.inc | 4 ++++ src/arch/arm64/Makefile.inc | 8 ++++++++ src/arch/mips/Makefile.inc | 4 ++++ src/arch/riscv/Makefile.inc | 4 ++++ 5 files changed, 66 insertions(+) diff --git a/Makefile.inc b/Makefile.inc index 68012d9..d6a4d13 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -842,6 +842,52 @@ board_id-type := raw $(obj)/board_id: printf $(CONFIG_BOARD_ID_STRING) > $@ +# Ensure that no payload segment overlaps with memory regions used by ramstage +# (not for x86 since it can relocate itself in that case) +ifneq ($(CONFIG_ARCH_X86),y) +check-ramstage-overlap-regions := ramstage +check-ramstage-overlap-files := +ifneq ($(CONFIG_PAYLOAD_NONE),y) +check-ramstage-overlap-files += $(CONFIG_CBFS_PREFIX)/payload +endif + +# will output one or more lines of "<load address in hex> <memlen in decimal>" +cbfs-get-segments-cmd = $(CBFSTOOL) $(obj)/coreboot.pre print -v | sed -n \ + '\%$(1)%,\%^[^ ]\{4\}%s% .*load: $0x[0-9a-fA-F]*$,.*length: [0-9]*/$[0-9]*$.*%\1 \2%p' + +ramstage-symbol-addr-cmd = $(OBJDUMP_ramstage) -t $(objcbfs)/ramstage.elf | \ + sed -n '/ $(1)$$/s/^$[0-9a-fA-F]*$ .*/0x\1/p' + +check-ramstage-overlaps: $(obj)/coreboot.pre + programs=$$($(foreach file,$(check-ramstage-overlap-files), \ + $(call cbfs-get-segments-cmd,$(file)) ; )) ; \ + regions=$$($(foreach region,$(check-ramstage-overlap-regions), \ + echo $(region) ; \ + $(call ramstage-symbol-addr-cmd,_$(region)) ; \ + $(call ramstage-symbol-addr-cmd,_e$(region)) ; )) ; \ + pstart= ; pend= ; \ + for x in $$programs; do \ + if [ -z $$pstart ]; then pstart=$$(($$x)) ; continue ; fi ; \ + pend=$$(($$pstart + $$x)) ; \ + rname= ; rstart= ; rend= ; \ + for y in $$regions ; do \ + if [ -z $$rname ]; then rname=$$y ; continue ; fi ; \ + if [ -z $$rstart ]; then rstart=$$(($$y)) ; continue ; fi ; \ + rend=$$(($$y)) ; \ + if [ $$pstart -lt $$rend -a $$rstart -lt $$pend ]; then \ + echo "ERROR: Ramstage region _$$rname overlapped by:" \ + $(check-ramstage-overlap-files) ; \ + exit 1 ; \ + fi ; \ + rname= ; rstart= ; rend= ; \ + done ; \ + pstart= ; pend= ; \ + done + +INTERMEDIATE+=check-ramstage-overlaps +PHONY+=check-ramstage-overlaps +endif + junit.xml: echo "Building $(UTIL)" echo '<?xml version="1.0" encoding="utf-8"?><testsuite>' > $@.tmp diff --git a/src/arch/arm/Makefile.inc b/src/arch/arm/Makefile.inc index b04a3db..d9c88c0 100644 --- a/src/arch/arm/Makefile.inc +++ b/src/arch/arm/Makefile.inc @@ -25,6 +25,10 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM),y) CBFSTOOL_PRE1_OPTS = -m arm -s $(CONFIG_CBFS_SIZE) endif +ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM),y) +check-ramstage-overlap-regions += postram_cbfs_cache stack ttb +endif + ifeq ($(CONFIG_ARCH_ARM),y) subdirs-y += libgcc/ subdirs-y += armv4/ armv7/ diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc index f44ee51..dffdd9c 100644 --- a/src/arch/arm64/Makefile.inc +++ b/src/arch/arm64/Makefile.inc @@ -33,6 +33,10 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM64),y) CBFSTOOL_PRE1_OPTS = -m arm64 -s $(CONFIG_CBFS_SIZE) endif +ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM64),y) +check-ramstage-overlap-regions += postram_cbfs_cache stack ttb +endif + ################################################################################ # bootblock ################################################################################ @@ -182,6 +186,8 @@ $(BL31_CBFS)-type := stage $(BL31_CBFS)-compression := $(CBFS_COMPRESS_FLAG) cbfs-files-y += $(BL31_CBFS) +check-ramstage-overlap-files += $(BL31_CBFS) + ifeq ($(CONFIG_ARM64_USE_SECURE_OS),y) SECURE_OS_FILE := $(CONFIG_ARM64_SECURE_OS_FILE) @@ -190,6 +196,8 @@ $(SECURE_OS_FILE_CBFS)-file := $(SECURE_OS_FILE) $(SECURE_OS_FILE_CBFS)-type := stage cbfs-files-y += $(SECURE_OS_FILE_CBFS) +check-ramstage-overlap-files += $(SECURE_OS_FILE_CBFS) + endif # CONFIG_ARM64_USE_SECURE_OS endif # CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE diff --git a/src/arch/mips/Makefile.inc b/src/arch/mips/Makefile.inc index a037525..0901388 100644 --- a/src/arch/mips/Makefile.inc +++ b/src/arch/mips/Makefile.inc @@ -22,6 +22,10 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_MIPS),y) CBFSTOOL_PRE1_OPTS = -m mips -s $(CONFIG_CBFS_SIZE) endif +ifeq ($(CONFIG_ARCH_RAMSTAGE_MIPS),y) +check-ramstage-overlap-regions += stack +endif + ############################################################################### # bootblock ############################################################################### diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc index 2d4d7e6..4abaf58 100644 --- a/src/arch/riscv/Makefile.inc +++ b/src/arch/riscv/Makefile.inc @@ -19,6 +19,10 @@ riscv_flags = -I$(src)/arch/riscv/ riscv_asm_flags = +ifeq ($(CONFIG_ARCH_RAMSTAGE_RISCV),y) +check-ramstage-overlap-regions += stack +endif + ################################################################################ ## bootblock ################################################################################

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New patch to review for coreboot: Makefile: Build-time overlap check for programs loaded after coreboot
by Julius Werner 08 Mar '16

08 Mar '16

Julius Werner (jwerner(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13949 -gerrit commit ca95f8d60b07d69b6098987a821f090c070aaef1 Author: Julius Werner <jwerner(a)chromium.org> Date: Mon Mar 7 17:55:43 2016 -0800 Makefile: Build-time overlap check for programs loaded after coreboot On non-x86 platforms, coreboot uses the memlayout.ld mechanism to statically allocate the different memory regions it needs and guarantee at build time that there are no dangerous overlaps between them. At the end of its (ramstage) execution, however, it usually loads a payload (and possibly other platform-specific components) that is not integrated into the coreboot build system and therefore cannot provide the same overlap guarantees through memlayout.ld. This creates a dangerous memory hazard where a new component could be loaded over memory areas that are still in use by the code-loading ramstage and lead to arbitrary memory corruption bugs. This patch fixes this hole in our build-time correctness guarantees by adding the necessary checks as a new intermediate Makefile target on route to assembling the final image. It will parse the memory footprint information of the payload (and other platform-specific post-ramstage components) from CBFS and compare it to a list of memory areas known to be still in use during late ramstage, generating a build failure in case of a possible hazard. BUG=chrome-os-partner:48008 TEST=Built Oak while moving critical regions in the way of BL31 or the payload, observing the desired build-time errors. Built Nyan, Jerry and Falco without issues for good measure. Change-Id: I3ebd2c1caa4df959421265e26f9cab2c54909b68 Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- Makefile.inc | 46 +++++++++++++++++++++++++++++++++++++++++++++ src/arch/arm/Makefile.inc | 4 ++++ src/arch/arm64/Makefile.inc | 8 ++++++++ src/arch/mips/Makefile.inc | 4 ++++ src/arch/riscv/Makefile.inc | 4 ++++ 5 files changed, 66 insertions(+) diff --git a/Makefile.inc b/Makefile.inc index 68012d9..d6a4d13 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -842,6 +842,52 @@ board_id-type := raw $(obj)/board_id: printf $(CONFIG_BOARD_ID_STRING) > $@ +# Ensure that no payload segment overlaps with memory regions used by ramstage +# (not for x86 since it can relocate itself in that case) +ifneq ($(CONFIG_ARCH_X86),y) +check-ramstage-overlap-regions := ramstage +check-ramstage-overlap-files := +ifneq ($(CONFIG_PAYLOAD_NONE),y) +check-ramstage-overlap-files += $(CONFIG_CBFS_PREFIX)/payload +endif + +# will output one or more lines of "<load address in hex> <memlen in decimal>" +cbfs-get-segments-cmd = $(CBFSTOOL) $(obj)/coreboot.pre print -v | sed -n \ + '\%$(1)%,\%^[^ ]\{4\}%s% .*load: $0x[0-9a-fA-F]*$,.*length: [0-9]*/$[0-9]*$.*%\1 \2%p' + +ramstage-symbol-addr-cmd = $(OBJDUMP_ramstage) -t $(objcbfs)/ramstage.elf | \ + sed -n '/ $(1)$$/s/^$[0-9a-fA-F]*$ .*/0x\1/p' + +check-ramstage-overlaps: $(obj)/coreboot.pre + programs=$$($(foreach file,$(check-ramstage-overlap-files), \ + $(call cbfs-get-segments-cmd,$(file)) ; )) ; \ + regions=$$($(foreach region,$(check-ramstage-overlap-regions), \ + echo $(region) ; \ + $(call ramstage-symbol-addr-cmd,_$(region)) ; \ + $(call ramstage-symbol-addr-cmd,_e$(region)) ; )) ; \ + pstart= ; pend= ; \ + for x in $$programs; do \ + if [ -z $$pstart ]; then pstart=$$(($$x)) ; continue ; fi ; \ + pend=$$(($$pstart + $$x)) ; \ + rname= ; rstart= ; rend= ; \ + for y in $$regions ; do \ + if [ -z $$rname ]; then rname=$$y ; continue ; fi ; \ + if [ -z $$rstart ]; then rstart=$$(($$y)) ; continue ; fi ; \ + rend=$$(($$y)) ; \ + if [ $$pstart -lt $$rend -a $$rstart -lt $$pend ]; then \ + echo "ERROR: Ramstage region _$$rname overlapped by:" \ + $(check-ramstage-overlap-files) ; \ + exit 1 ; \ + fi ; \ + rname= ; rstart= ; rend= ; \ + done ; \ + pstart= ; pend= ; \ + done + +INTERMEDIATE+=check-ramstage-overlaps +PHONY+=check-ramstage-overlaps +endif + junit.xml: echo "Building $(UTIL)" echo '<?xml version="1.0" encoding="utf-8"?><testsuite>' > $@.tmp diff --git a/src/arch/arm/Makefile.inc b/src/arch/arm/Makefile.inc index b04a3db..d9c88c0 100644 --- a/src/arch/arm/Makefile.inc +++ b/src/arch/arm/Makefile.inc @@ -25,6 +25,10 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM),y) CBFSTOOL_PRE1_OPTS = -m arm -s $(CONFIG_CBFS_SIZE) endif +ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM),y) +check-ramstage-overlap-regions += postram_cbfs_cache stack ttb +endif + ifeq ($(CONFIG_ARCH_ARM),y) subdirs-y += libgcc/ subdirs-y += armv4/ armv7/ diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc index f44ee51..dffdd9c 100644 --- a/src/arch/arm64/Makefile.inc +++ b/src/arch/arm64/Makefile.inc @@ -33,6 +33,10 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM64),y) CBFSTOOL_PRE1_OPTS = -m arm64 -s $(CONFIG_CBFS_SIZE) endif +ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM64),y) +check-ramstage-overlap-regions += postram_cbfs_cache stack ttb +endif + ################################################################################ # bootblock ################################################################################ @@ -182,6 +186,8 @@ $(BL31_CBFS)-type := stage $(BL31_CBFS)-compression := $(CBFS_COMPRESS_FLAG) cbfs-files-y += $(BL31_CBFS) +check-ramstage-overlap-files += $(BL31_CBFS) + ifeq ($(CONFIG_ARM64_USE_SECURE_OS),y) SECURE_OS_FILE := $(CONFIG_ARM64_SECURE_OS_FILE) @@ -190,6 +196,8 @@ $(SECURE_OS_FILE_CBFS)-file := $(SECURE_OS_FILE) $(SECURE_OS_FILE_CBFS)-type := stage cbfs-files-y += $(SECURE_OS_FILE_CBFS) +check-ramstage-overlap-files += $(SECURE_OS_FILE_CBFS) + endif # CONFIG_ARM64_USE_SECURE_OS endif # CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE diff --git a/src/arch/mips/Makefile.inc b/src/arch/mips/Makefile.inc index a037525..0901388 100644 --- a/src/arch/mips/Makefile.inc +++ b/src/arch/mips/Makefile.inc @@ -22,6 +22,10 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_MIPS),y) CBFSTOOL_PRE1_OPTS = -m mips -s $(CONFIG_CBFS_SIZE) endif +ifeq ($(CONFIG_ARCH_RAMSTAGE_MIPS),y) +check-ramstage-overlap-regions += stack +endif + ############################################################################### # bootblock ############################################################################### diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc index 2d4d7e6..4abaf58 100644 --- a/src/arch/riscv/Makefile.inc +++ b/src/arch/riscv/Makefile.inc @@ -19,6 +19,10 @@ riscv_flags = -I$(src)/arch/riscv/ riscv_asm_flags = +ifeq ($(CONFIG_ARCH_RAMSTAGE_RISCV),y) +check-ramstage-overlap-regions += stack +endif + ################################################################################ ## bootblock ################################################################################

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New patch to review for coreboot: payloads/external/Makefile.inc: Don't rebuild SeaBIOS every time
by Martin Roth 08 Mar '16

08 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13948 -gerrit commit 9b5ae51326f66eea2089bf83ea03ef8bc6d496d0 Author: Martin Roth <martinroth(a)google.com> Date: Mon Mar 7 22:04:01 2016 -0700 payloads/external/Makefile.inc: Don't rebuild SeaBIOS every time Previously, if SeaBIOS was set as the payload, it would get rebuilt every single time we did a build. This changes it to re-build just when there's a config change. Change-Id: Ib141f2cbf8796d449172432bb30fa4806cf90328 Signed-off-by: Martin Roth <martinroth(a)google.com> --- payloads/external/Makefile.inc | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/payloads/external/Makefile.inc b/payloads/external/Makefile.inc index 557de2a..bbad643 100644 --- a/payloads/external/Makefile.inc +++ b/payloads/external/Makefile.inc @@ -35,10 +35,11 @@ payload_revision-file := $(PAYLOAD_VERSION) payload_revision-type := raw SEABIOS_CC_OFFSET=$(if $(filter %ccache,$(HOSTCC)),2,1) -seabios: +payloads/external/SeaBIOS/seabios/out/bios.bin.elf seabios: $(top)/$(DOTCONFIG) $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ - CC=$(word $(SEABIOS_CC_OFFSET),$(CC_x86_32)) CFLAGS="$(patsubst $(word $(SEABIOS_CC_OFFSET),$(CC_x86_32))%,,$(wordlist $(SEABIOS_CC_OFFSET),9999,$(CC_x86_32)))" \ + CC=$(word $(SEABIOS_CC_OFFSET),$(CC_x86_32)) \ + CFLAGS="$(patsubst $(word $(SEABIOS_CC_OFFSET),$(CC_x86_32))%,,$(wordlist $(SEABIOS_CC_OFFSET),9999,$(CC_x86_32)))" \ LD=$(word 1,$(LD_x86_32)) LDFLAGS="$(patsubst $(word 1,$(LD_x86_32))%,,$(LD_x86_32))" \ OBJDUMP="$(OBJDUMP_x86_32)" \ OBJCOPY="$(OBJCOPY_x86_32)" STRIP="$(STRIP_x86_32)" \ @@ -53,9 +54,8 @@ seabios: CONFIG_TTYS0_BASE=$(CONFIG_TTYS0_BASE) payloads/external/SeaBIOS/seabios/out/vgabios.bin: seabios -payloads/external/SeaBIOS/seabios/out/bios.bin.elf: seabios -payloads/external/SeaBIOS/seabios/.config: seabios -payloads/external/SeaBIOS/seabios/out/autoversion.h: seabios +payloads/external/SeaBIOS/seabios/.config: payloads/external/SeaBIOS/seabios/out/bios.bin.elf +payloads/external/SeaBIOS/seabios/out/autoversion.h: payloads/external/SeaBIOS/seabios/out/bios.bin.elf filo: $(MAKE) -C payloads/external/FILO -f Makefile.inc \

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New patch to review for coreboot: SeaBIOS: Update SeaBIOS from repo when using master branch
by Martin Roth 08 Mar '16

08 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13947 -gerrit commit 5c2bc501de3f8fec9a28fa9797a4602cbd4b8b78 Author: Martin Roth <martinroth(a)google.com> Date: Mon Mar 7 21:56:24 2016 -0700 SeaBIOS: Update SeaBIOS from repo when using master branch Previously the SeaBIOS directory would never get updated after the initial clone because the tag would always match. This can be shown by noticing that the text 'Fetching new commits from the SeaBIOS git repo' is never seen. This change will always try to pull the latest code if 'Master' is selected. Change-Id: I460e2fb0c6f683a0f85343d164880c2d9e6d95cc Signed-off-by: Martin Roth <martinroth(a)google.com> --- payloads/external/SeaBIOS/Makefile.inc | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/payloads/external/SeaBIOS/Makefile.inc b/payloads/external/SeaBIOS/Makefile.inc index e478a09..128b0c8 100644 --- a/payloads/external/SeaBIOS/Makefile.inc +++ b/payloads/external/SeaBIOS/Makefile.inc @@ -15,8 +15,10 @@ seabios: git clone http://review.coreboot.org/p/seabios.git seabios fetch: seabios - cd seabios; git show $(TAG-y) >/dev/null 2>&1 ; if [ $$? -ne 0 ]; \ - then echo " Fetching new commits from the SeaBIOS git repo"; git fetch; fi + cd seabios; git show $(TAG-y) >/dev/null 2>&1 ; if [ $$? -ne 0 ] || \ + [ "$(TAG-y)" = "origin/master" ]; then \ + echo " Fetching new commits from the SeaBIOS git repo"; \ + git fetch; fi checkout: fetch echo " Checking out SeaBIOS revision $(TAG-y)"

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New patch to review for coreboot: payloads: Move secondary payloads inside of a submenu
by Martin Roth 08 Mar '16

08 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13941 -gerrit commit 598672e91687c61616269e9ce9e3e91d621ba613 Author: Martin Roth <martinroth(a)google.com> Date: Mon Mar 7 19:21:45 2016 -0700 payloads: Move secondary payloads inside of a submenu To keep the list of 'secondary' payloads from cluttering the payloads menu, move them into their own menu under the payloads menu. Then they don't need any dependencies other than the architecture. Change-Id: I95119750c6ef627ef0de9b5f5cbad085a51ac2bb Signed-off-by: Martin Roth <martinroth(a)google.com> --- payloads/Kconfig | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/payloads/Kconfig b/payloads/Kconfig index 6ae2ecd..c7b9e2a 100644 --- a/payloads/Kconfig +++ b/payloads/Kconfig @@ -59,6 +59,8 @@ config PAYLOAD_IS_FLAT_BINARY Add the payload to cbfs as a flat binary type instead of as an elf payload +menu "Secondary Payloads" + config COREINFO_SECONDARY_PAYLOAD bool "Load coreinfo as a secondary payload" default n @@ -70,9 +72,10 @@ config COREINFO_SECONDARY_PAYLOAD config MEMTEST_SECONDARY_PAYLOAD bool "Load Memtest86+ as a secondary payload" default n - depends on ARCH_X86 && !PAYLOAD_NONE + depends on ARCH_X86 help Memtest86+ can be loaded as a secondary payload under SeaBIOS, GRUB, or any other payload that can load additional payloads. +endmenu # "Secondary Payloads" endmenu

1 0

New patch to review for coreboot: Makefile: Update payload clean targets
by Martin Roth 08 Mar '16

08 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13940 -gerrit commit 99230c82c285ac8cfdd9af7bb2d29eae64c33659 Author: Martin Roth <martinroth(a)google.com> Date: Mon Mar 7 16:38:52 2016 -0700 Makefile: Update payload clean targets Move payload clean targets into payloads/Makefile.inc Add clean targets for coreinfo, nvramcui, Memtest86Plus Change-Id: I70c13582311dfba3e309805053159f8a039cb109 Signed-off-by: Martin Roth <martinroth(a)google.com> --- Makefile | 3 ++- Makefile.inc | 4 +--- payloads/Makefile.inc | 17 +++++++++++++++++ 3 files changed, 20 insertions(+), 4 deletions(-) diff --git a/Makefile b/Makefile index 6b4edbb..4380d97 100644 --- a/Makefile +++ b/Makefile @@ -132,6 +132,7 @@ endif ifeq ($(NOCOMPILE),1) include $(TOPLEVEL)/Makefile.inc +include $(TOPLEVEL)/payloads/Makefile.inc real-all: config else @@ -321,7 +322,7 @@ clean-cscope: clean-ctags: rm -f tags -distclean: clean clean-ctags clean-cscope +distclean: clean clean-ctags clean-cscope distclean-payloads rm -f .config .config.old ..config.tmp .kconfig.d .tmpconfig* .ccwrap .xcompile .PHONY: $(PHONY) clean clean-for-update clean-cscope cscope distclean doxygen doxy doxygen_simple diff --git a/Makefile.inc b/Makefile.inc index 7ed229e..bde7d15 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -445,7 +445,7 @@ $(objgenerated)/libverstage.a: $$(libverstage-objs) clean-abuild: rm -rf coreboot-builds -clean-for-update-target: +clean-for-update-target: clean-payloads rm -f $(obj)/ramstage?* $(obj)/coreboot.romstage $(obj)/coreboot.pre* $(obj)/coreboot.bootblock $(obj)/coreboot.a rm -rf $(obj)/bootblock?* $(obj)/romstage?* $(obj)/location.* rm -f $(obj)/option_table.* $(obj)/crt0.S $(obj)/ldscript @@ -454,8 +454,6 @@ clean-for-update-target: rm -f $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc rm -f $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.* $(obj)/dsdt.* rm -f $(obj)/cpu/x86/smm/smm_bin.c $(obj)/cpu/x86/smm/smm.* $(obj)/cpu/x86/smm/smm - $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean - $(MAKE) -C payloads/external/U-Boot -f Makefile.inc clean clean-target: rm -f $(obj)/coreboot* diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc index 1bd8cf7..4269715 100644 --- a/payloads/Makefile.inc +++ b/payloads/Makefile.inc @@ -19,3 +19,20 @@ img/coreinfo-type := payload payloads/coreinfo/build/coreinfo.elf coreinfo: $(MAKE) -C payloads/coreinfo defaultbuild + +clean-payloads: + $(MAKE) -C payloads/coreinfo clean + $(MAKE) -C payloads/libpayload clean + $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean + $(MAKE) -C payloads/external/U-Boot -f Makefile.inc clean + $(MAKE) -C payloads/external/Memtest86Plus -f Makefile.inc clean + + +distclean-payloads: + $(MAKE) -C payloads/coreinfo distclean + $(MAKE) -C payloads/libpayload distclean + $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc distclean + $(MAKE) -C payloads/external/U-Boot -f Makefile.inc distclean + $(MAKE) -C payloads/external/Memtest86Plus -f Makefile.inc distclean + +.phony: clean-payloads distclean-payloads

1 0

New patch to review for coreboot: nvramcui: Add distclean target
by Martin Roth 08 Mar '16

08 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13939 -gerrit commit daa0648ac3d57127a73742b8f30ac65ffafa481e Author: Martin Roth <martinroth(a)google.com> Date: Mon Mar 7 16:40:14 2016 -0700 nvramcui: Add distclean target This doesn't do anything more than the clean target, but having both clean and distclean targets in all makefiles makes standardizing the cleaning routines easier. Change-Id: I41578de371a8f767ee23266c30e65e928f0985c4 Signed-off-by: Martin Roth <martinroth(a)google.com> --- payloads/nvramcui/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/payloads/nvramcui/Makefile b/payloads/nvramcui/Makefile index 73bcf78..10dc362 100755 --- a/payloads/nvramcui/Makefile +++ b/payloads/nvramcui/Makefile @@ -8,3 +8,5 @@ all: nvramcui.elf .PHONY: clean: rm -f nvramcui.elf + +distclean: clean

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