coreboot-gerrit March 2016

coreboot-gerrit@coreboot.org

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New patch to review for coreboot: coreinfo: Remove .xcompile when doing a clean
by Martin Roth 08 Mar '16

08 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13965 -gerrit commit a1adba2b879e216093a8f1c476c4e8c893d43292 Author: Martin Roth <martinroth(a)google.com> Date: Tue Mar 8 12:29:33 2016 -0700 coreinfo: Remove .xcompile when doing a clean Change-Id: I3e719e105c4bacd5e02e055d3f00650a1e126656 Signed-off-by: Martin Roth <martinroth(a)google.com> --- payloads/coreinfo/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/payloads/coreinfo/Makefile b/payloads/coreinfo/Makefile index c9f5c10..0ef8094 100644 --- a/payloads/coreinfo/Makefile +++ b/payloads/coreinfo/Makefile @@ -127,7 +127,7 @@ $(obj)/config.h: $(shell mkdir -p $(obj) $(objk)/lxdialog $(KCONFIG_SPLITCONFIG)) clean: - rm -rf build/*.elf build/*.o + rm -rf build/*.elf build/*.o .xcompile distclean: clean rm -rf build

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Patch set updated for coreboot: coreinfo/Makefile: change $(obj) to $(coreinfo_obj)
by Martin Roth 08 Mar '16

08 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13938 -gerrit commit 2fb6d6c74a782b316a0a8ec9ca48487d82f6fb89 Author: Martin Roth <martinroth(a)google.com> Date: Mon Mar 7 16:26:51 2016 -0700 coreinfo/Makefile: change $(obj) to $(coreinfo_obj) - Rename obj to coreinfo_obj so it doesn't conflict with the obj variable in libpayload. Change-Id: I2ffb06a87e30a5eeff5b0dfc0ba62b5e9ab46e26 Signed-off-by: Martin Roth <martinroth(a)google.com> --- payloads/coreinfo/Makefile | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/payloads/coreinfo/Makefile b/payloads/coreinfo/Makefile index 0ef8094..efbf75e 100644 --- a/payloads/coreinfo/Makefile +++ b/payloads/coreinfo/Makefile @@ -17,15 +17,15 @@ src := $(shell pwd) srctree := $(src) srck := $(src)/../../util/kconfig -obj := $(src)/build +coreinfo_obj := $(src)/build objk := $(src)/build/util/kconfig export KERNELVERSION := 0.1.0 -export KCONFIG_AUTOHEADER := $(obj)/config.h -export KCONFIG_AUTOCONFIG := $(obj)/auto.conf -export KCONFIG_DEPENDENCIES := $(obj)/auto.conf.cmd -export KCONFIG_SPLITCONFIG := $(obj)/config -export KCONFIG_TRISTATE := $(obj)/tristate.conf +export KCONFIG_AUTOHEADER := $(coreinfo_obj)/config.h +export KCONFIG_AUTOCONFIG := $(coreinfo_obj)/auto.conf +export KCONFIG_DEPENDENCIES := $(coreinfo_obj)/auto.conf.cmd +export KCONFIG_SPLITCONFIG := $(coreinfo_obj)/config +export KCONFIG_TRISTATE := $(coreinfo_obj)/tristate.conf export KCONFIG_NEGATIVES := 1 export Kconfig := Kconfig @@ -53,12 +53,12 @@ HAVE_LIBPAYLOAD := $(wildcard $(LIBPAYLOAD_DIR)/libpayload/lib/libpayload.a) LIB_CONFIG ?= defconfig OBJCOPY ?= objcopy -INCLUDES = -I$(obj) -include $(LIBPAYLOAD_DIR)/libpayload/include/kconfig.h +INCLUDES = -I$(coreinfo_obj) -include $(LIBPAYLOAD_DIR)/libpayload/include/kconfig.h OBJECTS = cpuinfo_module.o cpuid.S.o pci_module.o coreboot_module.o \ nvram_module.o bootlog_module.o ramdump_module.o lar_module.o \ multiboot_module.o cbfs_module.o coreinfo.o -OBJS = $(patsubst %,$(obj)/%,$(OBJECTS)) -TARGET = $(obj)/coreinfo.elf +OBJS = $(patsubst %,$(coreinfo_obj)/%,$(OBJECTS)) +TARGET = $(coreinfo_obj)/coreinfo.elf all: real-all @@ -87,18 +87,18 @@ ifneq ($(strip $(HAVE_DOTCONFIG)),) include $(src)/.config real-all: $(TARGET) -$(TARGET): $(src)/.config $(obj)/config.h $(OBJS) libpayload +$(TARGET): $(src)/.config $(coreinfo_obj)/config.h $(OBJS) libpayload printf " LPCC $(subst $(shell pwd)/,,$(@)) (LINK)\n" $(LPCC) -o $@ $(OBJS) $(OBJCOPY) --only-keep-debug $@ $(TARGET).debug $(OBJCOPY) --strip-debug $@ $(OBJCOPY) --add-gnu-debuglink=$(TARGET).debug $@ -$(obj)/%.S.o: $(src)/%.S libpayload +$(coreinfo_obj)/%.S.o: $(src)/%.S libpayload printf " LPAS $(subst $(shell pwd)/,,$(@))\n" $(LPAS) -o $@ $< -$(obj)/%.o: $(src)/%.c libpayload +$(coreinfo_obj)/%.o: $(src)/%.c libpayload printf " LPCC $(subst $(shell pwd)/,,$(@))\n" $(LPCC) $(CFLAGS) -c -o $@ $< @@ -121,10 +121,10 @@ libpayload: $(MAKE) -C $(LIBCONFIG_PATH) DESTDIR=$(shell pwd)/$(LIBPAYLOAD_DIR) install endif -$(obj)/config.h: +$(coreinfo_obj)/config.h: $(MAKE) oldconfig -$(shell mkdir -p $(obj) $(objk)/lxdialog $(KCONFIG_SPLITCONFIG)) +$(shell mkdir -p $(coreinfo_obj) $(objk)/lxdialog $(KCONFIG_SPLITCONFIG)) clean: rm -rf build/*.elf build/*.o .xcompile

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New patch to review for coreboot: src/lib/trace.c: Make address size generic
by Martin Roth 08 Mar '16

08 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13962 -gerrit commit da39aa8ef0bf8953d13bab4f6287d1f3071a908d Author: Martin Roth <martinroth(a)google.com> Date: Tue Mar 8 12:17:44 2016 -0700 src/lib/trace.c: Make address size generic On platforms that didn't use 32-bit addresses, enabling the CONFIG_TRACE option (Trace function calls) would break the build due to a cast from a pointer of a different size. This fixes this warning: src/lib/trace.c:29:58: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] Change-Id: Iaab13c1891b6af7559ea6982ecc6e74c09dd0395 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/lib/trace.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/lib/trace.c b/src/lib/trace.c index 8c29ab3..8f52331 100644 --- a/src/lib/trace.c +++ b/src/lib/trace.c @@ -26,7 +26,7 @@ void __cyg_profile_func_enter( void *func, void *callsite) return; DISABLE_TRACE - printk(BIOS_INFO, "~0x%08x(0x%08x)\n", (uint32_t) func, (uint32_t) callsite); + printk(BIOS_INFO, "~0x%p(0x%p)\n", func, callsite); ENABLE_TRACE }

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New patch to review for coreboot: crosgcc/buildgcc: Update for recent arch additions
by Martin Roth 08 Mar '16

08 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13961 -gerrit commit e996bfc40daa2601902be4dc2cc1ac238ad1a218 Author: Martin Roth <martinroth(a)google.com> Date: Tue Mar 8 12:07:04 2016 -0700 crosgcc/buildgcc: Update for recent arch additions - Add powerpc64le-linux-gnu & nds32le-elf to the instructions as supported architectures - Add nds32le-elf as a supported architecture so it will stop warning when you build it. Change-Id: Ifcdbc3d082eae5b9b5f8828914e7d2b7ed1f13a4 Signed-off-by: Martin Roth <martinroth(a)google.com> --- util/crossgcc/buildgcc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index df9ac4a..9266597 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -340,7 +340,8 @@ myhelp() printf " (defaults to $TARGETARCH)\n" printf " [-S|--scripting] build scripting support for GDB\n\n" printf "Platforms for GCC & GDB:\n" - printf " x86_64 i386-elf i386-mingw32 mipsel-elf riscv-elf arm aarch64\n\n" + printf " x86_64 i386-elf i386-mingw32 mipsel-elf riscv-elf arm aarch64\n" + printf " powerpc64le-linux-gnu nds32le-elf\n\n } printversion() { @@ -624,6 +625,7 @@ case "$TARGETARCH" in i386*) TARGETARCH=i386-elf;; arm*) TARGETARCH=arm-eabi;; aarch64*) TARGETARCH=aarch64-elf;; + nds32le-elf) ;; *) printf "${red}WARNING: Unsupported architecture $TARGETARCH.${NC}\n\n"; ;; esac

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Patch set updated for coreboot: mainboard/skylake: Include WRDD method in WIFI ACPI device
by Patrick Georgi 08 Mar '16

08 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13840 -gerrit commit 18ce45b4d30027f9472ce74df18cc10cbbf5bd70 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Thu Feb 25 08:49:00 2016 -0800 mainboard/skylake: Include WRDD method in WIFI ACPI device Include the code to add the WRDD method to the existing WiFi Device in the mainboard ACPI code. BUG=chrome-os-partner:50516 BRANCH=glados TEST=boot on chell with 'region'='us' in VPD and see that it is properly read out by calling WRDD method on the WiFi device. Compile for the other platforms that are modified. Change-Id: Ibcff7585744071ba9018d0ba50e274e63365b150 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Original-Commit-Id: b74bb553415f7ce224ddcb0c2c5ae509b8fed516 Original-Change-Id: Ieb24e0e64974ee3686d14a234e148f5d07fc8b12 Original-Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/329296 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> --- src/mainboard/google/chell/acpi/mainboard.asl | 2 ++ src/mainboard/google/glados/acpi/mainboard.asl | 2 ++ src/mainboard/google/lars/acpi/mainboard.asl | 2 ++ src/mainboard/intel/kunimitsu/acpi/mainboard.asl | 2 ++ 4 files changed, 8 insertions(+) diff --git a/src/mainboard/google/chell/acpi/mainboard.asl b/src/mainboard/google/chell/acpi/mainboard.asl index 0714582..a7c7bfe 100644 --- a/src/mainboard/google/chell/acpi/mainboard.asl +++ b/src/mainboard/google/chell/acpi/mainboard.asl @@ -64,6 +64,8 @@ Scope (\_SB.PCI0.RP01) Name (_ADR, 0x00000000) Name (_DDN, "Wireless LAN") Name (_PRW, Package () { GPE_WLAN_WAKE, 3 }) + + #include <drivers/intel/wifi/acpi/wrdd.asl> } } diff --git a/src/mainboard/google/glados/acpi/mainboard.asl b/src/mainboard/google/glados/acpi/mainboard.asl index 1b37329..3fbe332 100644 --- a/src/mainboard/google/glados/acpi/mainboard.asl +++ b/src/mainboard/google/glados/acpi/mainboard.asl @@ -63,6 +63,8 @@ Scope (\_SB.PCI0.RP01) Name (_ADR, 0x00000000) Name (_DDN, "Wireless LAN") Name (_PRW, Package () { GPE_WLAN_WAKE, 3 }) + + #include <drivers/intel/wifi/acpi/wrdd.asl> } } diff --git a/src/mainboard/google/lars/acpi/mainboard.asl b/src/mainboard/google/lars/acpi/mainboard.asl index e8397a1..d6299a5 100644 --- a/src/mainboard/google/lars/acpi/mainboard.asl +++ b/src/mainboard/google/lars/acpi/mainboard.asl @@ -104,6 +104,8 @@ Scope (\_SB.PCI0.RP01) Name (_ADR, 0x00000000) Name (_DDN, "Wireless LAN") Name (_PRW, Package () { GPE_WLAN_WAKE, 3 }) + + #include <drivers/intel/wifi/acpi/wrdd.asl> } } diff --git a/src/mainboard/intel/kunimitsu/acpi/mainboard.asl b/src/mainboard/intel/kunimitsu/acpi/mainboard.asl index 8692c58..f44e362 100644 --- a/src/mainboard/intel/kunimitsu/acpi/mainboard.asl +++ b/src/mainboard/intel/kunimitsu/acpi/mainboard.asl @@ -108,6 +108,8 @@ Scope (\_SB.PCI0.RP01) Name (_ADR, 0x00000000) Name (_DDN, "Wireless LAN") Name (_PRW, Package () { GPE_WLAN_WAKE, 3 }) + + #include <drivers/intel/wifi/acpi/wrdd.asl> } }

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Patch merged into coreboot/master: skylake: Add and fill out CID1 NVS field
by gerrit＠coreboot.org 08 Mar '16

08 Mar '16

the following patch was just integrated into master: commit 3d3b76b8321ea2106e2bd2595097accbf6ac9eb9 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Thu Feb 25 08:45:43 2016 -0800 skylake: Add and fill out CID1 NVS field Add a country identifier field to NVS and populate it with the call to wifi_regulatory_domain() which will (by default) do a lookup for the 'region' identifier in VPD on a Chrome OS device. BUG=chrome-os-partner:50516 BRANCH=glados TEST=build and boot on chell Change-Id: Ie7531848e620095732772c22156a85b7f8a6df5c Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Original-Commit-Id: dafdb3760a0302e3effdc0e83977c1bfd5c9d3b2 Original-Change-Id: Ic83ab008045a469d0e0756f7e4d42f1b3894c529 Original-Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/329295 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://review.coreboot.org/13839 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/13839 for details. -gerrit

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Patch merged into coreboot/master: intel/wifi: Add WRDD ACPI method
by gerrit＠coreboot.org 08 Mar '16

08 Mar '16

the following patch was just integrated into master: commit 8951ed8b90532d3016a677b5a9a2fb6d9f97ff6a Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Thu Feb 25 08:44:06 2016 -0800 intel/wifi: Add WRDD ACPI method Add an ACPI file containing a generic WRDD method that is used by Intel wireless kernel drivers to determine the country code to be used for regulatory domain configuration of the wireless radios. This requires an NVS variable called 'CID1' to provide an ISO-3166-2 alpha-2 country code or it will just return 0 instead. This is implemented as a bare method because this needs to be included directly into the wifi device that is defined by the mainboard as it may have board-specific settings like _PRW that need to be provided as well. BUG=chrome-os-partner:50516 BRANCH=glados TEST=boot on chell with 'region'='us' in VPD and see that it is properly read out by calling WRDD method on the WiFi device. Change-Id: I27a5e27f65d05ff62a0e79a87a32c1ef0c5d0ef3 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Original-Commit-Id: 2da0cf76ca3cc5e3dfbc4a0859733523de780cf5 Original-Change-Id: I9d83c3938cceafc77ef8747a5c47f586ee84437e Original-Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/329294 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://review.coreboot.org/13838 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/13838 for details. -gerrit

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Patch merged into coreboot/master: Chromeos: Modify wifi_regulatory_domain to use "region" key in VPD
by gerrit＠coreboot.org 08 Mar '16

08 Mar '16

the following patch was just integrated into master: commit 339886cff4f227d930c23e16db48f3cfc8eaccfc Author: Huang, Huki <huki.huang(a)intel.com> Date: Thu Jan 21 10:17:06 2016 +0800 Chromeos: Modify wifi_regulatory_domain to use "region" key in VPD In ChromeOS VPD spec the right name is "region". Signed-off-by: Hannah Williams <hannah.williams(a)intel.com> Reviewed-on: https://chromium-review.googlesource.com/322851 Reviewed-by: Hung-Te Lin <hungte(a)chromium.org> Reviewed-by: mukesh agrawal <quiche(a)chromium.org> (cherry picked from commit 21ea0663e7f3ffe3aaea6b6ce0e1216fcd9ca23e) BUG=chrome-os-partner:50516 BRANCH=glados TEST=build and boot on chell Change-Id: I4ba9a9c65af3732fa263030640495ab5bea91d1f Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Original-Commit-Id: 848f18e731eb11dd3037d12607d7364f95e64e34 Original-Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Original-Change-Id: Ib96036f9cd76449f170af5c3dd6ef6e8e91ded94 Original-Reviewed-on: https://chromium-review.googlesource.com/329293 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://review.coreboot.org/13837 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/13837 for details. -gerrit

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Patch merged into coreboot/master: lib: Implement framework for retrieving WiFi regulatory domain
by gerrit＠coreboot.org 08 Mar '16

08 Mar '16

the following patch was just integrated into master: commit 7f761658a5b1ce6cdd48202cb1b0c5d7b3b59b91 Author: Felix Durairaj <felixx.durairaj(a)intel.com> Date: Fri Nov 20 15:51:35 2015 -0800 lib: Implement framework for retrieving WiFi regulatory domain Platforms that need to initialize WRDD package with the regulatory domain information should implement function wifi_regulatory_domain. A weak implementation is provided here. Signed-off-by: fdurairx <felixx.durairaj(a)intel.com> Reviewed-on: https://chromium-review.googlesource.com/314384 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Commit-Queue: Hannah Williams <hannah.williams(a)intel.com> Tested-by: Hannah Williams <hannah.williams(a)intel.com> (cherry picked from commit c25d7221679d1fab830d614eeabfa3436bce6ac1) BUG=chrome-os-partner:50516 BRANCH=glados TEST=build and boot on chell Change-Id: I1cbdf4e940b009c74ee8ed8f4fca85f4f5c943b2 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Original-Commit-Id: 27bba336e620a2d3d331e350d4f46164e337fabc Original-Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Original-Change-Id: I84e2acd748856437b40bbf997bf23f158c711712 Original-Reviewed-on: https://chromium-review.googlesource.com/329291 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://review.coreboot.org/13836 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/13836 for details. -gerrit

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New patch to review for coreboot: drivers/intel/fsp2_0: remove struct resource usage
by Aaron Durbin 08 Mar '16

08 Mar '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13960 -gerrit commit 52d0b606513772e734e6d4934b169c4a8fc541b6 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Mar 8 11:23:52 2016 -0600 drivers/intel/fsp2_0: remove struct resource usage There's no need to use a struct resource type for fsp_find_reserved_memory(). struct resource is mainly associated with a device and that memory is added to cbmem after memory init. Other uses ins FSP 2.0 just use struct range_entry. Use that instead for consistency. Change-Id: Id7d39da1c2e23f97cdaafd7f5d281cefa6fee543 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/drivers/intel/fsp2_0/hand_off_block.c | 7 +++---- src/drivers/intel/fsp2_0/include/fsp/util.h | 3 +-- src/soc/intel/apollolake/romstage.c | 13 ++++++------- 3 files changed, 10 insertions(+), 13 deletions(-) diff --git a/src/drivers/intel/fsp2_0/hand_off_block.c b/src/drivers/intel/fsp2_0/hand_off_block.c index 3bc33af..c1f8f10 100644 --- a/src/drivers/intel/fsp2_0/hand_off_block.c +++ b/src/drivers/intel/fsp2_0/hand_off_block.c @@ -208,11 +208,11 @@ struct hob_resource *find_resource_hob_by_uuid(const struct hob_header *hob, return NULL; } -void fsp_find_reserved_memory(struct resource *res, const void *hob_list) +void fsp_find_reserved_memory(struct range_entry *re, const void *hob_list) { const struct hob_resource *fsp_mem; - memset(res, 0, sizeof(*res)); + range_entry_init(re, 0, 0, 0); fsp_mem = find_resource_hob_by_uuid(hob_list, uuid_owner_fsp); @@ -220,8 +220,7 @@ void fsp_find_reserved_memory(struct resource *res, const void *hob_list) return; } - res->base = fsp_mem->addr; - res->size = fsp_mem->length; + range_entry_init(re, fsp_mem->addr, fsp_mem->addr + fsp_mem->length, 0); } /* diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h index 69e545e..0bdcd79 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/util.h +++ b/src/drivers/intel/fsp2_0/include/fsp/util.h @@ -15,7 +15,6 @@ #include <boot/coreboot_tables.h> #include <fsp/info_header.h> -#include <device/resource.h> #include <memrange.h> /* @@ -30,7 +29,7 @@ enum cb_err fsp_fill_lb_framebuffer(struct lb_framebuffer *framebuffer); * Hand-off-block utilities which do not depend on CBMEM, but need to be passed * the HOB list explicitly. */ -void fsp_find_reserved_memory(struct resource *res, const void *hob_list); +void fsp_find_reserved_memory(struct range_entry *re, const void *hob_list); void fsp_print_memory_resource_hobs(const void *hob_list); /* Load an FSP binary into CBFS, and fill the associated fsp_header struct */ diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 29a966e..2c8bbe8 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -75,11 +75,10 @@ static void disable_watchdog(void) outl(reg, ACPI_PMIO_BASE + 0x68); } - asmlinkage void car_stage_entry(void) { void *hob_list_ptr; - struct resource fsp_mem; + struct range_entry fsp_mem; struct range_entry reg_car; printk(BIOS_DEBUG, "Starting romstage...\n"); @@ -89,9 +88,8 @@ asmlinkage void car_stage_entry(void) soc_early_romstage_init(); /* Make sure the blob does not override our data in CAR */ - memset(&reg_car, 0, sizeof(reg_car)); - reg_car.begin = (uintptr_t) _car_relocatable_data_end; - reg_car.end = (uintptr_t) _car_region_end; + range_entry_init(&reg_car, (uintptr_t)_car_relocatable_data_end, + (uintptr_t)_car_region_end, 0); if (fsp_memory_init(&hob_list_ptr, &reg_car) != FSP_SUCCESS) { die("FSP memory init failed. Giving up."); @@ -101,10 +99,11 @@ asmlinkage void car_stage_entry(void) /* initialize cbmem by adding FSP reserved memory first thing */ cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, - fsp_mem.size); + range_entry_size(&fsp_mem)); /* make sure FSP memory is reserved in cbmem */ - if (fsp_mem.base != (uintptr_t)cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY)) + if (range_entry_base(&fsp_mem) != + (uintptr_t)cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY)) die("Failed to accommodate FSP reserved memory request"); /* Now that CBMEM is up, save the list so ramstage can use it */

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coreboot-gerrit March 2016