coreboot-gerrit March 2016

coreboot-gerrit@coreboot.org

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Patch set updated for coreboot: coreinfo: Drop LAR module
by Stefan Reinauer 13 Mar '16

13 Mar '16

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14066 -gerrit commit a145b7ca96193125ec539302ca22a56a534055e5 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Mar 11 23:24:01 2016 -0800 coreinfo: Drop LAR module The Lame ARchiver has been deprecated for about a decade. Let's remove the code. Change-Id: Ia05690ab63c68dd0a76ae1f180cbfa29df1f02ad Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- payloads/coreinfo/Kconfig | 6 -- payloads/coreinfo/Makefile | 4 +- payloads/coreinfo/coreinfo.c | 4 -- payloads/coreinfo/lar_module.c | 140 ----------------------------------------- 4 files changed, 2 insertions(+), 152 deletions(-) diff --git a/payloads/coreinfo/Kconfig b/payloads/coreinfo/Kconfig index f1d1bf9..e71599c 100644 --- a/payloads/coreinfo/Kconfig +++ b/payloads/coreinfo/Kconfig @@ -98,12 +98,6 @@ config MODULE_RAMDUMP bool "Enable the RAM dump module" default y -config MODULE_LAR - bool "Enable the coreboot v3 LAR module" - help - LAR support must also be enabled in libpayload. - default n - config MODULE_CBFS bool "Enable the coreboot CBFS module" default y diff --git a/payloads/coreinfo/Makefile b/payloads/coreinfo/Makefile index ab25bf3..47a7dfb 100644 --- a/payloads/coreinfo/Makefile +++ b/payloads/coreinfo/Makefile @@ -55,8 +55,8 @@ OBJCOPY ?= objcopy INCLUDES = -I$(coreinfo_obj) -include $(LIBPAYLOAD_DIR)/include/kconfig.h OBJECTS = cpuinfo_module.o cpuid.S.o pci_module.o coreboot_module.o \ - nvram_module.o bootlog_module.o ramdump_module.o lar_module.o \ - multiboot_module.o cbfs_module.o coreinfo.o + nvram_module.o bootlog_module.o ramdump_module.o multiboot_module.o \ + cbfs_module.o coreinfo.o OBJS = $(patsubst %,$(coreinfo_obj)/%,$(OBJECTS)) TARGET = $(coreinfo_obj)/coreinfo.elf diff --git a/payloads/coreinfo/coreinfo.c b/payloads/coreinfo/coreinfo.c index a7ed45e..449ac5d 100644 --- a/payloads/coreinfo/coreinfo.c +++ b/payloads/coreinfo/coreinfo.c @@ -24,7 +24,6 @@ extern struct coreinfo_module multiboot_module; extern struct coreinfo_module nvram_module; extern struct coreinfo_module bootlog_module; extern struct coreinfo_module ramdump_module; -extern struct coreinfo_module lar_module; extern struct coreinfo_module cbfs_module; struct coreinfo_module *system_modules[] = { @@ -52,9 +51,6 @@ struct coreinfo_module *firmware_modules[] = { #if IS_ENABLED(CONFIG_MODULE_BOOTLOG) &bootlog_module, #endif -#if IS_ENABLED(CONFIG_MODULE_LAR) - &lar_module, -#endif #if IS_ENABLED(CONFIG_MODULE_CBFS) &cbfs_module, #endif diff --git a/payloads/coreinfo/lar_module.c b/payloads/coreinfo/lar_module.c deleted file mode 100644 index 2cfd762..0000000 --- a/payloads/coreinfo/lar_module.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * This file is part of the coreinfo project. - * - * Copyright (C) 2008 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include "coreinfo.h" - -#if IS_ENABLED(CONFIG_MODULE_LAR) - -static struct LAR *lar; -static int lcount, selected; -static char **lnames; -static const char *compression_table[4] = {"none", "LZMA", "NRV2B", "zeroes"}; - -static int lar_module_init(void) -{ - int index = 0; - struct larent *larent; - - lar = openlar(NULL); - - if (lar == NULL) - return 0; - - while ((larent = readlar(lar))) - lcount++; - - lnames = malloc(lcount * sizeof(char *)); - - if (lnames == NULL) - return 0; - - rewindlar(lar); - - while ((larent = readlar(lar))) - lnames[index++] = strdup((const char *) larent->name); - - return 0; -} - -static int lar_module_redraw(WINDOW *win) -{ - int i, row = 2; - struct larstat stat; - - print_module_title(win, "LAR Listing"); - - if (lar == 0) { - mvwprintw(win, 11, 61 / 2, "Bad or missing LAR"); - return 0; - } - - /* Draw a line down the middle. */ - for (i = 2; i < 21; i++) - mvwaddch(win, i, 30, ACS_VLINE); - - /* Draw the names down the left side. */ - for (i = 0; i < lcount; i++) { - if (i == selected) - wattrset(win, COLOR_PAIR(3) | A_BOLD); - else - wattrset(win, COLOR_PAIR(2)); - - mvwprintw(win, 2 + i, 1, "%.25s", lnames[i]); - } - - /* Get the information for the LAR. */ - if (larstat(lar, lnames[selected], &stat)) { - printf("larstat failed\n"); - return 0; - } - - wattrset(win, COLOR_PAIR(2)); - - mvwprintw(win, row++, 32, "Offset: 0x%x", stat.offset); - - if (stat.compression) { - mvwprintw(win, row++, 32, "Compression: %s", - compression_table[stat.compression]); - mvwprintw(win, row++, 32, "Compressed length: %d", stat.len); - mvwprintw(win, row++, 32, "Compressed checksum: 0x%x", - stat.compchecksum); - } - - mvwprintw(win, row++, 32, "Length: %d", stat.reallen); - mvwprintw(win, row++, 32, "Checksum: 0x%x", stat.checksum); - mvwprintw(win, row++, 32, "Load address: 0x%llx", stat.loadaddress); - mvwprintw(win, row++, 32, "Entry point: 0x%llx", stat.entry); - - return 0; -} - -static int lar_module_handle(int key) -{ - int ret = 0; - - if (lar == NULL) - return 0; - - switch (key) { - case KEY_DOWN: - if (selected + 1 < lcount) { - selected++; - ret = 1; - } - break; - case KEY_UP: - if (selected > 0) { - selected--; - ret = 1; - } - break; - } - - return ret; -} - -struct coreinfo_module lar_module = { - .name = "LAR", - .init = lar_module_init, - .redraw = lar_module_redraw, - .handle = lar_module_handle -}; - -#else - -struct coreinfo_module lar_module = { -}; - -#endif

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Patch set updated for coreboot: coreinfo: Allow numbers in addition to F keys
by Stefan Reinauer 13 Mar '16

13 Mar '16

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14065 -gerrit commit 219c8fc4a1fc70d2b9cf76eca3410b2b4797a5c7 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Mar 11 23:17:28 2016 -0800 coreinfo: Allow numbers in addition to F keys When using coreinfo on a serial console (at least with gtkterm, picocom and minicom on Ubuntu 15.10) you can't send F keys to the payload. Allow 1..9 for F1..F9 Change-Id: Ie3a11fa1de57c7345737a1ccaff177f407cd5e48 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- payloads/coreinfo/coreinfo.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/payloads/coreinfo/coreinfo.c b/payloads/coreinfo/coreinfo.c index effe94f..a7ed45e 100644 --- a/payloads/coreinfo/coreinfo.c +++ b/payloads/coreinfo/coreinfo.c @@ -251,6 +251,8 @@ static void loop(void) halfdelay(10); while (1) { + int ch = -1; + #if IS_ENABLED(CONFIG_SHOW_DATE_TIME) print_time_and_date(); wrefresh(menuwin); @@ -261,20 +263,21 @@ static void loop(void) if (key == ERR) continue; - if (key >= KEY_F(1) && key <= KEY_F(9)) { - unsigned char ch = key - KEY_F(1); - - if (ch <= ARRAY_SIZE(categories)) { - if (ch == ARRAY_SIZE(categories)) - continue; - if (categories[ch].count == 0) - continue; + if (key >= KEY_F(1) && key <= KEY_F(9)) + ch = key - KEY_F(1); + if (key >= '1' && key <= '9') + ch = key - '1'; - curwin = ch; - print_submenu(&categories[curwin]); - redraw_module(&categories[curwin]); + if (ch >= 0 && ch <= ARRAY_SIZE(categories)) { + if (ch == ARRAY_SIZE(categories)) + continue; + if (categories[ch].count == 0) continue; - } + + curwin = ch; + print_submenu(&categories[curwin]); + redraw_module(&categories[curwin]); + continue; } if (key == KEY_ESC)

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New patch to review for coreboot: libpayload: recreate config files
by Stefan Reinauer 13 Mar '16

13 Mar '16

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14077 -gerrit commit 567df41aafe782f129ab5d6e0dc1e998c40574b8 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Sat Mar 12 16:51:30 2016 -0800 libpayload: recreate config files Add all the default options with: for i in configs/* do cp $i .config make oldconfig cp .config $i done We should probably switch over to using minimal configs here. Change-Id: If18a32eca4df9e1dfeb0e212b652d972cea8e4b8 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- payloads/libpayload/configs/config.arm64-generic | 9 ++++++++- payloads/libpayload/configs/config.purin | 6 +++++- payloads/libpayload/configs/config.veyron | 6 +++++- payloads/libpayload/configs/defconfig | 7 +++++-- payloads/libpayload/configs/defconfig-arm | 9 +++++++-- payloads/libpayload/configs/defconfig-mips | 8 ++++++-- payloads/libpayload/configs/defconfig-tinycurses | 7 +++++-- 7 files changed, 41 insertions(+), 11 deletions(-) diff --git a/payloads/libpayload/configs/config.arm64-generic b/payloads/libpayload/configs/config.arm64-generic index a2d596c..ff9dec9 100644 --- a/payloads/libpayload/configs/config.arm64-generic +++ b/payloads/libpayload/configs/config.arm64-generic @@ -11,6 +11,7 @@ # CONFIG_LP_DEVELOPER is not set CONFIG_LP_COMPILER_GCC=y # CONFIG_LP_COMPILER_LLVM_CLANG is not set +# CONFIG_LP_MEMMAP_RAM_ONLY is not set # # Architecture Options @@ -19,7 +20,9 @@ CONFIG_LP_COMPILER_GCC=y # CONFIG_LP_ARCH_X86 is not set CONFIG_LP_ARCH_ARM64=y # CONFIG_LP_ARCH_MIPS is not set -# CONFIG_LP_MEMMAP_RAM_ONLY is not set +CONFIG_LP_HEAP_SIZE=131072 +CONFIG_LP_STACK_SIZE=16384 +CONFIG_LP_BASE_ADDRESS=0x80100000 # # Standard Libraries @@ -28,6 +31,7 @@ CONFIG_LP_LIBC=y # CONFIG_LP_CURSES is not set CONFIG_LP_CBFS=y CONFIG_LP_LZMA=y +CONFIG_LP_LZ4=y # # Console Options @@ -48,6 +52,7 @@ CONFIG_LP_TIMER_NONE=y # CONFIG_LP_TIMER_MCT is not set # CONFIG_LP_TIMER_TEGRA_1US is not set # CONFIG_LP_TIMER_IPQ806X is not set +# CONFIG_LP_TIMER_ARMADA38X is not set # CONFIG_LP_TIMER_RK is not set # CONFIG_LP_TIMER_BG4CD is not set # CONFIG_LP_TIMER_CYGNUS is not set @@ -58,6 +63,7 @@ CONFIG_LP_USB=y CONFIG_LP_USB_EHCI=y CONFIG_LP_USB_XHCI=y # CONFIG_LP_USB_XHCI_MTK_QUIRK is not set +# CONFIG_LP_USB_DWC2 is not set CONFIG_LP_USB_HID=y CONFIG_LP_USB_HUB=y # CONFIG_LP_USB_EHCI_HOSTPC_ROOT_HUB_TT is not set @@ -69,4 +75,5 @@ CONFIG_LP_USB_GEN_HUB=y CONFIG_LP_LITTLE_ENDIAN=y # CONFIG_LP_IO_ADDRESS_SPACE is not set CONFIG_LP_ARCH_SPECIFIC_OPTIONS=y +CONFIG_LP_ARM64_A53_ERRATUM_843419=y CONFIG_LP_DMA_LIM_EXCL=0x1000 diff --git a/payloads/libpayload/configs/config.purin b/payloads/libpayload/configs/config.purin index c4f225b..5b51146 100644 --- a/payloads/libpayload/configs/config.purin +++ b/payloads/libpayload/configs/config.purin @@ -12,6 +12,7 @@ CONFIG_LP_GPL=y CONFIG_LP_COMPILER_GCC=y # CONFIG_LP_COMPILER_LLVM_CLANG is not set # CONFIG_LP_REMOTEGDB is not set +# CONFIG_LP_MEMMAP_RAM_ONLY is not set # # Architecture Options @@ -20,7 +21,9 @@ CONFIG_LP_ARCH_ARM=y # CONFIG_LP_ARCH_X86 is not set # CONFIG_LP_ARCH_ARM64 is not set # CONFIG_LP_ARCH_MIPS is not set -# CONFIG_LP_MEMMAP_RAM_ONLY is not set +CONFIG_LP_HEAP_SIZE=131072 +CONFIG_LP_STACK_SIZE=16384 +CONFIG_LP_BASE_ADDRESS=0x04000000 # # Standard Libraries @@ -56,6 +59,7 @@ CONFIG_LP_8250_SERIAL_CONSOLE=y # CONFIG_LP_TIMER_MCT is not set # CONFIG_LP_TIMER_TEGRA_1US is not set # CONFIG_LP_TIMER_IPQ806X is not set +# CONFIG_LP_TIMER_ARMADA38X is not set # CONFIG_LP_TIMER_RK is not set # CONFIG_LP_TIMER_BG4CD is not set CONFIG_LP_TIMER_CYGNUS=y diff --git a/payloads/libpayload/configs/config.veyron b/payloads/libpayload/configs/config.veyron index 47d54ea..2988ed5 100644 --- a/payloads/libpayload/configs/config.veyron +++ b/payloads/libpayload/configs/config.veyron @@ -12,6 +12,7 @@ CONFIG_LP_GPL=y CONFIG_LP_COMPILER_GCC=y # CONFIG_LP_COMPILER_LLVM_CLANG is not set # CONFIG_LP_REMOTEGDB is not set +# CONFIG_LP_MEMMAP_RAM_ONLY is not set # # Architecture Options @@ -20,7 +21,9 @@ CONFIG_LP_ARCH_ARM=y # CONFIG_LP_ARCH_X86 is not set # CONFIG_LP_ARCH_ARM64 is not set # CONFIG_LP_ARCH_MIPS is not set -# CONFIG_LP_MEMMAP_RAM_ONLY is not set +CONFIG_LP_HEAP_SIZE=131072 +CONFIG_LP_STACK_SIZE=16384 +CONFIG_LP_BASE_ADDRESS=0x04000000 # # Standard Libraries @@ -57,6 +60,7 @@ CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y # CONFIG_LP_TIMER_MCT is not set # CONFIG_LP_TIMER_TEGRA_1US is not set # CONFIG_LP_TIMER_IPQ806X is not set +# CONFIG_LP_TIMER_ARMADA38X is not set CONFIG_LP_TIMER_RK=y # CONFIG_LP_TIMER_BG4CD is not set # CONFIG_LP_TIMER_CYGNUS is not set diff --git a/payloads/libpayload/configs/defconfig b/payloads/libpayload/configs/defconfig index 53320e7..1c9c8b5 100644 --- a/payloads/libpayload/configs/defconfig +++ b/payloads/libpayload/configs/defconfig @@ -11,6 +11,7 @@ # CONFIG_LP_DEVELOPER is not set CONFIG_LP_COMPILER_GCC=y # CONFIG_LP_COMPILER_LLVM_CLANG is not set +# CONFIG_LP_MEMMAP_RAM_ONLY is not set # # Architecture Options @@ -19,8 +20,10 @@ CONFIG_LP_COMPILER_GCC=y CONFIG_LP_ARCH_X86=y # CONFIG_LP_ARCH_ARM64 is not set # CONFIG_LP_ARCH_MIPS is not set -# CONFIG_LP_MEMMAP_RAM_ONLY is not set # CONFIG_LP_MULTIBOOT is not set +CONFIG_LP_HEAP_SIZE=131072 +CONFIG_LP_STACK_SIZE=16384 +CONFIG_LP_BASE_ADDRESS=0x00100000 # # Standard Libraries @@ -41,7 +44,6 @@ CONFIG_LP_CBMEM_CONSOLE=y CONFIG_LP_SERIAL_CONSOLE=y CONFIG_LP_8250_SERIAL_CONSOLE=y # CONFIG_LP_S5P_SERIAL_CONSOLE is not set -# CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE is not set # CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set # CONFIG_LP_BG4CD_SERIAL_CONSOLE is not set # CONFIG_LP_PL011_SERIAL_CONSOLE is not set @@ -76,6 +78,7 @@ CONFIG_LP_USB_OHCI=y CONFIG_LP_USB_EHCI=y CONFIG_LP_USB_XHCI=y # CONFIG_LP_USB_XHCI_MTK_QUIRK is not set +# CONFIG_LP_USB_DWC2 is not set CONFIG_LP_USB_HID=y CONFIG_LP_USB_HUB=y # CONFIG_LP_USB_EHCI_HOSTPC_ROOT_HUB_TT is not set diff --git a/payloads/libpayload/configs/defconfig-arm b/payloads/libpayload/configs/defconfig-arm index 5b0ebe6..127767b 100644 --- a/payloads/libpayload/configs/defconfig-arm +++ b/payloads/libpayload/configs/defconfig-arm @@ -11,6 +11,7 @@ # CONFIG_LP_DEVELOPER is not set CONFIG_LP_COMPILER_GCC=y # CONFIG_LP_COMPILER_LLVM_CLANG is not set +# CONFIG_LP_MEMMAP_RAM_ONLY is not set # # Architecture Options @@ -19,7 +20,9 @@ CONFIG_LP_ARCH_ARM=y # CONFIG_LP_ARCH_X86 is not set # CONFIG_LP_ARCH_ARM64 is not set # CONFIG_LP_ARCH_MIPS is not set -# CONFIG_LP_MEMMAP_RAM_ONLY is not set +CONFIG_LP_HEAP_SIZE=131072 +CONFIG_LP_STACK_SIZE=16384 +CONFIG_LP_BASE_ADDRESS=0x04000000 # # Standard Libraries @@ -30,6 +33,7 @@ CONFIG_LP_TINYCURSES=y # CONFIG_LP_PDCURSES is not set CONFIG_LP_CBFS=y CONFIG_LP_LZMA=y +CONFIG_LP_LZ4=y # # Console Options @@ -39,7 +43,6 @@ CONFIG_LP_CBMEM_CONSOLE=y CONFIG_LP_SERIAL_CONSOLE=y # CONFIG_LP_8250_SERIAL_CONSOLE is not set # CONFIG_LP_S5P_SERIAL_CONSOLE is not set -# CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE is not set # CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set # CONFIG_LP_BG4CD_SERIAL_CONSOLE is not set # CONFIG_LP_SERIAL_SET_SPEED is not set @@ -60,6 +63,7 @@ CONFIG_LP_TIMER_NONE=y # CONFIG_LP_TIMER_MCT is not set # CONFIG_LP_TIMER_TEGRA_1US is not set # CONFIG_LP_TIMER_IPQ806X is not set +# CONFIG_LP_TIMER_ARMADA38X is not set # CONFIG_LP_TIMER_RK is not set # CONFIG_LP_TIMER_BG4CD is not set # CONFIG_LP_TIMER_CYGNUS is not set @@ -70,6 +74,7 @@ CONFIG_LP_USB_OHCI=y CONFIG_LP_USB_EHCI=y CONFIG_LP_USB_XHCI=y # CONFIG_LP_USB_XHCI_MTK_QUIRK is not set +# CONFIG_LP_USB_DWC2 is not set CONFIG_LP_USB_HID=y CONFIG_LP_USB_HUB=y # CONFIG_LP_USB_EHCI_HOSTPC_ROOT_HUB_TT is not set diff --git a/payloads/libpayload/configs/defconfig-mips b/payloads/libpayload/configs/defconfig-mips index 5b78777..a7067f9 100644 --- a/payloads/libpayload/configs/defconfig-mips +++ b/payloads/libpayload/configs/defconfig-mips @@ -11,6 +11,7 @@ # CONFIG_LP_DEVELOPER is not set CONFIG_LP_COMPILER_GCC=y # CONFIG_LP_COMPILER_LLVM_CLANG is not set +# CONFIG_LP_MEMMAP_RAM_ONLY is not set # # Architecture Options @@ -19,7 +20,9 @@ CONFIG_LP_COMPILER_GCC=y # CONFIG_LP_ARCH_X86 is not set # CONFIG_LP_ARCH_ARM64 is not set CONFIG_LP_ARCH_MIPS=y -# CONFIG_LP_MEMMAP_RAM_ONLY is not set +CONFIG_LP_HEAP_SIZE=131072 +CONFIG_LP_STACK_SIZE=16384 +CONFIG_LP_BASE_ADDRESS=0x00000000 # # Standard Libraries @@ -30,6 +33,7 @@ CONFIG_LP_CURSES=y CONFIG_LP_PDCURSES=y CONFIG_LP_CBFS=y CONFIG_LP_LZMA=y +CONFIG_LP_LZ4=y # # Console Options @@ -39,7 +43,6 @@ CONFIG_LP_CBMEM_CONSOLE=y CONFIG_LP_SERIAL_CONSOLE=y CONFIG_LP_8250_SERIAL_CONSOLE=y # CONFIG_LP_S5P_SERIAL_CONSOLE is not set -# CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE is not set # CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set # CONFIG_LP_BG4CD_SERIAL_CONSOLE is not set # CONFIG_LP_PL011_SERIAL_CONSOLE is not set @@ -63,6 +66,7 @@ CONFIG_LP_STORAGE_ATAPI=y # CONFIG_LP_TIMER_MCT is not set # CONFIG_LP_TIMER_TEGRA_1US is not set # CONFIG_LP_TIMER_IPQ806X is not set +# CONFIG_LP_TIMER_ARMADA38X is not set # CONFIG_LP_TIMER_RK is not set # CONFIG_LP_TIMER_BG4CD is not set # CONFIG_LP_TIMER_CYGNUS is not set diff --git a/payloads/libpayload/configs/defconfig-tinycurses b/payloads/libpayload/configs/defconfig-tinycurses index ad0a8cf..1785075 100644 --- a/payloads/libpayload/configs/defconfig-tinycurses +++ b/payloads/libpayload/configs/defconfig-tinycurses @@ -11,6 +11,7 @@ # CONFIG_LP_DEVELOPER is not set CONFIG_LP_COMPILER_GCC=y # CONFIG_LP_COMPILER_LLVM_CLANG is not set +# CONFIG_LP_MEMMAP_RAM_ONLY is not set # # Architecture Options @@ -19,8 +20,10 @@ CONFIG_LP_COMPILER_GCC=y CONFIG_LP_ARCH_X86=y # CONFIG_LP_ARCH_ARM64 is not set # CONFIG_LP_ARCH_MIPS is not set -# CONFIG_LP_MEMMAP_RAM_ONLY is not set # CONFIG_LP_MULTIBOOT is not set +CONFIG_LP_HEAP_SIZE=131072 +CONFIG_LP_STACK_SIZE=16384 +CONFIG_LP_BASE_ADDRESS=0x00100000 # # Standard Libraries @@ -41,7 +44,6 @@ CONFIG_LP_CBMEM_CONSOLE=y CONFIG_LP_SERIAL_CONSOLE=y CONFIG_LP_8250_SERIAL_CONSOLE=y # CONFIG_LP_S5P_SERIAL_CONSOLE is not set -# CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE is not set # CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set # CONFIG_LP_BG4CD_SERIAL_CONSOLE is not set # CONFIG_LP_PL011_SERIAL_CONSOLE is not set @@ -76,6 +78,7 @@ CONFIG_LP_USB_OHCI=y CONFIG_LP_USB_EHCI=y CONFIG_LP_USB_XHCI=y # CONFIG_LP_USB_XHCI_MTK_QUIRK is not set +# CONFIG_LP_USB_DWC2 is not set CONFIG_LP_USB_HID=y CONFIG_LP_USB_HUB=y # CONFIG_LP_USB_EHCI_HOSTPC_ROOT_HUB_TT is not set

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Patch set updated for coreboot: libpayload: Fix ARM workaround code
by Stefan Reinauer 13 Mar '16

13 Mar '16

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14076 -gerrit commit 5592fbb524008e34a4f80a1d7e1e128068cbbc5f Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Sat Mar 12 16:38:17 2016 -0800 libpayload: Fix ARM workaround code _LDFLAGS+="foo" did not work in my shell (bash on Ubuntu 15.10), so change it to _LDFLAGS="$_LDFLAGS foo". I'm mildly surprised that this ever worked. Change-Id: I59c10f34992240c6df2ec7f24aebc6daafb76493 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- payloads/libpayload/bin/lpgcc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/payloads/libpayload/bin/lpgcc b/payloads/libpayload/bin/lpgcc index 7511300..b3ef342 100755 --- a/payloads/libpayload/bin/lpgcc +++ b/payloads/libpayload/bin/lpgcc @@ -184,7 +184,7 @@ else if grep -q ARM64_A53_ERRATUM_843419=y $BASE/../libpayload.config && grep -q fix-cortex-a53-843419 $BASE/../libpayload.xcompile; then - _LDFLAGS+=" -Wl,--fix-cortex-a53-843419" + _LDFLAGS="$_LDFLAGS -Wl,--fix-cortex-a53-843419" fi _LDFLAGS="$_LDFLAGS -Wl,--defsym=CONFIG_LP_BASE_ADDRESS=$CONFIG_LP_BASE_ADDRESS"

1 0

Patch set updated for coreboot: libpayload: Add comment about ARM64 exception stack
by Stefan Reinauer 13 Mar '16

13 Mar '16

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14075 -gerrit commit 8494c87f16da4ff73460f1e0d2758607738e338a Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Sat Mar 12 16:36:57 2016 -0800 libpayload: Add comment about ARM64 exception stack Change-Id: I8b74cbf6bdde32c90ad0510e14e899711269e57f Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- payloads/libpayload/arch/arm64/libpayload.ldscript | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/payloads/libpayload/arch/arm64/libpayload.ldscript b/payloads/libpayload/arch/arm64/libpayload.ldscript index 0cb88cf..5c807ce 100644 --- a/payloads/libpayload/arch/arm64/libpayload.ldscript +++ b/payloads/libpayload/arch/arm64/libpayload.ldscript @@ -78,6 +78,10 @@ SECTIONS . = ALIGN(16); _stack = .; + /* Exception stack. Having a separate exception stack + * allows us to have later stages running in non-EL3 levels. + */ + _exc_estack = .; . += CONFIG_LP_STACK_SIZE; . = ALIGN(16);

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New patch to review for coreboot: libpayload: Fix ARM workaround code
by Stefan Reinauer 13 Mar '16

13 Mar '16

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14076 -gerrit commit 98c2ceba4313525f07d1d01cde8a01461c580195 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Sat Mar 12 16:38:17 2016 -0800 libpayload: Fix ARM workaround code _LDFLAGS+="foo" did not work in my shell (bash on Ubuntu 15.10), so change it to _LDFLAGS="$_LDFLAGS foo". I'm mildly surprised that this ever worked. Change-Id: I59c10f34992240c6df2ec7f24aebc6daafb76493 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- payloads/libpayload/bin/lpgcc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/payloads/libpayload/bin/lpgcc b/payloads/libpayload/bin/lpgcc index 7511300..b3ef342 100755 --- a/payloads/libpayload/bin/lpgcc +++ b/payloads/libpayload/bin/lpgcc @@ -184,7 +184,7 @@ else if grep -q ARM64_A53_ERRATUM_843419=y $BASE/../libpayload.config && grep -q fix-cortex-a53-843419 $BASE/../libpayload.xcompile; then - _LDFLAGS+=" -Wl,--fix-cortex-a53-843419" + _LDFLAGS="$_LDFLAGS -Wl,--fix-cortex-a53-843419" fi _LDFLAGS="$_LDFLAGS -Wl,--defsym=CONFIG_LP_BASE_ADDRESS=$CONFIG_LP_BASE_ADDRESS"

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New patch to review for coreboot: libpayload: Add comment about ARM64 exception stack
by Stefan Reinauer 13 Mar '16

13 Mar '16

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14075 -gerrit commit d4e791e01d6ff1ce9f1277d5a14b3767b1025d50 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Sat Mar 12 16:36:57 2016 -0800 libpayload: Add comment about ARM64 exception stack Change-Id: I8b74cbf6bdde32c90ad0510e14e899711269e57f Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- payloads/libpayload/arch/arm64/libpayload.ldscript | 2 ++ 1 file changed, 2 insertions(+) diff --git a/payloads/libpayload/arch/arm64/libpayload.ldscript b/payloads/libpayload/arch/arm64/libpayload.ldscript index 0cb88cf..42091b8 100644 --- a/payloads/libpayload/arch/arm64/libpayload.ldscript +++ b/payloads/libpayload/arch/arm64/libpayload.ldscript @@ -78,6 +78,8 @@ SECTIONS . = ALIGN(16); _stack = .; + /* Exception stack */ + _exc_estack = .; . += CONFIG_LP_STACK_SIZE; . = ALIGN(16);

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New patch to review for coreboot: libpayload: Move base address, stack and heap size to Kconfig
by Stefan Reinauer 13 Mar '16

13 Mar '16

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14074 -gerrit commit 18cdf508e6104c7990f5ef0dd514d6b08e99af17 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Sat Mar 12 16:18:17 2016 -0800 libpayload: Move base address, stack and heap size to Kconfig This will allow more payloads to use the standard linker script instead of implementing their own. Change-Id: Ie60120769829f427ceb722109d85859b61dbde31 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- payloads/libpayload/Kconfig | 29 ++++++++++++++++++++++ payloads/libpayload/arch/arm/libpayload.ldscript | 11 +++----- payloads/libpayload/arch/arm64/libpayload.ldscript | 13 +++------- payloads/libpayload/arch/mips/libpayload.ldscript | 10 +++----- payloads/libpayload/arch/x86/libpayload.ldscript | 11 +++----- payloads/libpayload/bin/lpgcc | 4 +++ 6 files changed, 46 insertions(+), 32 deletions(-) diff --git a/payloads/libpayload/Kconfig b/payloads/libpayload/Kconfig index 3c579e6..be68859 100644 --- a/payloads/libpayload/Kconfig +++ b/payloads/libpayload/Kconfig @@ -119,6 +119,35 @@ config MULTIBOOT depends on ARCH_X86 default y +config HEAP_SIZE + int "Heap size" + default 131072 + help + This is the heap size (malloc'able size) available + to the payload. + + If unsure, set to 131072 (128K) + +config STACK_SIZE + int "Stack size" + default 16384 + help + This is the stack size available to the payload. + + If unsure, set to 16384 (16K) + +config BASE_ADDRESS + hex "Base address" + default 0x04000000 if ARCH_ARM + default 0x80100000 if ARCH_ARM64 + default 0x00000000 if ARCH_MIPS + default 0x00100000 if ARCH_X86 + help + This is the base address for the payload. + + If unsure, set to 0x00100000 on x86, 0x00000000 on MIPS, + 0x04000000 on ARM or 0x80100000 on ARM64. + endmenu menu "Standard Libraries" diff --git a/payloads/libpayload/arch/arm/libpayload.ldscript b/payloads/libpayload/arch/arm/libpayload.ldscript index 5f65bd7..492bd0c 100644 --- a/payloads/libpayload/arch/arm/libpayload.ldscript +++ b/payloads/libpayload/arch/arm/libpayload.ldscript @@ -28,19 +28,14 @@ * SUCH DAMAGE. */ -BASE_ADDRESS = 0x4000000; - OUTPUT_FORMAT("elf32-littlearm","elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) ENTRY(_entry) -HEAP_SIZE = 2*64*1024; -STACK_SIZE = 16384; - SECTIONS { - . = BASE_ADDRESS; + . = CONFIG_LP_BASE_ADDRESS; . = ALIGN(16); _start = .; @@ -74,12 +69,12 @@ SECTIONS . = ALIGN(16); _heap = .; - . += HEAP_SIZE; + . += CONFIG_LP_HEAP_SIZE; . = ALIGN(16); _eheap = .; _estack = .; - . += STACK_SIZE; + . += CONFIG_LP_STACK_SIZE; . = ALIGN(16); _stack = .; } diff --git a/payloads/libpayload/arch/arm64/libpayload.ldscript b/payloads/libpayload/arch/arm64/libpayload.ldscript index 1b4395f..0cb88cf 100644 --- a/payloads/libpayload/arch/arm64/libpayload.ldscript +++ b/payloads/libpayload/arch/arm64/libpayload.ldscript @@ -28,19 +28,14 @@ * SUCH DAMAGE. */ -BASE_ADDRESS = 0x80100000; - OUTPUT_FORMAT("elf64-littleaarch64","elf64-littleaarch64", "elf64-littleaarch64") OUTPUT_ARCH(arm64) ENTRY(_entry) -HEAP_SIZE = 2*64*1024; -STACK_SIZE = 16384; - SECTIONS { - . = BASE_ADDRESS; + . = CONFIG_LP_BASE_ADDRESS; . = ALIGN(16); _start = .; @@ -74,17 +69,17 @@ SECTIONS . = ALIGN(16); _heap = .; - . += HEAP_SIZE; + . += CONFIG_LP_HEAP_SIZE; . = ALIGN(16); _eheap = .; _estack = .; - . += STACK_SIZE; + . += CONFIG_LP_STACK_SIZE; . = ALIGN(16); _stack = .; _exc_estack = .; - . += STACK_SIZE; + . += CONFIG_LP_STACK_SIZE; . = ALIGN(16); _exc_stack = .; } diff --git a/payloads/libpayload/arch/mips/libpayload.ldscript b/payloads/libpayload/arch/mips/libpayload.ldscript index 28a7412..351c225 100644 --- a/payloads/libpayload/arch/mips/libpayload.ldscript +++ b/payloads/libpayload/arch/mips/libpayload.ldscript @@ -20,15 +20,11 @@ OUTPUT_ARCH(mips) -BASE_ADDRESS = 0x00000000; ENTRY(_entry) -HEAP_SIZE = 2*64*1024; -STACK_SIZE = 16*1024; - SECTIONS { - . = BASE_ADDRESS; + . = CONFIG_LP_BASE_ADDRESS; . = ALIGN(16); _start = .; @@ -68,12 +64,12 @@ SECTIONS . = ALIGN(16); _heap = .; - . += HEAP_SIZE; + . += CONFIG_LP_HEAP_SIZE; . = ALIGN(16); _eheap = .; _estack = .; - . += STACK_SIZE; + . += CONFIG_LP_STACK_SIZE; . = ALIGN(16); _stack = .; } diff --git a/payloads/libpayload/arch/x86/libpayload.ldscript b/payloads/libpayload/arch/x86/libpayload.ldscript index 3e7d4cc..bcb2165 100644 --- a/payloads/libpayload/arch/x86/libpayload.ldscript +++ b/payloads/libpayload/arch/x86/libpayload.ldscript @@ -27,19 +27,14 @@ * SUCH DAMAGE. */ -BASE_ADDRESS = 0x100000; - OUTPUT_FORMAT(elf32-i386) OUTPUT_ARCH(i386) ENTRY(_entry) -HEAP_SIZE = 2*64*1024; -STACK_SIZE = 16384; - SECTIONS { - . = BASE_ADDRESS; + . = CONFIG_LP_BASE_ADDRESS; . = ALIGN(16); _start = .; @@ -73,12 +68,12 @@ SECTIONS . = ALIGN(16); _heap = .; - . += HEAP_SIZE; + . += CONFIG_LP_HEAP_SIZE; . = ALIGN(16); _eheap = .; _estack = .; - . += STACK_SIZE; + . += CONFIG_LP_STACK_SIZE; . = ALIGN(16); _stack = .; } diff --git a/payloads/libpayload/bin/lpgcc b/payloads/libpayload/bin/lpgcc index 0974d03..7511300 100755 --- a/payloads/libpayload/bin/lpgcc +++ b/payloads/libpayload/bin/lpgcc @@ -187,6 +187,10 @@ else _LDFLAGS+=" -Wl,--fix-cortex-a53-843419" fi + _LDFLAGS="$_LDFLAGS -Wl,--defsym=CONFIG_LP_BASE_ADDRESS=$CONFIG_LP_BASE_ADDRESS" + _LDFLAGS="$_LDFLAGS -Wl,--defsym=CONFIG_LP_HEAP_SIZE=$CONFIG_LP_HEAP_SIZE" + _LDFLAGS="$_LDFLAGS -Wl,--defsym=CONFIG_LP_STACK_SIZE=$CONFIG_LP_STACK_SIZE" + if [ $DEBUGME -eq 1 ]; then echo "$DEFAULT_CC $_LDFLAGS $HEAD_O $CMDLINE $_CFLAGS -lpayload $_LIBGCC" fi

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Patch merged into coreboot/master: northbridge/intel/i82810: Unify UDELAY selection
by gerrit＠coreboot.org 13 Mar '16

13 Mar '16

the following patch was just integrated into master: commit e3fd63f264e1f6e2869cf5868e1810dff5641147 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Wed Feb 24 13:33:45 2016 -0800 northbridge/intel/i82810: Unify UDELAY selection Instead of manually including udelay_io.c in each romstage, select UDELAY_IO for all i810 boards in the chipset. Change-Id: Ifda7dcfdf37b6affce838ee96ca6382b2d4be8c3 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: https://review.coreboot.org/13784 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth(a)google.com> See https://review.coreboot.org/13784 for details. -gerrit

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Patch set updated for coreboot: nb/amd/mct_ddr3: Use correct initial UI setting during DRAM training
by Timothy Pearson 13 Mar '16

13 Mar '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14073 -gerrit commit fa72abf3605aa9009544cefc39adec81e07e7b13 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Sat Mar 12 17:17:23 2016 -0600 nb/amd/mct_ddr3: Use correct initial UI setting during DRAM training Rebasing change I3be808db5d15ceec4c36d17582756b01425df09a did not take into account the default UI setting introduced in change I6ae88c891e92b21dc0ca3c47b8f3d269f83b3204 , causing DRAM instability and occassional failure to boot. Use the correct 1UI value for the modified function semantics. Change-Id: I9fd24cf83e4c4083c6e467d49021c98e5f5f2c53 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c index 182fab0..15b5ea4 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c @@ -1703,7 +1703,7 @@ static void TrainDQSReceiverEnCyc_D_Fam15(struct MCTStatStruc *pMCTstat, /* Reset the read data timing registers to 1UI before calculating MaxRdLatency */ for (internal_lane = 0; internal_lane < MAX_BYTE_LANES; internal_lane++) - current_read_dqs_delay[internal_lane] = 0x20 << 1; + current_read_dqs_delay[internal_lane] = 0x20; write_dqs_read_data_timing_registers(current_read_dqs_delay, dev, dct, dimm, index_reg); /* Calculate and program MaxRdLatency */

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coreboot-gerrit March 2016