coreboot-gerrit March 2016

coreboot-gerrit@coreboot.org

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Patch set updated for coreboot: soc/apollolake: Add skeleton ACPI entry
by Andrey Petrov 15 Mar '16

15 Mar '16

Andrey Petrov (andrey.petrov(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13348 -gerrit commit 2ab2029a37b852c236e58895f5acc00031f89c30 Author: Lance Zhao <lijian.zhao(a)intel.com> Date: Mon Nov 9 17:06:34 2015 -0800 soc/apollolake: Add skeleton ACPI entry Change-Id: Ib127af5392ca2b349480f5b21fad2186b444d7e6 Signed-off-by: Lance Zhao <lijian.zhao(a)intel.com> --- src/mainboard/intel/apollolake_rvp/Kconfig | 1 + src/mainboard/intel/apollolake_rvp/acpi_tables.c | 17 ++++++++++++++ src/mainboard/intel/apollolake_rvp/dsdt.asl | 29 ++++++++++++++++++++++++ src/soc/intel/apollolake/Makefile.inc | 1 + src/soc/intel/apollolake/acpi.c | 22 ++++++++++++++++++ 5 files changed, 70 insertions(+) diff --git a/src/mainboard/intel/apollolake_rvp/Kconfig b/src/mainboard/intel/apollolake_rvp/Kconfig index 5e6c4f0..ec71e96 100755 --- a/src/mainboard/intel/apollolake_rvp/Kconfig +++ b/src/mainboard/intel/apollolake_rvp/Kconfig @@ -4,6 +4,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select SOC_INTEL_APOLLOLAKE select BOARD_ROMSIZE_KB_8192 + select HAVE_ACPI_TABLES config MAINBOARD_DIR string diff --git a/src/mainboard/intel/apollolake_rvp/acpi_tables.c b/src/mainboard/intel/apollolake_rvp/acpi_tables.c new file mode 100644 index 0000000..fb3e9c4 --- /dev/null +++ b/src/mainboard/intel/apollolake_rvp/acpi_tables.c @@ -0,0 +1,17 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Lance Zhao <lijian.zhao(a)intel.com> for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <arch/acpi.h> + +void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) +{ +} diff --git a/src/mainboard/intel/apollolake_rvp/dsdt.asl b/src/mainboard/intel/apollolake_rvp/dsdt.asl new file mode 100644 index 0000000..1736cea --- /dev/null +++ b/src/mainboard/intel/apollolake_rvp/dsdt.asl @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Lance Zhao <lijian.zhao(a)intel.com> for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, /* DSDT revision: ACPI v2.0 */ + "COREv4", /* OEM id */ + "COREBOOT", /* OEM table id */ + 0x20110725 /* OEM revision */ +) +{ + Scope (\_SB) { + Device (PCI0) + { + Name (_HID, EISAID ("PNP0A08")) /* PCIe */ + } + } + +} diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 59d13e3..7efb3ba 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -23,6 +23,7 @@ romstage-y += romstage/romstage.c romstage-y += tsc_freq.c romstage-y += uart_early.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c ramstage-y += chip.c ramstage-y += cpu.c ramstage-y += gpio.c diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c new file mode 100644 index 0000000..d5624c6 --- /dev/null +++ b/src/soc/intel/apollolake/acpi.c @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Lance Zhao <lijian.zhao(a)intel.com> for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <arch/acpi.h> + +unsigned long acpi_fill_mcfg(unsigned long current) +{ + return 0; +} +unsigned long acpi_fill_madt(unsigned long current) +{ + return 0; +}

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Patch set updated for coreboot: soc/apollolake: Add skeleton ACPI entry
by Andrey Petrov 14 Mar '16

14 Mar '16

Andrey Petrov (andrey.petrov(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13348 -gerrit commit 7dad387a8a42dc6533a166e555259f2ae27f9374 Author: Lance Zhao <lijian.zhao(a)intel.com> Date: Mon Nov 9 17:06:34 2015 -0800 soc/apollolake: Add skeleton ACPI entry Change-Id: Ib127af5392ca2b349480f5b21fad2186b444d7e6 Signed-off-by: Lance Zhao <lijian.zhao(a)intel.com> --- src/mainboard/intel/apollolake_rvp/Kconfig | 1 + src/mainboard/intel/apollolake_rvp/acpi_tables.c | 17 ++++++++++++++ src/mainboard/intel/apollolake_rvp/dsdt.asl | 29 ++++++++++++++++++++++++ src/soc/intel/apollolake/Makefile.inc | 1 + src/soc/intel/apollolake/acpi.c | 22 ++++++++++++++++++ 5 files changed, 70 insertions(+) diff --git a/src/mainboard/intel/apollolake_rvp/Kconfig b/src/mainboard/intel/apollolake_rvp/Kconfig index 5e6c4f0..ec71e96 100755 --- a/src/mainboard/intel/apollolake_rvp/Kconfig +++ b/src/mainboard/intel/apollolake_rvp/Kconfig @@ -4,6 +4,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select SOC_INTEL_APOLLOLAKE select BOARD_ROMSIZE_KB_8192 + select HAVE_ACPI_TABLES config MAINBOARD_DIR string diff --git a/src/mainboard/intel/apollolake_rvp/acpi_tables.c b/src/mainboard/intel/apollolake_rvp/acpi_tables.c new file mode 100644 index 0000000..fb3e9c4 --- /dev/null +++ b/src/mainboard/intel/apollolake_rvp/acpi_tables.c @@ -0,0 +1,17 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Lance Zhao <lijian.zhao(a)intel.com> for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <arch/acpi.h> + +void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) +{ +} diff --git a/src/mainboard/intel/apollolake_rvp/dsdt.asl b/src/mainboard/intel/apollolake_rvp/dsdt.asl new file mode 100644 index 0000000..1736cea --- /dev/null +++ b/src/mainboard/intel/apollolake_rvp/dsdt.asl @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Lance Zhao <lijian.zhao(a)intel.com> for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, /* DSDT revision: ACPI v2.0 */ + "COREv4", /* OEM id */ + "COREBOOT", /* OEM table id */ + 0x20110725 /* OEM revision */ +) +{ + Scope (\_SB) { + Device (PCI0) + { + Name (_HID, EISAID ("PNP0A08")) /* PCIe */ + } + } + +} diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 59d13e3..7efb3ba 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -23,6 +23,7 @@ romstage-y += romstage/romstage.c romstage-y += tsc_freq.c romstage-y += uart_early.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c ramstage-y += chip.c ramstage-y += cpu.c ramstage-y += gpio.c diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c new file mode 100644 index 0000000..0a0006d --- /dev/null +++ b/src/soc/intel/apollolake/acpi.c @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Lance Zhao <lijian.zhao(a)intel.com> for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <arch/acpi.h> + +unsigned long acpi_fill_mcfg(unsigned long current) +{ + return 0; +} +unsigned long acpi_fill_madt(unsigned long current) +{ + return 0; +}

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Patch set updated for coreboot: payloads: Enable building depthcharge as part of the coreboot build
by Martin Roth 14 Mar '16

14 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/10924 -gerrit commit 99eb0e63c7c001aa3e8c6d482b747be1ee35ec25 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Wed Jul 15 10:24:18 2015 -0700 payloads: Enable building depthcharge as part of the coreboot build For CHROMEOS builds, depthcharge can be built automatically. This dependency exists because depthcharge without vboot and subsequent signing of the image doesn't work very well, and both are keyed to that flag as well. Change-Id: Id0195bd3b4e454f382782106d6512469106daac5 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- .gitignore | 1 + payloads/Makefile.inc | 2 + payloads/external/Makefile.inc | 9 ++++ payloads/external/depthcharge/Kconfig | 7 +++ payloads/external/depthcharge/Kconfig.name | 8 ++++ payloads/external/depthcharge/Makefile.inc | 71 ++++++++++++++++++++++++++++++ 6 files changed, 98 insertions(+) diff --git a/.gitignore b/.gitignore index 7b3797f..912aa85 100644 --- a/.gitignore +++ b/.gitignore @@ -8,6 +8,7 @@ abuild*.xml .ccwrap build/ coreboot-builds/ +payloads/external/depthcharge/depthcharge/ payloads/external/FILO/filo/ payloads/external/GRUB2/grub2/ payloads/external/SeaBIOS/seabios/ diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc index 4269715..792df60 100644 --- a/payloads/Makefile.inc +++ b/payloads/Makefile.inc @@ -23,6 +23,7 @@ payloads/coreinfo/build/coreinfo.elf coreinfo: clean-payloads: $(MAKE) -C payloads/coreinfo clean $(MAKE) -C payloads/libpayload clean + $(MAKE) -C payloads/external/depthcharge -f Makefile.inc clean $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean $(MAKE) -C payloads/external/U-Boot -f Makefile.inc clean $(MAKE) -C payloads/external/Memtest86Plus -f Makefile.inc clean @@ -31,6 +32,7 @@ clean-payloads: distclean-payloads: $(MAKE) -C payloads/coreinfo distclean $(MAKE) -C payloads/libpayload distclean + $(MAKE) -C payloads/external/depthcharge -f Makefile.inc distclean $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc distclean $(MAKE) -C payloads/external/U-Boot -f Makefile.inc distclean $(MAKE) -C payloads/external/Memtest86Plus -f Makefile.inc distclean diff --git a/payloads/external/Makefile.inc b/payloads/external/Makefile.inc index 3c20e13..5a6f625 100644 --- a/payloads/external/Makefile.inc +++ b/payloads/external/Makefile.inc @@ -25,6 +25,10 @@ ifeq ($(CONFIG_PAYLOAD_FILO),y) PAYLOAD_CONFIG=payloads/external/FILO/filo/.config PAYLOAD_VERSION=payloads/external/FILO/filo/build/version.h endif +ifeq ($(CONFIG_PAYLOAD_DEPTHCHARGE),y) +PAYLOAD_CONFIG=payloads/external/depthcharge/depthcharge/.config +#TODO: Figure out version +endif cbfs-files-$(CONFIG_INCLUDE_CONFIG_FILE) += payload_config payload_config-file := $(PAYLOAD_CONFIG) @@ -59,6 +63,11 @@ payloads/external/SeaBIOS/seabios/out/vgabios.bin: seabios payloads/external/SeaBIOS/seabios/.config: payloads/external/SeaBIOS/seabios/out/bios.bin.elf payloads/external/SeaBIOS/seabios/out/autoversion.h: payloads/external/SeaBIOS/seabios/out/bios.bin.elf +payloads/external/depthcharge/depthcharge/build/depthcharge.elf depthcharge: $(top)/$(DOTCONFIG) $(CBFSTOOL) + $(MAKE) -C payloads/external/depthcharge -f Makefile.inc \ + BOARD=$(call ws_to_under,$(call strip_quotes,$(call tolower,$(CONFIG_MAINBOARD_PART_NUMBER)))) \ + MFLAGS= MAKEFLAGS= + filo: $(MAKE) -C payloads/external/FILO -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ diff --git a/payloads/external/depthcharge/Kconfig b/payloads/external/depthcharge/Kconfig new file mode 100644 index 0000000..84b36e5 --- /dev/null +++ b/payloads/external/depthcharge/Kconfig @@ -0,0 +1,7 @@ +if PAYLOAD_DEPTHCHARGE + +config PAYLOAD_FILE + string + default "payloads/external/depthcharge/depthcharge/build/depthcharge.elf" + +endif diff --git a/payloads/external/depthcharge/Kconfig.name b/payloads/external/depthcharge/Kconfig.name new file mode 100644 index 0000000..bc564ec --- /dev/null +++ b/payloads/external/depthcharge/Kconfig.name @@ -0,0 +1,8 @@ +config PAYLOAD_DEPTHCHARGE + bool "Depthcharge" + depends on CHROMEOS + help + Select this option if you want to build a coreboot image + with a depthcharge payload. + + See http://coreboot.org/Payloads for more information. diff --git a/payloads/external/depthcharge/Makefile.inc b/payloads/external/depthcharge/Makefile.inc new file mode 100644 index 0000000..4e76687 --- /dev/null +++ b/payloads/external/depthcharge/Makefile.inc @@ -0,0 +1,71 @@ +# release-R50-7978.B +STABLE_COMMIT_ID=124af94fa5599a0698e59bf3d73675eb52fc6879 + +project_name=depthcharge +project_dir=$(CURDIR)/depthcharge +project_git_repo=https://chromium.googlesource.com/chromiumos/platform/depthcharge +project_config_file=$(project_dir)/.config +output_dir=$(project_dir)/build +libpayload_dir=$(abspath $(CURDIR)/../../libpayload) +libpayload_install_dir=$(output_dir)/lp_$(BOARD) +vboot_dir=$(abspath $(CURDIR)/../../../3rdparty/vboot) + +TAG-$(DEPTHCHARGE_MASTER)=origin/master +TAG-$(DEPTHCHARGE_STABLE)=$(STABLE_COMMIT_ID) + +unexport KCONFIG_AUTOHEADER +unexport KCONFIG_AUTOCONFIG +unexport KCONFIG_DEPENDENCIES +unexport KCONFIG_SPLITCONFIG +unexport KCONFIG_TRISTATE +unexport KCONFIG_NEGATIVES +unexport src srck obj objk + +BOARD:=$(notdir $(CONFIG_MAINBOARD_DIR)) + +all: build + +$(project_dir): + echo " Cloning $(project_name) from Git" + git clone $(project_git_repo) + +fetch: $(project_dir) + cd $(project_dir); git show $(TAG-y) >/dev/null 2>&1 ; if [ $$? -ne 0 ] || \ + [ "$(TAG-y)" = "origin/master" ]; then \ + echo " Fetching new commits from the $(project_name) git repo"; \ + git fetch; fi + +checkout: fetch + echo " Checking out $(project_name) revision $(TAG-y)" + cd $(project_dir) ; git checkout master; git branch -D coreboot 2>/dev/null; git checkout -b coreboot $(TAG-y) + +$(libpayload_install_dir): $(project_dir) + test -f $(libpayload_dir)/configs/config.$(BOARD) || \ + (echo "Error: $(libpayload_dir)/configs/config.$(BOARD) is not present" && \ + false) + cp $(libpayload_dir)/configs/config.$(BOARD) $(libpayload_dir)/.config + $(MAKE) -C $(libpayload_dir) olddefconfig + $(MAKE) -C $(libpayload_dir) + $(MAKE) -C $(libpayload_dir) install DESTDIR=$(libpayload_install_dir) +# rm -f $(libpayload_dir)/.config + +config: $(libpayload_install_dir) checkout + echo " CONFIG project_name $(TAG-y)" + export VERSION=$$(cd depthcharge && \ + git describe --tags --long --dirty 2>/dev/null || \ + echo "unknown") ; \ + cd $(project_dir) && $(MAKE) BOARD=$(BOARD) LIBPAYLOAD_DIR=$(libpayload_install_dir)/libpayload \ + VB_SOURCE=$(vboot_dir) defconfig + +build: config + echo " MAKE $(project_name) $(TAG-y)" + cd $(project_dir) && $(MAKE) BOARD=$(BOARD) LIBPAYLOAD_DIR=$(libpayload_install_dir)/libpayload \ + VB_SOURCE=$(vboot_dir) PATH="$(abspath ../../../build/util/cbfstool):$$PATH" depthcharge_unified + +clean: + test -d $(output_dir) && rm -rf $(output_dir) || exit 0 + +distclean: + rm -rf $(project_dir) + +.PHONY: checkout config build clean distclean clone fetch

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Patch set updated for coreboot: Makefile.inc: Add toupper, tolower, and ws_to_under macros
by Martin Roth 14 Mar '16

14 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14093 -gerrit commit 564697e47a897d49ee0b13bfa4cb90ff9d75e931 Author: Martin Roth <martinroth(a)google.com> Date: Mon Mar 14 15:07:14 2016 -0600 Makefile.inc: Add toupper, tolower, and ws_to_under macros Add a few additional macros that can be used throughout the coreboot makefiles. tolower: returns the value in all lowercase toupper: returns the value in all uppercase ws_to_under: returns the value with any whitespace changed to underscores Change-Id: Icd0e6586481d8f229af0e899e0c94ef7c5c672c3 Signed-off-by: Martin Roth <martinroth(a)google.com> --- Makefile.inc | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Makefile.inc b/Makefile.inc index a07f92a..a70ff5c 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -94,7 +94,7 @@ $(foreach supported_arch,$(ARCH_SUPPORTED), \ $(eval rmodules_$(supported_arch)-generic-ccopts += -D__RMODULE__)) ####################################################################### -# Helper functions for math and various file placement matters. +# Helper functions for math, strings, and various file placement matters. # macros work on all formats understood by printf(1) # values are space separated if using more than one value # @@ -108,6 +108,9 @@ $(foreach supported_arch,$(ARCH_SUPPORTED), \ # int-eq: 1 if the two values are equal. 0 otherwise # int-align: align $1 to $2 units # file-size: returns the filesize of the given file +# tolower: returns the value in all lowercase +# toupper: returns the value in all uppercase +# ws_to_under: returns the value with any whitespace changed to underscores _toint=$(shell printf "%d" $1) _int-add2=$(shell expr $(call _toint,$1) + $(call _toint,$2)) int-add=$(if $(filter 1,$(words $1)),$(strip $1),$(call int-add,$(call _int-add2,$(word 1,$1),$(word 2,$1)) $(wordlist 3,$(words $1),$1))) @@ -121,6 +124,9 @@ int-gt=$(if $(filter 1,$(words $1)),$(strip $1),$(shell expr $(call _toint,$(wor int-eq=$(if $(filter 1,$(words $1)),$(strip $1),$(shell expr $(call _toint,$(word 1,$1)) = $(call _toint,$(word 2,$1)))) int-align=$(shell A=$(call _toint,$1) B=$(call _toint,$2); expr $$A + $ \( $$B - \( $$A % $$B $ \) % $$B \) ) file-size=$(shell cat $1 | wc -c) +tolower=$(shell echo '$1' | tr '[:upper:]' '[:lower:]') +toupper=$(shell echo '$1' | tr '[:lower:]' '[:upper:]') +ws_to_under=$(shell echo '$1' | tr ' \t' '_') ####################################################################### # Helper functions for ramstage postprocess

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New patch to review for coreboot: Makefile.inc: Add toupper, tolower, and ws_to_under macros
by Martin Roth 14 Mar '16

14 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14093 -gerrit commit e0179b188e654be123d3c696d956336ba8c79020 Author: Martin Roth <martinroth(a)google.com> Date: Mon Mar 14 15:07:14 2016 -0600 Makefile.inc: Add toupper, tolower, and ws_to_under macros Add a few additional macros that can be used throughout the coreboot makefiles. tolower: returns the value in all lowercase toupper: returns the value in all uppercase ws_to_under: returns the value with any whitespace changed to underscores Change-Id: Icd0e6586481d8f229af0e899e0c94ef7c5c672c3 Signed-off-by: Martin Roth <martinroth(a)google.com> --- Makefile.inc | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Makefile.inc b/Makefile.inc index a07f92a..a70ff5c 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -94,7 +94,7 @@ $(foreach supported_arch,$(ARCH_SUPPORTED), \ $(eval rmodules_$(supported_arch)-generic-ccopts += -D__RMODULE__)) ####################################################################### -# Helper functions for math and various file placement matters. +# Helper functions for math, strings, and various file placement matters. # macros work on all formats understood by printf(1) # values are space separated if using more than one value # @@ -108,6 +108,9 @@ $(foreach supported_arch,$(ARCH_SUPPORTED), \ # int-eq: 1 if the two values are equal. 0 otherwise # int-align: align $1 to $2 units # file-size: returns the filesize of the given file +# tolower: returns the value in all lowercase +# toupper: returns the value in all uppercase +# ws_to_under: returns the value with any whitespace changed to underscores _toint=$(shell printf "%d" $1) _int-add2=$(shell expr $(call _toint,$1) + $(call _toint,$2)) int-add=$(if $(filter 1,$(words $1)),$(strip $1),$(call int-add,$(call _int-add2,$(word 1,$1),$(word 2,$1)) $(wordlist 3,$(words $1),$1))) @@ -121,6 +124,9 @@ int-gt=$(if $(filter 1,$(words $1)),$(strip $1),$(shell expr $(call _toint,$(wor int-eq=$(if $(filter 1,$(words $1)),$(strip $1),$(shell expr $(call _toint,$(word 1,$1)) = $(call _toint,$(word 2,$1)))) int-align=$(shell A=$(call _toint,$1) B=$(call _toint,$2); expr $$A + $ \( $$B - \( $$A % $$B $ \) % $$B \) ) file-size=$(shell cat $1 | wc -c) +tolower=$(shell echo '$1' | tr '[:upper:]' '[:lower:]') +toupper=$(shell echo '$1' | tr '[:lower:]' '[:upper:]') +ws_to_under=$(shell echo '$1' | tr ' \t' '_') ####################################################################### # Helper functions for ramstage postprocess

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Patch set updated for coreboot: payloads: Enable building depthcharge as part of the coreboot build
by Martin Roth 14 Mar '16

14 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/10924 -gerrit commit dcc7f3786221c6898edbae1846af003da6bed8df Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Wed Jul 15 10:24:18 2015 -0700 payloads: Enable building depthcharge as part of the coreboot build For CHROMEOS builds, depthcharge can be built automatically. This dependency exists because depthcharge without vboot and subsequent signing of the image doesn't work very well, and both are keyed to that flag as well. Change-Id: Id0195bd3b4e454f382782106d6512469106daac5 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- .gitignore | 1 + payloads/Makefile.inc | 2 + payloads/external/Makefile.inc | 9 ++++ payloads/external/depthcharge/Kconfig | 7 +++ payloads/external/depthcharge/Kconfig.name | 8 ++++ payloads/external/depthcharge/Makefile.inc | 71 ++++++++++++++++++++++++++++++ 6 files changed, 98 insertions(+) diff --git a/.gitignore b/.gitignore index 7b3797f..912aa85 100644 --- a/.gitignore +++ b/.gitignore @@ -8,6 +8,7 @@ abuild*.xml .ccwrap build/ coreboot-builds/ +payloads/external/depthcharge/depthcharge/ payloads/external/FILO/filo/ payloads/external/GRUB2/grub2/ payloads/external/SeaBIOS/seabios/ diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc index 4269715..792df60 100644 --- a/payloads/Makefile.inc +++ b/payloads/Makefile.inc @@ -23,6 +23,7 @@ payloads/coreinfo/build/coreinfo.elf coreinfo: clean-payloads: $(MAKE) -C payloads/coreinfo clean $(MAKE) -C payloads/libpayload clean + $(MAKE) -C payloads/external/depthcharge -f Makefile.inc clean $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean $(MAKE) -C payloads/external/U-Boot -f Makefile.inc clean $(MAKE) -C payloads/external/Memtest86Plus -f Makefile.inc clean @@ -31,6 +32,7 @@ clean-payloads: distclean-payloads: $(MAKE) -C payloads/coreinfo distclean $(MAKE) -C payloads/libpayload distclean + $(MAKE) -C payloads/external/depthcharge -f Makefile.inc distclean $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc distclean $(MAKE) -C payloads/external/U-Boot -f Makefile.inc distclean $(MAKE) -C payloads/external/Memtest86Plus -f Makefile.inc distclean diff --git a/payloads/external/Makefile.inc b/payloads/external/Makefile.inc index 3c20e13..5a6f625 100644 --- a/payloads/external/Makefile.inc +++ b/payloads/external/Makefile.inc @@ -25,6 +25,10 @@ ifeq ($(CONFIG_PAYLOAD_FILO),y) PAYLOAD_CONFIG=payloads/external/FILO/filo/.config PAYLOAD_VERSION=payloads/external/FILO/filo/build/version.h endif +ifeq ($(CONFIG_PAYLOAD_DEPTHCHARGE),y) +PAYLOAD_CONFIG=payloads/external/depthcharge/depthcharge/.config +#TODO: Figure out version +endif cbfs-files-$(CONFIG_INCLUDE_CONFIG_FILE) += payload_config payload_config-file := $(PAYLOAD_CONFIG) @@ -59,6 +63,11 @@ payloads/external/SeaBIOS/seabios/out/vgabios.bin: seabios payloads/external/SeaBIOS/seabios/.config: payloads/external/SeaBIOS/seabios/out/bios.bin.elf payloads/external/SeaBIOS/seabios/out/autoversion.h: payloads/external/SeaBIOS/seabios/out/bios.bin.elf +payloads/external/depthcharge/depthcharge/build/depthcharge.elf depthcharge: $(top)/$(DOTCONFIG) $(CBFSTOOL) + $(MAKE) -C payloads/external/depthcharge -f Makefile.inc \ + BOARD=$(call ws_to_under,$(call strip_quotes,$(call tolower,$(CONFIG_MAINBOARD_PART_NUMBER)))) \ + MFLAGS= MAKEFLAGS= + filo: $(MAKE) -C payloads/external/FILO -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ diff --git a/payloads/external/depthcharge/Kconfig b/payloads/external/depthcharge/Kconfig new file mode 100644 index 0000000..84b36e5 --- /dev/null +++ b/payloads/external/depthcharge/Kconfig @@ -0,0 +1,7 @@ +if PAYLOAD_DEPTHCHARGE + +config PAYLOAD_FILE + string + default "payloads/external/depthcharge/depthcharge/build/depthcharge.elf" + +endif diff --git a/payloads/external/depthcharge/Kconfig.name b/payloads/external/depthcharge/Kconfig.name new file mode 100644 index 0000000..bc564ec --- /dev/null +++ b/payloads/external/depthcharge/Kconfig.name @@ -0,0 +1,8 @@ +config PAYLOAD_DEPTHCHARGE + bool "Depthcharge" + depends on CHROMEOS + help + Select this option if you want to build a coreboot image + with a depthcharge payload. + + See http://coreboot.org/Payloads for more information. diff --git a/payloads/external/depthcharge/Makefile.inc b/payloads/external/depthcharge/Makefile.inc new file mode 100644 index 0000000..4e76687 --- /dev/null +++ b/payloads/external/depthcharge/Makefile.inc @@ -0,0 +1,71 @@ +# release-R50-7978.B +STABLE_COMMIT_ID=124af94fa5599a0698e59bf3d73675eb52fc6879 + +project_name=depthcharge +project_dir=$(CURDIR)/depthcharge +project_git_repo=https://chromium.googlesource.com/chromiumos/platform/depthcharge +project_config_file=$(project_dir)/.config +output_dir=$(project_dir)/build +libpayload_dir=$(abspath $(CURDIR)/../../libpayload) +libpayload_install_dir=$(output_dir)/lp_$(BOARD) +vboot_dir=$(abspath $(CURDIR)/../../../3rdparty/vboot) + +TAG-$(DEPTHCHARGE_MASTER)=origin/master +TAG-$(DEPTHCHARGE_STABLE)=$(STABLE_COMMIT_ID) + +unexport KCONFIG_AUTOHEADER +unexport KCONFIG_AUTOCONFIG +unexport KCONFIG_DEPENDENCIES +unexport KCONFIG_SPLITCONFIG +unexport KCONFIG_TRISTATE +unexport KCONFIG_NEGATIVES +unexport src srck obj objk + +BOARD:=$(notdir $(CONFIG_MAINBOARD_DIR)) + +all: build + +$(project_dir): + echo " Cloning $(project_name) from Git" + git clone $(project_git_repo) + +fetch: $(project_dir) + cd $(project_dir); git show $(TAG-y) >/dev/null 2>&1 ; if [ $$? -ne 0 ] || \ + [ "$(TAG-y)" = "origin/master" ]; then \ + echo " Fetching new commits from the $(project_name) git repo"; \ + git fetch; fi + +checkout: fetch + echo " Checking out $(project_name) revision $(TAG-y)" + cd $(project_dir) ; git checkout master; git branch -D coreboot 2>/dev/null; git checkout -b coreboot $(TAG-y) + +$(libpayload_install_dir): $(project_dir) + test -f $(libpayload_dir)/configs/config.$(BOARD) || \ + (echo "Error: $(libpayload_dir)/configs/config.$(BOARD) is not present" && \ + false) + cp $(libpayload_dir)/configs/config.$(BOARD) $(libpayload_dir)/.config + $(MAKE) -C $(libpayload_dir) olddefconfig + $(MAKE) -C $(libpayload_dir) + $(MAKE) -C $(libpayload_dir) install DESTDIR=$(libpayload_install_dir) +# rm -f $(libpayload_dir)/.config + +config: $(libpayload_install_dir) checkout + echo " CONFIG project_name $(TAG-y)" + export VERSION=$$(cd depthcharge && \ + git describe --tags --long --dirty 2>/dev/null || \ + echo "unknown") ; \ + cd $(project_dir) && $(MAKE) BOARD=$(BOARD) LIBPAYLOAD_DIR=$(libpayload_install_dir)/libpayload \ + VB_SOURCE=$(vboot_dir) defconfig + +build: config + echo " MAKE $(project_name) $(TAG-y)" + cd $(project_dir) && $(MAKE) BOARD=$(BOARD) LIBPAYLOAD_DIR=$(libpayload_install_dir)/libpayload \ + VB_SOURCE=$(vboot_dir) PATH="$(abspath ../../../build/util/cbfstool):$$PATH" depthcharge_unified + +clean: + test -d $(output_dir) && rm -rf $(output_dir) || exit 0 + +distclean: + rm -rf $(project_dir) + +.PHONY: checkout config build clean distclean clone fetch

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Patch merged into coreboot/master: genbuild_h: Fix numeric comparison to remove error
by gerrit＠coreboot.org 14 Mar '16

14 Mar '16

the following patch was just integrated into master: commit 8ba235e2acf2c15ca5484ed51001d6555b082a51 Author: Martin Roth <martinroth(a)google.com> Date: Sat Mar 12 20:15:18 2016 -0700 genbuild_h: Fix numeric comparison to remove error Change the comparison of build_timeless from -eq to = This was generating an error if BUILD_TIMELESS wasn't set: util/genbuild_h/genbuild_h.sh: line 27: [: : integer expression expected This wasn't causing the script to fail, and won't even if 'set -e' is added to the script because the error happens inside an 'if' clause, which is specifically excluded from failue on 'set -e'. Change-Id: I6a4e147ece23e83ee682d72db35be9e5d4088c78 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/14080 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Alexander Couzens <lynxis(a)fe80.eu> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/14080 for details. -gerrit

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New patch to review for coreboot: vendorcode/intel/Kconfig: Add broadwell_de symbol to fix lint
by Martin Roth 14 Mar '16

14 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14091 -gerrit commit 0d58b28022dfe0ef3db75d089dabc67a0435db17 Author: Martin Roth <martinroth(a)google.com> Date: Mon Mar 14 15:16:48 2016 -0600 vendorcode/intel/Kconfig: Add broadwell_de symbol to fix lint The Kconfig lint tool is complaining because this symbol doesn't exist. Create a temporary definition that can be removed when the chipset is added. Change-Id: I6a8abffcc91773aae16721ee1f48c4c64bd6b486 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/vendorcode/intel/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/vendorcode/intel/Kconfig b/src/vendorcode/intel/Kconfig index 795ad93..5da3b2d 100644 --- a/src/vendorcode/intel/Kconfig +++ b/src/vendorcode/intel/Kconfig @@ -13,6 +13,11 @@ ## GNU General Public License for more details. ## +# Temporary definition: Add a symbol for broadwell DE until the actual +# chipset goes in. This fixes an issue with the Kconfig lint tool. +config SOC_INTEL_FSP_BROADWELL_DE + def_bool n + config FSP_VENDORCODE_HEADER_PATH string default "fsp1_0/ivybridge_bd82x6x" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_BD82X6X

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Patch set updated for coreboot: mediatek/mt8173: Enable 4GB mode
by Patrick Georgi 14 Mar '16

14 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14088 -gerrit commit 35fdcb34718a9cf266eba520bf064ab805597e8a Author: PH Hsu <ph.hsu(a)mediatek.com> Date: Wed Dec 16 13:48:10 2015 +0800 mediatek/mt8173: Enable 4GB mode If the system is using 4GB of memory, enable 4GB mode in the memory controller. Change-Id: I4d0f8ad8d43ff45dd786f4244b11c0879d2088cd Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 94c8b7ad911c93c4325113e7afc009f2f81d2275 Original-Change-Id: Ia3640882a46e695550e679dc70611855b64a560f Original-Signed-off-by: PH Hsu <ph.hsu(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/331811 Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- src/soc/mediatek/mt8173/emi.c | 14 ++++++++++++++ src/soc/mediatek/mt8173/include/soc/infracfg.h | 4 ++++ src/soc/mediatek/mt8173/include/soc/pericfg.h | 8 ++++++++ 3 files changed, 26 insertions(+) diff --git a/src/soc/mediatek/mt8173/emi.c b/src/soc/mediatek/mt8173/emi.c index 1ff4f23..9c89134 100644 --- a/src/soc/mediatek/mt8173/emi.c +++ b/src/soc/mediatek/mt8173/emi.c @@ -25,6 +25,8 @@ #include <soc/dramc_pi_api.h> #include <soc/mt6391.h> #include <soc/pll.h> +#include <soc/infracfg.h> +#include <soc/pericfg.h> struct emi_regs *emi_regs = (void *)EMI_BASE; @@ -163,6 +165,17 @@ size_t sdram_size(void) return ((size_t)1 << (bit_counter - 3)); } +static void init_4GB_mode(void) +{ + if (sdram_size() == (size_t)4 * GiB) { + setbits_le32(&mt8173_pericfg->axi_bus_ctl3, PERISYS_4G_SUPPORT); + setbits_le32(&mt8173_infracfg->infra_misc, DDR_4GB_SUPPORT_EN); + } else { + clrbits_le32(&mt8173_pericfg->axi_bus_ctl3, PERISYS_4G_SUPPORT); + clrbits_le32(&mt8173_infracfg->infra_misc, DDR_4GB_SUPPORT_EN); + } +} + void mt_set_emi(const struct mt8173_sdram_params *sdram_params) { /* voltage info */ @@ -175,4 +188,5 @@ void mt_set_emi(const struct mt8173_sdram_params *sdram_params) init_dram(sdram_params); do_calib(sdram_params); + init_4GB_mode(); } diff --git a/src/soc/mediatek/mt8173/include/soc/infracfg.h b/src/soc/mediatek/mt8173/include/soc/infracfg.h index 1277822..60a5209 100644 --- a/src/soc/mediatek/mt8173/include/soc/infracfg.h +++ b/src/soc/mediatek/mt8173/include/soc/infracfg.h @@ -118,4 +118,8 @@ enum { L2C_SRAM_PDN = 1 << 7 }; +enum { + DDR_4GB_SUPPORT_EN = 1 << 13 +}; + #endif /* __SOC_MEDIATEK_MT8173_INFRACFG_H__ */ diff --git a/src/soc/mediatek/mt8173/include/soc/pericfg.h b/src/soc/mediatek/mt8173/include/soc/pericfg.h index 335db10..8e3e477 100644 --- a/src/soc/mediatek/mt8173/include/soc/pericfg.h +++ b/src/soc/mediatek/mt8173/include/soc/pericfg.h @@ -89,4 +89,12 @@ enum { PERICFG_UART0_PDN = 1 << 19 }; +/* + * PERI 4GB control + */ + +enum { + PERISYS_4G_SUPPORT = 1 << 15 +}; + #endif /* __SOC_MEDIATEK_MT8173_PERICFG_H__ */

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Patch merged into coreboot/master: util/cbmem: Scale time stamp values correctly
by gerrit＠coreboot.org 14 Mar '16

14 Mar '16

the following patch was just integrated into master: commit 08e920e50dd18febb410b730d02b6180b3071c39 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sat Mar 12 08:41:34 2016 +0100 util/cbmem: Scale time stamp values correctly Commit c49014e (timestamp: add tick frequency to exported table) refactors the code, but forgets to correctly scale the frequency to megahertz, where the value is read from sysfs, so that printing time stamp information shows milliseconds instead of microseconds, as can be seen on the output `cbmem -t` for the ASRock E350M1 below. ``` 0:1st timestamp 515 10:start of ramstage 515 (0) 30:device enumeration 515 (0) 40:device configuration 610 (94) 50:device enable 614 (4) 60:device initialization 624 (9) 70:device setup done 639 (14) 75:cbmem post 844 (205) 80:write tables 844 (0) 90:load payload 849 (4) 15:starting LZMA decompress (ignore for x86) 849 (0) 16:finished LZMA decompress (ignore for x86) 869 (20) 99:selfboot jump 869 (0) Total Time: 350 ``` So scale the return value correctly to megahertz, by dividing it with 1000. ``` 0:1st timestamp 515,655 10:start of ramstage 515,655 (0) 30:device enumeration 515,663 (7) 40:device configuration 610,620 (94,957) 50:device enable 614,680 (4,059) 60:device initialization 624,618 (9,938) 70:device setup done 639,553 (14,934) 75:cbmem post 844,707 (205,154) 80:write tables 844,710 (2) 90:load payload 849,532 (4,821) 15:starting LZMA decompress (ignore for x86) 849,655 (123) 16:finished LZMA decompress (ignore for x86) 869,903 (20,247) 99:selfboot jump 869,922 (19) Total Time: 354,261 ``` Change-Id: Iea032c62487c7946b6194a90268755034c6350df Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: https://review.coreboot.org/14086 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth(a)google.com> Reviewed-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> See https://review.coreboot.org/14086 for details. -gerrit

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