coreboot-gerrit March 2016

coreboot-gerrit@coreboot.org

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1119 discussions

Patch set updated for coreboot: util/cbmem: Scale time stamp values correctly
by Paul Menzel 14 Mar '16

14 Mar '16

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14086 -gerrit commit 98544d6b4d694e03c8b8de899f9a87dfc2a19b70 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sat Mar 12 08:41:34 2016 +0100 util/cbmem: Scale time stamp values correctly Commit c49014e (timestamp: add tick frequency to exported table) refactors the code, but forgets to correctly scale the frequency to megahertz, where the value is read from sysfs, so that printing time stamp information shows milliseconds instead of microseconds, as can be seen on the output `cbmem -t` for the ASRock E350M1 below. ``` 0:1st timestamp 515 10:start of ramstage 515 (0) 30:device enumeration 515 (0) 40:device configuration 610 (94) 50:device enable 614 (4) 60:device initialization 624 (9) 70:device setup done 639 (14) 75:cbmem post 844 (205) 80:write tables 844 (0) 90:load payload 849 (4) 15:starting LZMA decompress (ignore for x86) 849 (0) 16:finished LZMA decompress (ignore for x86) 869 (20) 99:selfboot jump 869 (0) Total Time: 350 ``` So scale the return value correctly to megahertz, by dividing it with 1000. ``` 0:1st timestamp 515,655 10:start of ramstage 515,655 (0) 30:device enumeration 515,663 (7) 40:device configuration 610,620 (94,957) 50:device enable 614,680 (4,059) 60:device initialization 624,618 (9,938) 70:device setup done 639,553 (14,934) 75:cbmem post 844,707 (205,154) 80:write tables 844,710 (2) 90:load payload 849,532 (4,821) 15:starting LZMA decompress (ignore for x86) 849,655 (123) 16:finished LZMA decompress (ignore for x86) 869,903 (20,247) 99:selfboot jump 869,922 (19) Total Time: 354,261 ``` Change-Id: Iea032c62487c7946b6194a90268755034c6350df Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- util/cbmem/cbmem.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c index 4c563c8..5cc55da 100644 --- a/util/cbmem/cbmem.c +++ b/util/cbmem/cbmem.c @@ -362,7 +362,7 @@ static int parse_cbtable(u64 address, size_t table_size, uint8_t abort_on_failur #if defined(linux) && (defined(__i386__) || defined(__x86_64__)) /* - * read CPU frequency from a sysfs file, return an frequency in Kilohertz as + * read CPU frequency from a sysfs file, return an frequency in Megahertz as * an int or exit on any error. */ static unsigned long arch_tick_frequency(void) @@ -394,7 +394,8 @@ static unsigned long arch_tick_frequency(void) rv = strtoull(freqs, &endp, 10); if (*endp == '\0' || *endp == '\n') - return rv; + /* cpuinfo_max_freq is in kHz. Convert it to MHz. */ + return rv / 1000; fprintf(stderr, "Wrong formatted value ^%s^ read from %s\n", freqs, freq_file); exit(1);

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Patch merged into coreboot/master: vendorcode/intel/fsp1_0: Add Broadwell-DE SoC vendor code
by gerrit＠coreboot.org 14 Mar '16

14 Mar '16

the following patch was just integrated into master: commit 15fca66bf08db45937ce88b950491963654805b9 Author: York Yang <york.yang(a)intel.com> Date: Thu Mar 10 10:48:30 2016 -0700 vendorcode/intel/fsp1_0: Add Broadwell-DE SoC vendor code Initial vendor codes to support Broadwell-DE SoC. This is FSP 1.0 based project and is based on Broadwell-DE Gold release. Change has been verified on Intel Camelback Mountain CRB. Change-Id: I9262c9d70a58f0c7427f0658948adf080f2f6d8f Signed-off-by: York Yang <york.yang(a)intel.com> Reviewed-on: https://review.coreboot.org/14030 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth(a)google.com> See https://review.coreboot.org/14030 for details. -gerrit

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Patch merged into coreboot/master: intel/fsp_baytrail: Enable LPSS in ACPI mode
by gerrit＠coreboot.org 14 Mar '16

14 Mar '16

the following patch was just integrated into master: commit 08bfba4f02f8d437357dba1a9523a9891ebd1351 Author: Ben Gardner <gardner.ben(a)gmail.com> Date: Fri Mar 11 16:29:54 2016 -0600 intel/fsp_baytrail: Enable LPSS in ACPI mode This change fixes LPSS ACPI mode. Previously, enabling ACPI mode would result in unusable devices, as the resources were set to 0 and the devices were disabled. lpss.c was copied from intel/baytrail with a few minor adjustment for the different config structure. ACPI mode requires setting PcdLpssSioEnablePciMode==LPSS_PCI_MODE_DISABLE and applying the patch that disables clearing gnvs. https://review.coreboot.org/#/c/14040/ This doesn't handle the case where the FSP has PcdLpssSioEnablePciMode set to disable and the devicetree set to default. Change-Id: I12fffea3820ed948defe7a4f11af6b6363402560 Signed-off-by: Ben Gardner <gardner.ben(a)gmail.com> Reviewed-on: https://review.coreboot.org/14042 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth(a)google.com> See https://review.coreboot.org/14042 for details. -gerrit

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New patch to review for coreboot: util/nvidia/cbootimage: update to latest master
by Patrick Georgi 14 Mar '16

14 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14090 -gerrit commit edb38a0ca3fd0460505492c70ca2eef3bbfb0f3d Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Mon Mar 14 17:16:33 2016 +0100 util/nvidia/cbootimage: update to latest master This includes a fix that allows using cbootimage with paths containing the "@" sign, which happens sometimes in jenkins configurations. Change-Id: I83154afa35b6d24449e713e57031b1a93d7ac748 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- util/nvidia/cbootimage | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/nvidia/cbootimage b/util/nvidia/cbootimage index b7d5b2d..efe19b2 160000 --- a/util/nvidia/cbootimage +++ b/util/nvidia/cbootimage @@ -1 +1 @@ -Subproject commit b7d5b2d6a6dd05874d86ee900ff441d261f9034c +Subproject commit efe19b2eb9db7bb3ba913f0af7d5ececb173fe82

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Patch set updated for coreboot: mainboard/emulation/qemu-power8: Use correct bootblock location
by Timothy Pearson 14 Mar '16

14 Mar '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14020 -gerrit commit 4f7417b84ddfe9ecb6f8273ff64bacda8f0c77d3 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Wed Mar 9 17:22:10 2016 -0600 mainboard/emulation/qemu-power8: Use correct bootblock location Change-Id: Ia1e8f7c11708208638f83dc1058f1754e69d4d0c Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/mainboard/emulation/qemu-power8/memlayout.ld | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mainboard/emulation/qemu-power8/memlayout.ld b/src/mainboard/emulation/qemu-power8/memlayout.ld index 2daad30..da0f4a5 100644 --- a/src/mainboard/emulation/qemu-power8/memlayout.ld +++ b/src/mainboard/emulation/qemu-power8/memlayout.ld @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2016 Raptor Engineering, LLC * Copyright 2014 Google Inc. * * This program is free software; you can redistribute it and/or modify @@ -21,7 +22,7 @@ SECTIONS { DRAM_START(0x0) - BOOTBLOCK(0x0, 64K) + BOOTBLOCK(0x100, 64K) ROMSTAGE(0x20000, 128K) STACK(0x40000, 0x3ff00) PRERAM_CBMEM_CONSOLE(0x80000, 8K)

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Patch set updated for coreboot: arch/power8: Position bootblock start at reset vector
by Timothy Pearson 14 Mar '16

14 Mar '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14019 -gerrit commit 7e14c48a67d33586edc6a6140b9dddf1b63071b7 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Wed Mar 9 17:21:33 2016 -0600 arch/power8: Position bootblock start at reset vector Change-Id: I99c3b4dd0c4da41b99bc108977079c8069afc0bd Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/arch/power8/Makefile.inc | 5 ++++- src/arch/power8/bootblock.S | 4 +++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/arch/power8/Makefile.inc b/src/arch/power8/Makefile.inc index 54e97f9..55c5470 100644 --- a/src/arch/power8/Makefile.inc +++ b/src/arch/power8/Makefile.inc @@ -2,6 +2,7 @@ ## ## This file is part of the coreboot project. ## +## Copyright (C) 2016 Raptor Engineering, LLC ## Copyright (C) 2014 The ChromiumOS Authors ## ## This program is free software; you can redistribute it and/or modify @@ -15,7 +16,7 @@ ## ################################################################################ -power8_flags = -I$(src)/arch/power8/ +power8_flags = -I$(src)/arch/power8/ -mbig-endian -mcpu=power8 -mtune=power8 power8_asm_flags = @@ -34,6 +35,8 @@ bootblock-y += \ $(top)/src/lib/memmove.c \ $(top)/src/lib/memset.c +bootblock-generic-ccopts += $(power8_flags) + $(objcbfs)/bootblock.debug: $$(bootblock-objs) @printf " LINK $(subst $(obj)/,,$(@))\n" $(LD_bootblock) $(LDFLAGS_bootblock) -o $@ -L$(obj) \ diff --git a/src/arch/power8/bootblock.S b/src/arch/power8/bootblock.S index 3b864aa..77289a1 100644 --- a/src/arch/power8/bootblock.S +++ b/src/arch/power8/bootblock.S @@ -1,6 +1,7 @@ /* - * Early initialization code for power8. + * Early initialization code for POWER8. * + * Copyright 2016 Raptor Engineering, LLC * Copyright 2013 Google Inc. * * This program is free software; you can redistribute it and/or @@ -16,6 +17,7 @@ .section ".text._start", "ax", %progbits .globl _start +.org 0x100, 0xff _start: b _start .section ".id", "a", %progbits

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Patch set updated for coreboot: intel/fsp_baytrail: Enable LPSS in ACPI mode
by Ben Gardner 14 Mar '16

14 Mar '16

Ben Gardner (gardner.ben(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14042 -gerrit commit e2bb70f7d31c8d0439af82799555cd348b3aa7e3 Author: Ben Gardner <gardner.ben(a)gmail.com> Date: Fri Mar 11 16:29:54 2016 -0600 intel/fsp_baytrail: Enable LPSS in ACPI mode This change fixes LPSS ACPI mode. Previously, enabling ACPI mode would result in unusable devices, as the resources were set to 0 and the devices were disabled. lpss.c was copied from intel/baytrail with a few minor adjustment for the different config structure. ACPI mode requires setting PcdLpssSioEnablePciMode==LPSS_PCI_MODE_DISABLE and applying the patch that disables clearing gnvs. https://review.coreboot.org/#/c/14040/ This doesn't handle the case where the FSP has PcdLpssSioEnablePciMode set to disable and the devicetree set to default. Change-Id: I12fffea3820ed948defe7a4f11af6b6363402560 Signed-off-by: Ben Gardner <gardner.ben(a)gmail.com> --- src/soc/intel/fsp_baytrail/Makefile.inc | 1 + src/soc/intel/fsp_baytrail/lpss.c | 202 ++++++++++++++++++++++++++++++++ 2 files changed, 203 insertions(+) diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc index 65eb55f..92b5f98 100644 --- a/src/soc/intel/fsp_baytrail/Makefile.inc +++ b/src/soc/intel/fsp_baytrail/Makefile.inc @@ -50,6 +50,7 @@ ramstage-y += reset.c ramstage-y += cpu.c ramstage-y += acpi.c ramstage-y += lpe.c +ramstage-y += lpss.c smm-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smm.c diff --git a/src/soc/intel/fsp_baytrail/lpss.c b/src/soc/intel/fsp_baytrail/lpss.c new file mode 100644 index 0000000..427fc6d --- /dev/null +++ b/src/soc/intel/fsp_baytrail/lpss.c @@ -0,0 +1,202 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <arch/io.h> +#include <cbmem.h> +#include <console/console.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <reg_script.h> + +#include <soc/iosf.h> +#include <soc/nvs.h> +#include <soc/pci_devs.h> +#include <soc/ramstage.h> + +#include "chip.h" + +static void dev_enable_acpi_mode(device_t dev, int iosf_reg, int nvs_index) +{ + struct reg_script ops[] = { + /* Disable PCI interrupt, enable Memory and Bus Master */ + REG_PCI_OR32(PCI_COMMAND, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | (1<<10)), + /* Enable ACPI mode */ + REG_IOSF_OR(IOSF_PORT_LPSS, iosf_reg, + LPSS_CTL_PCI_CFG_DIS | LPSS_CTL_ACPI_INT_EN), + REG_SCRIPT_END + }; + struct resource *bar; + global_nvs_t *gnvs; + + /* Find ACPI NVS to update BARs */ + gnvs = (global_nvs_t *)cbmem_find(CBMEM_ID_ACPI_GNVS); + if (!gnvs) { + printk(BIOS_ERR, "Unable to locate Global NVS\n"); + return; + } + + /* Save BAR0 and BAR1 to ACPI NVS */ + bar = find_resource(dev, PCI_BASE_ADDRESS_0); + if (bar) + gnvs->dev.lpss_bar0[nvs_index] = (u32)bar->base; + + bar = find_resource(dev, PCI_BASE_ADDRESS_1); + if (bar) + gnvs->dev.lpss_bar1[nvs_index] = (u32)bar->base; + + /* Device is enabled in ACPI mode */ + gnvs->dev.lpss_en[nvs_index] = 1; + + /* Put device in ACPI mode */ + reg_script_run_on_dev(dev, ops); +} + +static void dev_enable_snoop_and_pm(device_t dev, int iosf_reg) +{ + struct reg_script ops[] = { + REG_IOSF_RMW(IOSF_PORT_LPSS, iosf_reg, + ~(LPSS_CTL_SNOOP | LPSS_CTL_NOSNOOP), + LPSS_CTL_SNOOP | LPSS_CTL_PM_CAP_PRSNT), + REG_SCRIPT_END, + }; + + reg_script_run_on_dev(dev, ops); +} + +static void dev_ctl_reg(device_t dev, int *iosf_reg, int *nvs_index) +{ + *iosf_reg = -1; + *nvs_index = -1; +#define SET_IOSF_REG(name_) \ + case PCI_DEVFN(name_ ## _DEV, name_ ## _FUNC): \ + *iosf_reg = LPSS_ ## name_ ## _CTL; \ + *nvs_index = LPSS_NVS_ ## name_ + + switch (dev->path.pci.devfn) { + SET_IOSF_REG(SIO_DMA1); + break; + SET_IOSF_REG(I2C1); + break; + SET_IOSF_REG(I2C2); + break; + SET_IOSF_REG(I2C3); + break; + SET_IOSF_REG(I2C4); + break; + SET_IOSF_REG(I2C5); + break; + SET_IOSF_REG(I2C6); + break; + SET_IOSF_REG(I2C7); + break; + SET_IOSF_REG(SIO_DMA2); + break; + SET_IOSF_REG(PWM1); + break; + SET_IOSF_REG(PWM2); + break; + SET_IOSF_REG(HSUART1); + break; + SET_IOSF_REG(HSUART2); + break; + SET_IOSF_REG(SPI); + break; + } +} + +static void i2c_disable_resets(device_t dev) +{ + /* Release the I2C devices from reset. */ + static const struct reg_script ops[] = { + REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0x804, 0x3), + REG_SCRIPT_END, + }; + +#define CASE_I2C(name_) \ + case PCI_DEVFN(name_ ## _DEV, name_ ## _FUNC) + + switch (dev->path.pci.devfn) { + CASE_I2C(I2C1): + CASE_I2C(I2C2): + CASE_I2C(I2C3): + CASE_I2C(I2C4): + CASE_I2C(I2C5): + CASE_I2C(I2C6): + CASE_I2C(I2C7): + printk(BIOS_DEBUG, "Releasing I2C device from reset.\n"); + reg_script_run_on_dev(dev, ops); + break; + default: + return; + } +} + +static void lpss_init(device_t dev) +{ + struct soc_intel_fsp_baytrail_config *config = dev->chip_info; + int iosf_reg, nvs_index; + + dev_ctl_reg(dev, &iosf_reg, &nvs_index); + + if (iosf_reg < 0) { + int slot = PCI_SLOT(dev->path.pci.devfn); + int func = PCI_FUNC(dev->path.pci.devfn); + printk(BIOS_DEBUG, "Could not find iosf_reg for %02x.%01x\n", + slot, func); + return; + } + dev_enable_snoop_and_pm(dev, iosf_reg); + i2c_disable_resets(dev); + + if (config->PcdLpssSioEnablePciMode == LPSS_PCI_MODE_DISABLE) + dev_enable_acpi_mode(dev, iosf_reg, nvs_index); +} + +static struct device_operations device_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = lpss_init, + .enable = NULL, + .scan_bus = NULL, + .ops_pci = &soc_pci_ops, +}; + +static const unsigned short pci_device_ids[] = { + SIO_DMA1_DEVID, + I2C1_DEVID, + I2C2_DEVID, + I2C3_DEVID, + I2C4_DEVID, + I2C5_DEVID, + I2C6_DEVID, + I2C7_DEVID, + SIO_DMA2_DEVID, + PWM1_DEVID, + PWM2_DEVID, + HSUART1_DEVID, + HSUART2_DEVID, + SPI_DEVID, + 0, +}; + +static const struct pci_driver southcluster __pci_driver = { + .ops = &device_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .devices = pci_device_ids, +};

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Patch set updated for coreboot: TPM: Merge of two TPM API's into one API.
by Georg Wicherski 14 Mar '16

14 Mar '16

Georg Wicherski (gw(a)oxff.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/10542 -gerrit commit dd26c96f776d21c00a8169c8cdef4e0f0ed5bbc4 Author: Philipp Deppenwiese <zaolin(a)das-labor.org> Date: Sat Jun 13 23:35:37 2015 +0200 TPM: Merge of two TPM API's into one API. Currently coreboot includes two TPM software implementations. Following changes are done: + Split LPC/I2C tpm driver implementation into two directories in src/drivers/tpm/ . + Moved pc80/tpm to tpm directory because it's not pc80 specific. + Use Google's lib/tlcl.* small tpm software stack as the main one. + Remove the old one drivers/pc80/tpm/romstage.c which can't be used for vboot2. + Split & Merge implementations into TSS and TSPI. -> Rename tlcl* files into tss which is the common name. -> Move init_tpm(void) function from drivers/pc80/tpm/romstage.c into the lib/tpm/tspi.c which is also the common name for highlevel tpm functions based on tss. -> Put the tss and tspi files into tpm folders in lib/ and include/ . -> Change header includes so that tpm.h can be found in include/pc80/ and software stack related stuff in include/tpm. + Revert pragma once statements from previous commit. Compile: VBOOT2 Feature = yes Coreboot TPM Feature = yes Run: VBOOT2 Feature = not tested Coreboot TPM Feature = yes Change-Id: I8cbcd723d83ffcc0c1c47c58438dccdb16bb7cf7 Signed-off-by: Philipp Deppenwiese <zaolin(a)das-labor.org> --- src/cpu/intel/haswell/romstage.c | 2 +- src/drivers/i2c/tpm/Kconfig | 13 - src/drivers/i2c/tpm/Makefile.inc | 4 - src/drivers/i2c/tpm/tis.c | 194 ------ src/drivers/i2c/tpm/tpm.c | 551 --------------- src/drivers/i2c/tpm/tpm.h | 128 ---- src/drivers/intel/fsp1_1/romstage.c | 3 +- src/drivers/pc80/Kconfig | 2 - src/drivers/pc80/Makefile.inc | 2 +- src/drivers/pc80/tpm/Kconfig | 54 -- src/drivers/pc80/tpm/Makefile.inc | 4 - src/drivers/pc80/tpm/acpi/tpm.asl | 219 ------ src/drivers/pc80/tpm/chip.h | 31 - src/drivers/pc80/tpm/romstage.c | 251 ------- src/drivers/pc80/tpm/tpm.c | 769 -------------------- src/drivers/tpm/Kconfig | 24 + src/drivers/tpm/Makefile.inc | 1 + src/drivers/tpm/acpi/tpm.asl | 219 ++++++ src/drivers/tpm/i2c/Kconfig | 13 + src/drivers/tpm/i2c/Makefile.inc | 4 + src/drivers/tpm/i2c/chip.h | 98 +++ src/drivers/tpm/i2c/tpm.c | 721 +++++++++++++++++++ src/drivers/tpm/lpc/Kconfig | 32 + src/drivers/tpm/lpc/Makefile.inc | 4 + src/drivers/tpm/lpc/chip.h | 31 + src/drivers/tpm/lpc/tpm.c | 772 +++++++++++++++++++++ src/include/antirollback.h | 2 +- src/include/tpm.h | 67 -- src/include/tpm/tpm.h | 71 ++ src/include/tpm/tspi.h | 26 + src/include/tpm/tss.h | 136 ++++ src/include/tpm/tss_constants.h | 97 +++ src/include/tpm_lite/tlcl.h | 137 ---- src/include/tpm_lite/tss_constants.h | 96 --- src/lib/Makefile.inc | 8 +- src/lib/mocked_tlcl.c | 132 ---- src/lib/tlcl.c | 327 --------- src/lib/tlcl_internal.h | 61 -- src/lib/tlcl_structures.h | 138 ---- src/lib/tpm/Makefile.inc | 13 + src/lib/tpm/mocked_tss.c | 141 ++++ src/lib/tpm/tspi.c | 92 +++ src/lib/tpm/tss.c | 356 ++++++++++ src/lib/tpm/tss_internal.h | 65 ++ src/lib/tpm/tss_structures.h | 142 ++++ src/mainboard/google/auron/acpi/mainboard.asl | 2 +- src/mainboard/google/auron/devicetree.cb | 2 +- .../google/auron_paine/acpi/mainboard.asl | 2 +- src/mainboard/google/auron_paine/devicetree.cb | 2 +- src/mainboard/google/chell/acpi/mainboard.asl | 2 +- src/mainboard/google/chell/devicetree.cb | 2 +- src/mainboard/google/cyan/acpi/mainboard.asl | 2 +- src/mainboard/google/cyan/devicetree.cb | 2 +- src/mainboard/google/glados/acpi/mainboard.asl | 2 +- src/mainboard/google/glados/devicetree.cb | 2 +- src/mainboard/google/jecht/acpi/mainboard.asl | 2 +- src/mainboard/google/lars/acpi/mainboard.asl | 2 +- src/mainboard/google/lars/devicetree.cb | 2 +- src/mainboard/google/link/romstage.c | 2 +- src/mainboard/google/parrot/romstage.c | 2 +- src/mainboard/google/samus/acpi/mainboard.asl | 2 +- src/mainboard/google/samus/devicetree.cb | 2 +- src/mainboard/google/stout/romstage.c | 2 +- src/mainboard/intel/emeraldlake2/romstage.c | 2 +- src/mainboard/intel/kunimitsu/acpi/mainboard.asl | 2 +- src/mainboard/intel/kunimitsu/devicetree.cb | 2 +- src/mainboard/intel/strago/acpi/mainboard.asl | 2 +- src/mainboard/intel/strago/devicetree.cb | 2 +- src/mainboard/lenovo/t420s/devicetree.cb | 2 +- src/mainboard/lenovo/t420s/dsdt.asl | 2 +- src/mainboard/lenovo/t430s/devicetree.cb | 2 +- src/mainboard/lenovo/t430s/dsdt.asl | 2 +- src/mainboard/lenovo/t520/devicetree.cb | 2 +- src/mainboard/lenovo/t520/dsdt.asl | 2 +- src/mainboard/lenovo/t530/devicetree.cb | 2 +- src/mainboard/lenovo/t530/dsdt.asl | 2 +- src/mainboard/lenovo/x201/devicetree.cb | 2 +- src/mainboard/lenovo/x201/dsdt.asl | 2 +- src/mainboard/lenovo/x201/romstage.c | 2 +- src/mainboard/lenovo/x220/devicetree.cb | 2 +- src/mainboard/lenovo/x220/dsdt.asl | 2 +- src/mainboard/lenovo/x230/devicetree.cb | 2 +- src/mainboard/lenovo/x230/dsdt.asl | 2 +- src/mainboard/samsung/lumpy/romstage.c | 2 +- src/mainboard/samsung/stumpy/romstage.c | 2 +- src/northbridge/intel/sandybridge/romstage.c | 4 +- src/soc/intel/baytrail/romstage/romstage.c | 2 +- src/soc/intel/braswell/romstage/romstage.c | 2 +- src/soc/intel/broadwell/romstage/romstage.c | 2 +- .../google/chromeos/vboot2/antirollback.c | 4 +- 90 files changed, 3112 insertions(+), 3235 deletions(-) diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 9932a50..8d6c0f3 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -40,7 +40,7 @@ #include "northbridge/intel/haswell/raminit.h" #include "southbridge/intel/lynxpoint/pch.h" #include "southbridge/intel/lynxpoint/me.h" -#include <tpm.h> +#include <tpm/tspi.h> static inline void reset_system(void) { diff --git a/src/drivers/i2c/tpm/Kconfig b/src/drivers/i2c/tpm/Kconfig deleted file mode 100644 index f2b969f..0000000 --- a/src/drivers/i2c/tpm/Kconfig +++ /dev/null @@ -1,13 +0,0 @@ -config I2C_TPM - bool "I2C TPM" - depends on !PC80_SYSTEM # for now - -config DRIVER_TPM_I2C_BUS - hex "I2C TPM chip bus" - default 9 # FIXME, workaround for Kconfig BS - depends on I2C_TPM - -config DRIVER_TPM_I2C_ADDR - hex "I2C TPM chip address" - default 2 # FIXME, workaround for Kconfig BS - depends on I2C_TPM diff --git a/src/drivers/i2c/tpm/Makefile.inc b/src/drivers/i2c/tpm/Makefile.inc deleted file mode 100644 index 4f5913f..0000000 --- a/src/drivers/i2c/tpm/Makefile.inc +++ /dev/null @@ -1,4 +0,0 @@ -ramstage-$(CONFIG_I2C_TPM) += tis.c tpm.c -romstage-$(CONFIG_I2C_TPM) += tis.c tpm.c -verstage-$(CONFIG_I2C_TPM) += tis.c tpm.c -bootblock-$(CONFIG_I2C_TPM) += tis.c tpm.c diff --git a/src/drivers/i2c/tpm/tis.c b/src/drivers/i2c/tpm/tis.c deleted file mode 100644 index 0404109..0000000 --- a/src/drivers/i2c/tpm/tis.c +++ /dev/null @@ -1,194 +0,0 @@ -/* - * Copyright (C) 2011 Infineon Technologies - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but without any warranty; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <stdint.h> -#include <string.h> -#include <assert.h> -#include <delay.h> -#include <device/i2c.h> -#include <endian.h> -#include <tpm.h> -#include "tpm.h" -#include <timer.h> - -#include <console/console.h> - -/* global structure for tpm chip data */ -struct tpm_chip g_chip; - -#define TPM_CMD_COUNT_BYTE 2 -#define TPM_CMD_ORDINAL_BYTE 6 -#define TPM_VALID_STATUS (1 << 7) - -int tis_open(void) -{ - int rc; - - if (g_chip.is_open) { - printk(BIOS_DEBUG, "tis_open() called twice.\n"); - return -1; - } - - rc = tpm_vendor_init(CONFIG_DRIVER_TPM_I2C_BUS, - CONFIG_DRIVER_TPM_I2C_ADDR); - - if (rc < 0) - g_chip.is_open = 0; - - if (rc) { - return -1; - } - - return 0; -} - -int tis_close(void) -{ - if (g_chip.is_open) { - tpm_vendor_cleanup(&g_chip); - g_chip.is_open = 0; - } - - return 0; -} - -int tis_init(void) -{ - int bus = CONFIG_DRIVER_TPM_I2C_BUS; - int chip = CONFIG_DRIVER_TPM_I2C_ADDR; - struct stopwatch sw; - uint8_t buf = 0; - int ret; - long sw_run_duration = 750; - - /* - * Probe TPM. Check if the TPM_ACCESS register's ValidSts bit is set(1) - * If the bit remains clear(0) then claim that init has failed. - */ - stopwatch_init_msecs_expire(&sw, sw_run_duration); - do { - ret = i2c_readb(bus, chip, 0, &buf); - if (!ret && (buf & TPM_VALID_STATUS)) { - sw_run_duration = stopwatch_duration_msecs(&sw); - break; - } - } while (!stopwatch_expired(&sw)); - - printk(BIOS_INFO, - "%s: ValidSts bit %s(%d) in TPM_ACCESS register after %ld ms\n", - __func__, (buf & TPM_VALID_STATUS) ? "set" : "clear", - (buf & TPM_VALID_STATUS) >> 7, sw_run_duration); - - /* - * Claim failure if the ValidSts (bit 7) is clear. - */ - if (!(buf & TPM_VALID_STATUS)) - return -1; - - return 0; -} - -static ssize_t tpm_transmit(const uint8_t *buf, size_t bufsiz) -{ - int rc; - uint32_t count, ordinal; - - struct tpm_chip *chip = &g_chip; - - memcpy(&count, buf + TPM_CMD_COUNT_BYTE, sizeof(count)); - count = be32_to_cpu(count); - memcpy(&ordinal, buf + TPM_CMD_ORDINAL_BYTE, sizeof(ordinal)); - ordinal = be32_to_cpu(ordinal); - - if (count == 0) { - printk(BIOS_DEBUG, "tpm_transmit: no data\n"); - return -1; - } - if (count > bufsiz) { - printk(BIOS_DEBUG, "tpm_transmit: invalid count value %x %zx\n", - count, bufsiz); - return -1; - } - - ASSERT(chip->vendor.send); - rc = chip->vendor.send(chip, (uint8_t *) buf, count); - if (rc < 0) { - printk(BIOS_DEBUG, "tpm_transmit: tpm_send error\n"); - goto out; - } - - if (chip->vendor.irq) - goto out_recv; - - int timeout = 2 * 60 * 1000; /* two minutes timeout */ - while (timeout) { - ASSERT(chip->vendor.status); - uint8_t status = chip->vendor.status(chip); - if ((status & chip->vendor.req_complete_mask) == - chip->vendor.req_complete_val) { - goto out_recv; - } - - if ((status == chip->vendor.req_canceled)) { - printk(BIOS_DEBUG, "tpm_transmit: Operation Canceled\n"); - rc = -1; - goto out; - } - mdelay(TPM_TIMEOUT); - timeout--; - } - - ASSERT(chip->vendor.cancel); - chip->vendor.cancel(chip); - printk(BIOS_DEBUG, "tpm_transmit: Operation Timed out\n"); - rc = -1; //ETIME; - goto out; - -out_recv: - - rc = chip->vendor.recv(chip, (uint8_t *) buf, TPM_BUFSIZE); - if (rc < 0) - printk(BIOS_DEBUG, "tpm_transmit: tpm_recv: error %d\n", rc); -out: - return rc; -} - -int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size, - uint8_t *recvbuf, size_t *rbuf_len) -{ - uint8_t buf[TPM_BUFSIZE]; - - if (sizeof(buf) < sbuf_size) - return -1; - - memcpy(buf, sendbuf, sbuf_size); - - int len = tpm_transmit(buf, sbuf_size); - - if (len < 10) { - *rbuf_len = 0; - return -1; - } - - if (len > *rbuf_len) { - *rbuf_len = len; - return -1; - } - - memcpy(recvbuf, buf, len); - *rbuf_len = len; - - return 0; -} diff --git a/src/drivers/i2c/tpm/tpm.c b/src/drivers/i2c/tpm/tpm.c deleted file mode 100644 index 306005f..0000000 --- a/src/drivers/i2c/tpm/tpm.c +++ /dev/null @@ -1,551 +0,0 @@ -/* - * Copyright (C) 2011 Infineon Technologies - * - * Authors: - * Peter Huewe <huewe.external(a)infineon.com> - * - * Description: - * Device driver for TCG/TCPA TPM (trusted platform module). - * Specifications at www.trustedcomputinggroup.org - * - * This device driver implements the TPM interface as defined in - * the TCG TPM Interface Spec version 1.2, revision 1.0 and the - * Infineon I2C Protocol Stack Specification v0.20. - * - * It is based on the Linux kernel driver tpm.c from Leendert van - * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall. - * - * Version: 2.1.1 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation, version 2 of the - * License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <stdint.h> -#include <string.h> -#include <types.h> -#include <delay.h> -#include <console/console.h> -#include <device/i2c.h> -#include <endian.h> -#include "tpm.h" - -/* Address of the TPM on the I2C bus */ -#define TPM_I2C_ADDR 0x20 - -/* max. number of iterations after I2C NAK */ -#define MAX_COUNT 3 - -#define SLEEP_DURATION 60 /* in usec */ - -/* max. number of iterations after I2C NAK for 'long' commands - * we need this especially for sending TPM_READY, since the cleanup after the - * transtion to the ready state may take some time, but it is unpredictable - * how long it will take. - */ -#define MAX_COUNT_LONG 50 - -#define SLEEP_DURATION_LONG 210 /* in usec */ - -/* expected value for DIDVID register */ -#define TPM_TIS_I2C_DID_VID_9635 0x000b15d1L -#define TPM_TIS_I2C_DID_VID_9645 0x001a15d1L - -enum i2c_chip_type { - SLB9635, - SLB9645, - UNKNOWN, -}; - -static const char * const chip_name[] = { - [SLB9635] = "slb9635tt", - [SLB9645] = "slb9645tt", - [UNKNOWN] = "unknown/fallback to slb9635", -}; - -/* Structure to store I2C TPM specific stuff */ -struct tpm_inf_dev { - int bus; - unsigned int addr; - uint8_t buf[TPM_BUFSIZE + sizeof(uint8_t)]; // max. buffer size + addr - enum i2c_chip_type chip_type; -}; - -static struct tpm_inf_dev tpm_dev = { - .bus = -1, - .addr = TPM_I2C_ADDR -}; - -/* - * iic_tpm_read() - read from TPM register - * @addr: register address to read from - * @buffer: provided by caller - * @len: number of bytes to read - * - * Read len bytes from TPM register and put them into - * buffer (little-endian format, i.e. first byte is put into buffer[0]). - * - * NOTE: TPM is big-endian for multi-byte values. Multi-byte - * values have to be swapped. - * - * Return -1 on error, 0 on success. - */ -static int iic_tpm_read(uint8_t addr, uint8_t *buffer, size_t len) -{ - int rc; - int count; - - if (tpm_dev.bus < 0) - return -1; - if ((tpm_dev.chip_type == SLB9635) || (tpm_dev.chip_type == UNKNOWN)) { - /* slb9635 protocol should work in both cases */ - for (count = 0; count < MAX_COUNT; count++) { - rc = i2c_write_raw(tpm_dev.bus, tpm_dev.addr, &addr, 1); - if (rc == 0) - break; /* success, break to skip sleep */ - - udelay(SLEEP_DURATION); - } - - if (rc) - return -1; - - /* After the TPM has successfully received the register address - * it needs some time, thus we're sleeping here again, before - * retrieving the data - */ - for (count = 0; count < MAX_COUNT; count++) { - udelay(SLEEP_DURATION); - rc = i2c_read_raw(tpm_dev.bus, tpm_dev.addr, - buffer, len); - if (rc == 0) - break; /* success, break to skip sleep */ - - } - } else { - /* use a combined read for newer chips - * unfortunately the smbus functions are not suitable due to - * the 32 byte limit of the smbus. - * retries should usually not be needed, but are kept just to - * be safe on the safe side. - */ - struct i2c_seg aseg = { .read = 0, .chip = tpm_dev.addr, - .buf = &addr, .len = 1 }; - struct i2c_seg dseg = { .read = 1, .chip = tpm_dev.addr, - .buf = buffer, .len = len }; - for (count = 0; count < MAX_COUNT; count++) { - rc = i2c_transfer(tpm_dev.bus, &aseg, 1) || - i2c_transfer(tpm_dev.bus, &dseg, 1); - if (rc == 0) - break; /* break here to skip sleep */ - udelay(SLEEP_DURATION); - } - } - - /* take care of 'guard time' */ - udelay(SLEEP_DURATION); - if (rc) - return -1; - - return 0; -} - -static int iic_tpm_write_generic(uint8_t addr, uint8_t *buffer, size_t len, - unsigned int sleep_time, - uint8_t max_count) -{ - int rc = 0; - int count; - - if (len > TPM_BUFSIZE) { - printk(BIOS_DEBUG, "%s: Length %zd is too large\n", __func__, len); - return -1; - } - - /* prepare send buffer */ - tpm_dev.buf[0] = addr; - memcpy(&(tpm_dev.buf[1]), buffer, len); - - if (tpm_dev.bus < 0) - return -1; - for (count = 0; count < max_count; count++) { - rc = i2c_write_raw(tpm_dev.bus, tpm_dev.addr, - tpm_dev.buf, len + 1); - if (rc == 0) - break; /* success, break to skip sleep */ - - udelay(sleep_time); - } - - /* take care of 'guard time' */ - udelay(SLEEP_DURATION); - if (rc) - return -1; - - return 0; -} - -/* - * iic_tpm_write() - write to TPM register - * @addr: register address to write to - * @buffer: containing data to be written - * @len: number of bytes to write - * - * Write len bytes from provided buffer to TPM register (little - * endian format, i.e. buffer[0] is written as first byte). - * - * NOTE: TPM is big-endian for multi-byte values. Multi-byte - * values have to be swapped. - * - * NOTE: use this function instead of the iic_tpm_write_generic function. - * - * Return -EIO on error, 0 on success - */ -static int iic_tpm_write(uint8_t addr, uint8_t *buffer, size_t len) -{ - return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION, - MAX_COUNT); -} - -/* - * This function is needed especially for the cleanup situation after - * sending TPM_READY - * */ -static int iic_tpm_write_long(uint8_t addr, uint8_t *buffer, size_t len) -{ - return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION_LONG, - MAX_COUNT_LONG); -} - -#define TPM_HEADER_SIZE 10 - -enum tis_access { - TPM_ACCESS_VALID = 0x80, - TPM_ACCESS_ACTIVE_LOCALITY = 0x20, - TPM_ACCESS_REQUEST_PENDING = 0x04, - TPM_ACCESS_REQUEST_USE = 0x02, -}; - -enum tis_status { - TPM_STS_VALID = 0x80, - TPM_STS_COMMAND_READY = 0x40, - TPM_STS_GO = 0x20, - TPM_STS_DATA_AVAIL = 0x10, - TPM_STS_DATA_EXPECT = 0x08, -}; - -#define TPM_ACCESS(l) (0x0000 | ((l) << 4)) -#define TPM_STS(l) (0x0001 | ((l) << 4)) -#define TPM_DATA_FIFO(l) (0x0005 | ((l) << 4)) -#define TPM_DID_VID(l) (0x0006 | ((l) << 4)) - -static int check_locality(struct tpm_chip *chip, int loc) -{ - uint8_t buf; - - if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0) - return -1; - - if ((buf & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == - (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { - chip->vendor.locality = loc; - return loc; - } - - return -1; -} - -static void release_locality(struct tpm_chip *chip, int loc, int force) -{ - uint8_t buf; - if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0) - return; - - if (force || (buf & (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == - (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) { - buf = TPM_ACCESS_ACTIVE_LOCALITY; - iic_tpm_write(TPM_ACCESS(loc), &buf, 1); - } -} - -static int request_locality(struct tpm_chip *chip, int loc) -{ - uint8_t buf = TPM_ACCESS_REQUEST_USE; - - if (check_locality(chip, loc) >= 0) - return loc; /* we already have the locality */ - - iic_tpm_write(TPM_ACCESS(loc), &buf, 1); - - /* wait for burstcount */ - int timeout = 2 * 1000; /* 2s timeout */ - while (timeout) { - if (check_locality(chip, loc) >= 0) - return loc; - mdelay(TPM_TIMEOUT); - timeout--; - } - - return -1; -} - -static uint8_t tpm_tis_i2c_status(struct tpm_chip *chip) -{ - /* NOTE: Since I2C read may fail, return 0 in this case --> time-out */ - uint8_t buf; - if (iic_tpm_read(TPM_STS(chip->vendor.locality), &buf, 1) < 0) - return 0; - else - return buf; -} - -static void tpm_tis_i2c_ready(struct tpm_chip *chip) -{ - /* this causes the current command to be aborted */ - uint8_t buf = TPM_STS_COMMAND_READY; - iic_tpm_write_long(TPM_STS(chip->vendor.locality), &buf, 1); -} - -static ssize_t get_burstcount(struct tpm_chip *chip) -{ - ssize_t burstcnt; - uint8_t buf[3]; - - /* wait for burstcount */ - int timeout = 2 * 1000; /* 2s timeout */ - while (timeout) { - /* Note: STS is little endian */ - if (iic_tpm_read(TPM_STS(chip->vendor.locality) + 1, buf, 3) < 0) - burstcnt = 0; - else - burstcnt = (buf[2] << 16) + (buf[1] << 8) + buf[0]; - - if (burstcnt) - return burstcnt; - mdelay(TPM_TIMEOUT); - timeout--; - } - return -1; -} - -static int wait_for_stat(struct tpm_chip *chip, uint8_t mask, int *status) -{ - unsigned long timeout = 2 * 1024; - while (timeout) { - *status = tpm_tis_i2c_status(chip); - if ((*status & mask) == mask) - return 0; - mdelay(TPM_TIMEOUT); - timeout--; - } - - return -1; -} - -static int recv_data(struct tpm_chip *chip, uint8_t *buf, size_t count) -{ - size_t size = 0; - - while (size < count) { - ssize_t burstcnt = get_burstcount(chip); - int rc; - - /* burstcount < 0 = TPM is busy */ - if (burstcnt < 0) - return burstcnt; - - /* limit received data to max. left */ - if (burstcnt > (count - size)) - burstcnt = count - size; - - rc = iic_tpm_read(TPM_DATA_FIFO(chip->vendor.locality), - &(buf[size]), - burstcnt); - if (rc == 0) - size += burstcnt; - - } - return size; -} - -static int tpm_tis_i2c_recv(struct tpm_chip *chip, uint8_t *buf, size_t count) -{ - int size = 0; - uint32_t expected; - int status; - - if (count < TPM_HEADER_SIZE) { - size = -1; - goto out; - } - - /* read first 10 bytes, including tag, paramsize, and result */ - size = recv_data(chip, buf, TPM_HEADER_SIZE); - if (size < TPM_HEADER_SIZE) { - printk(BIOS_DEBUG, "tpm_tis_i2c_recv: Unable to read header\n"); - goto out; - } - - memcpy(&expected, buf + TPM_RSP_SIZE_BYTE, sizeof(expected)); - expected = be32_to_cpu(expected); - if ((size_t)expected > count) { - size = -1; - goto out; - } - - size += recv_data(chip, &buf[TPM_HEADER_SIZE], - expected - TPM_HEADER_SIZE); - if (size < expected) { - printk(BIOS_DEBUG, "tpm_tis_i2c_recv: Unable to " - "read remainder of result\n"); - size = -1; - goto out; - } - - wait_for_stat(chip, TPM_STS_VALID, &status); - if (status & TPM_STS_DATA_AVAIL) { /* retry? */ - printk(BIOS_DEBUG, "tpm_tis_i2c_recv: Error left over data\n"); - size = -1; - goto out; - } - -out: - tpm_tis_i2c_ready(chip); - - return size; -} - -static int tpm_tis_i2c_send(struct tpm_chip *chip, uint8_t *buf, size_t len) -{ - int status; - size_t count = 0; - uint8_t sts = TPM_STS_GO; - - if (len > TPM_BUFSIZE) - return -1; /* command is too long for our TPM, sorry */ - - status = tpm_tis_i2c_status(chip); - if ((status & TPM_STS_COMMAND_READY) == 0) { - tpm_tis_i2c_ready(chip); - if (wait_for_stat(chip, TPM_STS_COMMAND_READY, &status) < 0) - goto out_err; - } - - while (count < len - 1) { - ssize_t burstcnt = get_burstcount(chip); - - /* burstcount < 0 = TPM is busy */ - if (burstcnt < 0) - return burstcnt; - - if (burstcnt > (len-1-count)) - burstcnt = len-1-count; - -#ifdef CONFIG_TPM_I2C_BURST_LIMITATION - if (burstcnt > CONFIG_TPM_I2C_BURST_LIMITATION) - burstcnt = CONFIG_TPM_I2C_BURST_LIMITATION; -#endif /* CONFIG_TPM_I2C_BURST_LIMITATION */ - - if (iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), - &(buf[count]), burstcnt) == 0) - count += burstcnt; - - wait_for_stat(chip, TPM_STS_VALID, &status); - if ((status & TPM_STS_DATA_EXPECT) == 0) - goto out_err; - } - - /* write last byte */ - iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), &(buf[count]), 1); - - wait_for_stat(chip, TPM_STS_VALID, &status); - if ((status & TPM_STS_DATA_EXPECT) != 0) - goto out_err; - - /* go and do it */ - iic_tpm_write(TPM_STS(chip->vendor.locality), &sts, 1); - - return len; - -out_err: - tpm_tis_i2c_ready(chip); - - return -1; -} - -static struct tpm_vendor_specific tpm_tis_i2c = { - .status = tpm_tis_i2c_status, - .recv = tpm_tis_i2c_recv, - .send = tpm_tis_i2c_send, - .cancel = tpm_tis_i2c_ready, - .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, - .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, - .req_canceled = TPM_STS_COMMAND_READY, -}; - -/* Initialization of I2C TPM */ - -int tpm_vendor_init(unsigned bus, uint32_t dev_addr) -{ - uint32_t vendor; - unsigned int old_addr; - struct tpm_chip *chip; - extern struct tpm_chip g_chip; - - old_addr = tpm_dev.addr; - if (dev_addr != 0) - tpm_dev.addr = dev_addr; - tpm_dev.bus = bus; - - chip = &g_chip; - memcpy(&chip->vendor, &tpm_tis_i2c, sizeof(struct tpm_vendor_specific)); - chip->is_open = 1; - - /* Disable interrupts (not supported) */ - chip->vendor.irq = 0; - - if (request_locality(chip, 0) != 0) - goto out_err; - - /* Read four bytes from DID_VID register */ - if (iic_tpm_read(TPM_DID_VID(0), (uint8_t *)&vendor, 4) < 0) - goto out_release; - - if (vendor == TPM_TIS_I2C_DID_VID_9645) { - tpm_dev.chip_type = SLB9645; - } else if (be32_to_cpu(vendor) == TPM_TIS_I2C_DID_VID_9635) { - tpm_dev.chip_type = SLB9635; - } else { - printk(BIOS_DEBUG, "Vendor ID 0x%08x not recognized.\n", vendor); - goto out_release; - } - - printk(BIOS_DEBUG, "1.2 TPM (chip type %s device-id 0x%X)\n", - chip_name[tpm_dev.chip_type], vendor >> 16); - - /* - * A timeout query to TPM can be placed here. - * Standard timeout values are used so far - */ - - return 0; - -out_release: - release_locality(chip, 0, 1); - -out_err: - tpm_dev.addr = old_addr; - return -1; -} - -void tpm_vendor_cleanup(struct tpm_chip *chip) -{ - release_locality(chip, chip->vendor.locality, 1); -} diff --git a/src/drivers/i2c/tpm/tpm.h b/src/drivers/i2c/tpm/tpm.h deleted file mode 100644 index 625679d..0000000 --- a/src/drivers/i2c/tpm/tpm.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Copyright (C) 2011 Infineon Technologies - * - * Authors: - * Peter Huewe <huewe.external(a)infineon.com> - * - * Version: 2.1.1 - * - * Description: - * Device driver for TCG/TCPA TPM (trusted platform module). - * Specifications at www.trustedcomputinggroup.org - * - * It is based on the Linux kernel driver tpm.c from Leendert van - * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation, version 2 of the - * License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __DRIVERS_TPM_SLB9635_I2C_TPM_H__ -#define __DRIVERS_TPM_SLB9635_I2C_TPM_H__ - -#include <stdint.h> - -enum tpm_timeout { - TPM_TIMEOUT = 1, /* msecs */ -}; - -/* Size of external transmit buffer (used for stack buffer in tpm_sendrecv) */ -#define TPM_BUFSIZE 1260 - -/* Index of fields in TPM command buffer */ -#define TPM_CMD_SIZE_BYTE 2 -#define TPM_CMD_ORDINAL_BYTE 6 - -/* Index of Count field in TPM response buffer */ -#define TPM_RSP_SIZE_BYTE 2 -#define TPM_RSP_RC_BYTE 6 - -struct tpm_chip; - -struct tpm_vendor_specific { - const uint8_t req_complete_mask; - const uint8_t req_complete_val; - const uint8_t req_canceled; - int irq; - int (*recv)(struct tpm_chip *, uint8_t *, size_t); - int (*send)(struct tpm_chip *, uint8_t *, size_t); - void (*cancel)(struct tpm_chip *); - uint8_t(*status)(struct tpm_chip *); - int locality; -}; - -struct tpm_chip { - int is_open; - struct tpm_vendor_specific vendor; -}; - -struct tpm_input_header { - uint16_t tag; - uint32_t length; - uint32_t ordinal; -} __attribute__ ((packed)); - -struct tpm_output_header { - uint16_t tag; - uint32_t length; - uint32_t return_code; -} __attribute__ ((packed)); - -struct timeout_t { - uint32_t a; - uint32_t b; - uint32_t c; - uint32_t d; -} __attribute__ ((packed)); - -struct duration_t { - uint32_t tpm_short; - uint32_t tpm_medium; - uint32_t tpm_long; -} __attribute__ ((packed)); - -typedef union { - struct timeout_t timeout; - struct duration_t duration; -} cap_t; - -struct tpm_getcap_params_in { - uint32_t cap; - uint32_t subcap_size; - uint32_t subcap; -} __attribute__ ((packed)); - -struct tpm_getcap_params_out { - uint32_t cap_size; - cap_t cap; -} __attribute__ ((packed)); - -typedef union { - struct tpm_input_header in; - struct tpm_output_header out; -} tpm_cmd_header; - -typedef union { - struct tpm_getcap_params_out getcap_out; - struct tpm_getcap_params_in getcap_in; -} tpm_cmd_params; - -struct tpm_cmd_t { - tpm_cmd_header header; - tpm_cmd_params params; -} __attribute__ ((packed)); - -/* ---------- Interface for TPM vendor ------------ */ - -int tpm_vendor_init(unsigned bus, uint32_t dev_addr); - -void tpm_vendor_cleanup(struct tpm_chip *chip); - -#endif /* __DRIVERS_TPM_SLB9635_I2C_TPM_H__ */ diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index bf84d66..c88a904 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -34,7 +34,8 @@ #include <soc/intel/common/mrc_cache.h> #include <stage_cache.h> #include <timestamp.h> -#include <tpm.h> +#include <tpm/tpm.h> +#include <tpm/tspi.h> #include <vendorcode/google/chromeos/chromeos.h> asmlinkage void *romstage_main(FSP_INFO_HEADER *fih) diff --git a/src/drivers/pc80/Kconfig b/src/drivers/pc80/Kconfig index 18c626c..b099dbc 100644 --- a/src/drivers/pc80/Kconfig +++ b/src/drivers/pc80/Kconfig @@ -22,6 +22,4 @@ config DRIVERS_MC146818 default y if ARCH_X86 select RTC -source src/drivers/pc80/tpm/Kconfig - endif diff --git a/src/drivers/pc80/Makefile.inc b/src/drivers/pc80/Makefile.inc index f468318..74e00a8 100644 --- a/src/drivers/pc80/Makefile.inc +++ b/src/drivers/pc80/Makefile.inc @@ -14,7 +14,7 @@ romstage-$(CONFIG_DRIVERS_MC146818) += mc146818rtc_early.c romstage-$(CONFIG_SPKMODEM) += spkmodem.c -subdirs-y += tpm vga +subdirs-y += vga cbfs-files-$(CONFIG_HAVE_CMOS_DEFAULT) += cmos.default cmos.default-file = $(CONFIG_CMOS_DEFAULT_FILE):nvramtool diff --git a/src/drivers/pc80/tpm/Kconfig b/src/drivers/pc80/tpm/Kconfig deleted file mode 100644 index 0e8a020..0000000 --- a/src/drivers/pc80/tpm/Kconfig +++ /dev/null @@ -1,54 +0,0 @@ -config MAINBOARD_HAS_LPC_TPM - bool - default n - help - Board has TPM support - -config LPC_TPM - bool "Enable TPM support" - depends on MAINBOARD_HAS_LPC_TPM - default n - help - Enable this option to enable LPC TPM support in coreboot. - - If unsure, say N. - -config TPM_TIS_BASE_ADDRESS - hex - default 0xfed40000 - depends on LPC_TPM - help - This can be used to adjust the TPM memory base address. - The default is specified by the TCG PC Client Specific TPM - Interface Specification 1.2 and should not be changed unless - the TPM being used does not conform to TPM TIS 1.2. - -config TPM_PIRQ - hex - default 0 - depends on LPC_TPM - help - This can be used to specify a PIRQ to use instead of SERIRQ, - which is needed for SPI TPM interrupt support on x86. - -config TPM_INIT_FAILURE_IS_FATAL - bool - default n - depends on LPC_TPM - help - What to do if TPM init failed. If true, force a hard reset, - otherwise just log error message to console. - -config SKIP_TPM_STARTUP_ON_NORMAL_BOOT - bool - default n - depends on LPC_TPM - help - Skip TPM init on normal boot. Useful if payload does TPM init. - -config TPM_DEACTIVATE - bool "Deactivate TPM" - default n - depends on LPC_TPM - help - Deactivate TPM by issuing deactivate command. diff --git a/src/drivers/pc80/tpm/Makefile.inc b/src/drivers/pc80/tpm/Makefile.inc deleted file mode 100644 index 697842f..0000000 --- a/src/drivers/pc80/tpm/Makefile.inc +++ /dev/null @@ -1,4 +0,0 @@ -verstage-$(CONFIG_LPC_TPM) += tpm.c -romstage-$(CONFIG_LPC_TPM) += tpm.c -ramstage-$(CONFIG_LPC_TPM) += tpm.c -romstage-$(CONFIG_LPC_TPM) += romstage.c diff --git a/src/drivers/pc80/tpm/acpi/tpm.asl b/src/drivers/pc80/tpm/acpi/tpm.asl deleted file mode 100644 index 090bf4c..0000000 --- a/src/drivers/pc80/tpm/acpi/tpm.asl +++ /dev/null @@ -1,219 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* Trusted Platform Module */ - -#if CONFIG_LPC_TPM - -Device (TPM) -{ - Name (_HID, EISAID ("PNP0C31")) - Name (_CID, 0x310cd041) - Name (_UID, 1) - - OperationRegion (TREG, SystemMemory, - CONFIG_TPM_TIS_BASE_ADDRESS, 0x5000) - Field (TREG, ByteAcc, NoLock, Preserve) - { - /* TPM_INT_ENABLE_0 */ - Offset (0x0008), - , 3, - ITPL, 2, /* Interrupt type and polarity */ - - /* TPM_INT_VECTOR_0 */ - Offset (0x000C), - IVEC, 4, /* SERIRQ vector */ - - /* TPM_DID_VID */ - Offset (0x0f00), - DVID, 32, /* Device and vendor ID */ - } - - Method (_STA, 0) - { -#if !CONFIG_TPM_DEACTIVATE - If (LAnd (LGreater (DVID, 0), LLess (DVID, 0xffffffff))) { - Return (0xf) - } Else { - /* TPM module missing */ - Return (0x0) - } -#else - Return (0x0) -#endif - } - - Name (IBUF, ResourceTemplate () - { - /* Updated based on TPM interrupt for Locality 0 */ - Interrupt (ResourceConsumer, Edge, ActiveHigh, - Exclusive, , , TIRQ) { 0 } - }) - - Name (RBUF, ResourceTemplate () - { - IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) - Memory32Fixed (ReadWrite, CONFIG_TPM_TIS_BASE_ADDRESS, 0x5000) - }) - - Method (_CRS, 0, Serialized) - { - CreateField (^IBUF, ^TIRQ._INT, 32, TVEC) - CreateBitField (^IBUF, ^TIRQ._HE, TTYP) - CreateBitField (^IBUF, ^TIRQ._LL, TPOL) - CreateBitField (^IBUF, ^TIRQ._SHR, TSHR) - - If (LGreater (CONFIG_TPM_PIRQ, 0)) { - /* - * PIRQ: Update interrupt vector with configured PIRQ - */ - Store (CONFIG_TPM_PIRQ, TVEC) - - /* Active-Low Level-Triggered Shared */ - Store (One, TPOL) - Store (Zero, TTYP) - Store (One, TSHR) - - /* Merge IRQ with base address */ - Return (ConcatenateResTemplate (RBUF, IBUF)) - } ElseIf (LGreater (IVEC, 0)) { - /* - * SERIRQ: Update interrupt vector based on TPM register - */ - Store (IVEC, TVEC) - - If (LEqual (ITPL, 0x0)) { - /* Active-High Level-Triggered Shared */ - Store (Zero, TPOL) - Store (Zero, TTYP) - Store (One, TSHR) - } ElseIf (LEqual (ITPL, 0x1)) { - /* Active-Low Level-Triggered Shared */ - Store (One, TPOL) - Store (Zero, TTYP) - Store (One, TSHR) - } ElseIf (LEqual (ITPL, 0x2)) { - /* Active-High Edge-Triggered Exclusive */ - Store (Zero, TPOL) - Store (One, TTYP) - Store (Zero, TSHR) - } ElseIf (LEqual (ITPL, 0x3)) { - /* Active-Low Edge-Triggered Exclusive */ - Store (One, TPOL) - Store (One, TTYP) - Store (Zero, TSHR) - } - - /* Merge IRQ with base address */ - Return (ConcatenateResTemplate (RBUF, IBUF)) - } Else { - Return (RBUF) - } - } - - /* Dummy _DSM to make Bitlocker work. */ - Method (_DSM, 4, Serialized) - { - /* Physical presence interface. - This is used to submit commands like "Clear TPM" to - be run at next reboot provided that user confirms them. - Spec allows user to cancel all commands and/or - configure BIOS to reject commands. So we pretend that - user did just this: cancelled everything. If user - really wants to clear TPM the only option now is to do it manually - in payload. - */ - If (LEqual (Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653"))) - { - If (LEqual (Arg2, 0)) - { - /* Functions 1-8. */ - Return (Buffer (2) { 0xFF, 0x01 }) - } - - /* Interface version: 1.2 */ - If (LEqual (Arg2, 1)) - { - Return ("1.2") - } - - /* Submit operations: drop on the floor and return success. */ - If (LEqual (Arg2, 2)) - { - Return (0x00) - } - - /* Pending operation: none. */ - If (LEqual (Arg2, 3)) - { - Return (Package (2) { 0, 0 }) - } - - /* Pre-OS transition method: reboot. */ - If (LEqual (Arg2, 4)) - { - Return (2) - } - - /* Operation response: no operation executed. */ - If (LEqual (Arg2, 5)) - { - Return (Package (3) { 0, 0, 0 }) - } - - /* Set preffered user language: deprecated and must return 3 aka "not implemented". */ - If (LEqual (Arg2, 6)) - { - Return (3) - } - - /* Submit operations: deny. */ - If (LEqual (Arg2, 7)) - { - Return (3) - } - - /* All actions are forbidden. */ - If (LEqual (Arg2, 8)) - { - Return (1) - } - - Return (1) - } - - /* Memory clearing on boot: just a dummy. */ - If (LEqual (Arg0, ToUUID("376054ed-cc13-4675-901c-4756d7f2d45d"))) - { - If (LEqual (Arg2, 0)) - { - /* Function 1. */ - Return (Buffer (1) { 3 }) - } - - /* Just return success. */ - If (LEqual (Arg2, 1)) - { - Return (0) - } - - Return (1) - } - - Return (Buffer (1) { 0 }) - } -} - -#endif /* CONFIG_LPC_TPM */ diff --git a/src/drivers/pc80/tpm/chip.h b/src/drivers/pc80/tpm/chip.h deleted file mode 100644 index b13d23c..0000000 --- a/src/drivers/pc80/tpm/chip.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef DRIVERS_PC80_TPM_CHIP_H -#define DRIVERS_PC80_TPM_CHIP_H - -typedef struct drivers_pc80_tpm_config { - /* - * TPM Interrupt polarity: - * - * High Level 0 - * Low Level 1 - * Rising Edge 2 - * Falling Edge 3 - */ - u8 irq_polarity; -} tpm_config_t; - -#endif /* DRIVERS_PC80_TPM_CHIP_H */ diff --git a/src/drivers/pc80/tpm/romstage.c b/src/drivers/pc80/tpm/romstage.c deleted file mode 100644 index a257ba1..0000000 --- a/src/drivers/pc80/tpm/romstage.c +++ /dev/null @@ -1,251 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <types.h> -#include <console/cbmem_console.h> -#include <console/console.h> -#include <arch/acpi.h> -#include <tpm.h> -#include <reset.h> - -//#define EXTRA_LOGGING - -#define TPM_LARGE_ENOUGH_COMMAND_SIZE 256 /* saves space in the firmware */ - -#define TPM_SUCCESS ((u32)0x00000000) - -#define TPM_E_IOERROR ((u32)0x0000001f) -#define TPM_E_COMMUNICATION_ERROR ((u32)0x00005004) -#define TPM_E_NON_FATAL ((u32)0x00000800) -#define TPM_E_INVALID_POSTINIT ((u32)0x00000026) - -#define TPM_E_NEEDS_SELFTEST ((u32)(TPM_E_NON_FATAL + 1)) -#define TPM_E_DOING_SELFTEST ((u32)(TPM_E_NON_FATAL + 2)) - -static const struct { - u8 buffer[12]; -} tpm_resume_cmd = { - { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x2 } -}; - -static const struct { - u8 buffer[12]; -} tpm_startup_cmd = { - {0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x1 } -}; - -static const struct { - u8 buffer[12]; -} tpm_deactivate_cmd = { - {0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x3 } -}; - -static const struct { - u8 buffer[10]; -} tpm_continueselftest_cmd = { - { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x53 } -}; - -static inline void FromTpmUint32(const u8 * buffer, u32 * x) -{ - *x = ((buffer[0] << 24) | - (buffer[1] << 16) | (buffer[2] << 8) | buffer[3]); -} - -static inline int TpmCommandSize(const u8 * buffer) -{ - u32 size; - FromTpmUint32(buffer + sizeof(u16), &size); - return (int)size; -} - -/* Gets the code field of a TPM command. */ -static inline int TpmCommandCode(const u8 * buffer) -{ - u32 code; - FromTpmUint32(buffer + sizeof(u16) + sizeof(u32), &code); - return code; -} - -/* Gets the return code field of a TPM result. */ -static inline int TpmReturnCode(const u8 * buffer) -{ - return TpmCommandCode(buffer); -} - -/* Like TlclSendReceive below, but do not retry if NEEDS_SELFTEST or - * DOING_SELFTEST errors are returned. - */ -static u32 TlclSendReceiveNoRetry(const u8 * request, - u8 * response, int max_length) -{ - size_t response_length = max_length; - u32 result; - -#ifdef EXTRA_LOGGING - printk(BIOS_DEBUG, "TPM: command: %x%x %x%x%x%x %x%x%x%x\n", - request[0], request[1], - request[2], request[3], request[4], request[5], - request[6], request[7], request[8], request[9]); -#endif - - result = TPM_SUCCESS; - if (tis_sendrecv - (request, TpmCommandSize(request), response, &response_length)) - result = TPM_E_IOERROR; - - if (0 != result) { - /* Communication with TPM failed, so response is garbage */ - printk(BIOS_DEBUG, - "TPM: command 0x%x send/receive failed: 0x%x\n", - TpmCommandCode(request), result); - return TPM_E_COMMUNICATION_ERROR; - } - /* Otherwise, use the result code from the response */ - result = TpmReturnCode(response); - -/* TODO: add paranoia about returned response_length vs. max_length - * (and possibly expected length from the response header). See - * crosbug.com/17017 */ - -#ifdef EXTRA_LOGGING - printk(BIOS_DEBUG, "TPM: response: %x%x %x%x%x%x %x%x%x%x\n", - response[0], response[1], - response[2], response[3], response[4], response[5], - response[6], response[7], response[8], response[9]); -#endif - - printk(BIOS_DEBUG, "TPM: command 0x%x returned 0x%x\n", - TpmCommandCode(request), result); - - return result; -} - -static inline u32 TlclContinueSelfTest(void) -{ - u8 response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; - printk(BIOS_DEBUG, "TPM: Continue self test\n"); - /* Call the No Retry version of SendReceive to avoid recursion. */ - return TlclSendReceiveNoRetry(tpm_continueselftest_cmd.buffer, - response, sizeof(response)); -} - -/* Sends a TPM command and gets a response. Returns 0 if success or the TPM - * error code if error. In the firmware, waits for the self test to complete - * if needed. In the host, reports the first error without retries. */ -static u32 TlclSendReceive(const u8 * request, u8 * response, int max_length) -{ - u32 result = TlclSendReceiveNoRetry(request, response, max_length); - /* When compiling for the firmware, hide command failures due to the self - * test not having run or completed. */ - /* If the command fails because the self test has not completed, try it - * again after attempting to ensure that the self test has completed. */ - if (result == TPM_E_NEEDS_SELFTEST || result == TPM_E_DOING_SELFTEST) { - result = TlclContinueSelfTest(); - if (result != TPM_SUCCESS) { - return result; - } -#if defined(TPM_BLOCKING_CONTINUESELFTEST) || defined(VB_RECOVERY_MODE) - /* Retry only once */ - result = TlclSendReceiveNoRetry(request, response, max_length); -#else - /* This needs serious testing. The TPM specification says: - * "iii. The caller MUST wait for the actions of - * TPM_ContinueSelfTest to complete before reissuing the - * command C1." But, if ContinueSelfTest is non-blocking, how - * do we know that the actions have completed other than trying - * again? */ - do { - result = - TlclSendReceiveNoRetry(request, response, - max_length); - } while (result == TPM_E_DOING_SELFTEST); -#endif - } - - return result; -} - -void init_tpm(int s3resume) -{ - u32 result; - u8 response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; - - if (IS_ENABLED(CONFIG_TPM_DEACTIVATE)) { - printk(BIOS_SPEW, "TPM: Deactivate\n"); - result = TlclSendReceive(tpm_deactivate_cmd.buffer, - response, sizeof(response)); - if (result == TPM_SUCCESS) { - printk(BIOS_SPEW, "TPM: OK.\n"); - return; - } - - printk(BIOS_ERR, "TPM: Error code 0x%x.\n", result); - return; - } - - /* Doing TPM startup when we're not coming in on the S3 resume path - * saves us roughly 20ms in boot time only. This does not seem to - * be worth an API change to vboot_reference-firmware right now, so - * let's keep the code around, but just bail out early: - */ - if (s3resume ? CONFIG_NO_TPM_RESUME - : CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT) - return; - - printk(BIOS_DEBUG, "TPM initialization.\n"); - - printk(BIOS_SPEW, "TPM: Init\n"); - if (tis_init()) - return; - - printk(BIOS_SPEW, "TPM: Open\n"); - if (tis_open()) - return; - - - if (s3resume) { - /* S3 Resume */ - printk(BIOS_SPEW, "TPM: Resume\n"); - result = TlclSendReceive(tpm_resume_cmd.buffer, - response, sizeof(response)); - if (result == TPM_E_INVALID_POSTINIT) { - /* We're on a platform where the TPM maintains power - * in S3, so it's already initialized. - */ - printk(BIOS_DEBUG, "TPM: Already initialized.\n"); - return; - } - } else { - printk(BIOS_SPEW, "TPM: Startup\n"); - result = TlclSendReceive(tpm_startup_cmd.buffer, - response, sizeof(response)); - } - - if (result == TPM_SUCCESS) { - printk(BIOS_SPEW, "TPM: OK.\n"); - return; - } - - printk(BIOS_ERR, "TPM: Error code 0x%x.\n", result); - - if (IS_ENABLED(CONFIG_TPM_INIT_FAILURE_IS_FATAL)) { - printk(BIOS_ERR, "Hard reset!\n"); - post_code(POST_TPM_FAILURE); - if (IS_ENABLED(CONFIG_CONSOLE_CBMEM_DUMP_TO_UART)) - cbmem_dump_console(); - hard_reset(); - } -} diff --git a/src/drivers/pc80/tpm/tpm.c b/src/drivers/pc80/tpm/tpm.c deleted file mode 100644 index fa46b47..0000000 --- a/src/drivers/pc80/tpm/tpm.c +++ /dev/null @@ -1,769 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* - * The code in this file has been heavily based on the article "Writing a TPM - * Device Driver" published on http://ptgmedia.pearsoncmg.com and the - * submission by Stefan Berger on Qemu-devel mailing list. - * - * One principal difference is that in the simplest config the other than 0 - * TPM localities do not get mapped by some devices (for instance, by - * Infineon slb9635), so this driver provides access to locality 0 only. - */ - -#include <stdlib.h> -#include <string.h> -#include <delay.h> -#include <arch/io.h> -#include <console/console.h> -#include <tpm.h> -#include <arch/early_variables.h> -#include <device/pnp.h> -#include "chip.h" - -#define PREFIX "lpc_tpm: " - -/* coreboot wrapper for TPM driver (start) */ -#define TPM_DEBUG(fmt, args...) \ - if (IS_ENABLED(CONFIG_DEBUG_TPM)) { \ - printk(BIOS_DEBUG, PREFIX); \ - printk(BIOS_DEBUG, fmt , ##args); \ - } -#define TPM_DEBUG_IO_READ(reg_, val_) \ - TPM_DEBUG("Read reg 0x%x returns 0x%x\n", (reg_), (val_)) -#define TPM_DEBUG_IO_WRITE(reg_, val_) \ - TPM_DEBUG("Write reg 0x%x with 0x%x\n", (reg_), (val_)) -#define printf(x...) printk(BIOS_ERR, x) - -/* coreboot wrapper for TPM driver (end) */ - -/* the macro accepts the locality value, but only locality 0 is operational */ -#define TIS_REG(LOCALITY, REG) \ - (void *)(CONFIG_TPM_TIS_BASE_ADDRESS + (LOCALITY << 12) + REG) - -/* hardware registers' offsets */ -#define TIS_REG_ACCESS 0x0 -#define TIS_REG_INT_ENABLE 0x8 -#define TIS_REG_INT_VECTOR 0xc -#define TIS_REG_INT_STATUS 0x10 -#define TIS_REG_INTF_CAPABILITY 0x14 -#define TIS_REG_STS 0x18 -#define TIS_REG_BURST_COUNT 0x19 -#define TIS_REG_DATA_FIFO 0x24 -#define TIS_REG_DID_VID 0xf00 -#define TIS_REG_RID 0xf04 - -/* Some registers' bit field definitions */ -#define TIS_STS_VALID (1 << 7) /* 0x80 */ -#define TIS_STS_COMMAND_READY (1 << 6) /* 0x40 */ -#define TIS_STS_TPM_GO (1 << 5) /* 0x20 */ -#define TIS_STS_DATA_AVAILABLE (1 << 4) /* 0x10 */ -#define TIS_STS_EXPECT (1 << 3) /* 0x08 */ -#define TIS_STS_RESPONSE_RETRY (1 << 1) /* 0x02 */ - -#define TIS_ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */ -#define TIS_ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */ -#define TIS_ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */ -#define TIS_ACCESS_SEIZE (1 << 3) /* 0x08 */ -#define TIS_ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */ -#define TIS_ACCESS_REQUEST_USE (1 << 1) /* 0x02 */ -#define TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */ - -/* - * Error value returned if a tpm register does not enter the expected state - * after continuous polling. No actual TPM register reading ever returns ~0, - * so this value is a safe error indication to be mixed with possible status - * register values. - */ -#define TPM_TIMEOUT_ERR (~0) - -/* Error value returned on various TPM driver errors */ -#define TPM_DRIVER_ERR (~0) - - /* 1 second is plenty for anything TPM does.*/ -#define MAX_DELAY_US (1000 * 1000) - -/* - * Structures defined below allow creating descriptions of TPM vendor/device - * ID information for run time discovery. The only device the system knows - * about at this time is Infineon slb9635 - */ -struct device_name { - u16 dev_id; - const char * const dev_name; -}; - -struct vendor_name { - u16 vendor_id; - const char * vendor_name; - const struct device_name* dev_names; -}; - -static const struct device_name atmel_devices[] = { - {0x3204, "AT97SC3204"}, - {0xffff} -}; - -static const struct device_name infineon_devices[] = { - {0x000b, "SLB9635 TT 1.2"}, - {0x001a, "SLB9660 TT 1.2"}, - {0x001b, "SLB9670 TT 1.2"}, - {0xffff} -}; - -static const struct device_name nuvoton_devices[] = { - {0x00fe, "NPCT420AA V2"}, - {0xffff} -}; - -static const struct device_name stmicro_devices[] = { - {0x0000, "ST33ZP24" }, - {0xffff} -}; - -static const struct vendor_name vendor_names[] = { - {0x1114, "Atmel", atmel_devices}, - {0x15d1, "Infineon", infineon_devices}, - {0x1050, "Nuvoton", nuvoton_devices}, - {0x104a, "ST Microelectronics", stmicro_devices}, -}; - -/* - * Cached vendor/device ID pair to indicate that the device has been already - * discovered - */ -static u32 vendor_dev_id CAR_GLOBAL; - -static inline u8 tpm_read_status(int locality) -{ - u8 value = read8(TIS_REG(locality, TIS_REG_STS)); - TPM_DEBUG_IO_READ(TIS_REG_STS, value); - return value; -} - -static inline void tpm_write_status(u8 sts, int locality) -{ - TPM_DEBUG_IO_WRITE(TIS_REG_STS, sts); - write8(TIS_REG(locality, TIS_REG_STS), sts); -} - -static inline u8 tpm_read_data(int locality) -{ - u8 value = read8(TIS_REG(locality, TIS_REG_DATA_FIFO)); - TPM_DEBUG_IO_READ(TIS_REG_DATA_FIFO, value); - return value; -} - -static inline void tpm_write_data(u8 data, int locality) -{ - TPM_DEBUG_IO_WRITE(TIS_REG_STS, data); - write8(TIS_REG(locality, TIS_REG_DATA_FIFO), data); -} - -static inline u16 tpm_read_burst_count(int locality) -{ - u16 count; - count = read8(TIS_REG(locality, TIS_REG_BURST_COUNT)); - count |= read8(TIS_REG(locality, TIS_REG_BURST_COUNT + 1)) << 8; - TPM_DEBUG_IO_READ(TIS_REG_BURST_COUNT, count); - return count; -} - -static inline u8 tpm_read_access(int locality) -{ - u8 value = read8(TIS_REG(locality, TIS_REG_ACCESS)); - TPM_DEBUG_IO_READ(TIS_REG_ACCESS, value); - return value; -} - -static inline void tpm_write_access(u8 data, int locality) -{ - TPM_DEBUG_IO_WRITE(TIS_REG_ACCESS, data); - write8(TIS_REG(locality, TIS_REG_ACCESS), data); -} - -static inline u32 tpm_read_did_vid(int locality) -{ - u32 value = read32(TIS_REG(locality, TIS_REG_DID_VID)); - TPM_DEBUG_IO_READ(TIS_REG_DID_VID, value); - return value; -} - -static inline void tpm_write_int_vector(int vector, int locality) -{ - TPM_DEBUG_IO_WRITE(TIS_REG_INT_VECTOR, vector); - write8(TIS_REG(locality, TIS_REG_INT_VECTOR), vector & 0xf); -} - -static inline void tpm_write_int_polarity(int polarity, int locality) -{ - /* Set polarity and leave all other bits at 0 */ - u32 value = (polarity & 0x3) << 3; - TPM_DEBUG_IO_WRITE(TIS_REG_INT_ENABLE, value); - write32(TIS_REG(locality, TIS_REG_INT_ENABLE), value); -} - -/* - * tis_wait_sts() - * - * Wait for at least a second for a status to change its state to match the - * expected state. Normally the transition happens within microseconds. - * - * @locality - locality - * @mask - bitmask for the bitfield(s) to watch - * @expected - value the field(s) are supposed to be set to - * - * Returns 0 on success or TPM_TIMEOUT_ERR on timeout. - */ -static int tis_wait_sts(int locality, u8 mask, u8 expected) -{ - u32 time_us = MAX_DELAY_US; - while (time_us > 0) { - u8 value = tpm_read_status(locality); - if ((value & mask) == expected) - return 0; - udelay(1); /* 1 us */ - time_us--; - } - return TPM_TIMEOUT_ERR; -} - -static inline int tis_wait_ready(int locality) -{ - return tis_wait_sts(locality, TIS_STS_COMMAND_READY, - TIS_STS_COMMAND_READY); -} - -static inline int tis_wait_valid(int locality) -{ - return tis_wait_sts(locality, TIS_STS_VALID, TIS_STS_VALID); -} - -static inline int tis_wait_valid_data(int locality) -{ - const u8 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID; - return tis_wait_sts(locality, has_data, has_data); -} - -static inline int tis_has_valid_data(int locality) -{ - const u8 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID; - return (tpm_read_status(locality) & has_data) == has_data; -} - -static inline int tis_expect_data(int locality) -{ - return !!(tpm_read_status(locality) & TIS_STS_EXPECT); -} - -/* - * tis_wait_access() - * - * Wait for at least a second for a access to change its state to match the - * expected state. Normally the transition happens within microseconds. - * - * @locality - locality - * @mask - bitmask for the bitfield(s) to watch - * @expected - value the field(s) are supposed to be set to - * - * Returns 0 on success or TPM_TIMEOUT_ERR on timeout. - */ -static int tis_wait_access(int locality, u8 mask, u8 expected) -{ - u32 time_us = MAX_DELAY_US; - while (time_us > 0) { - u8 value = tpm_read_access(locality); - if ((value & mask) == expected) - return 0; - udelay(1); /* 1 us */ - time_us--; - } - return TPM_TIMEOUT_ERR; -} - -static inline int tis_wait_dropped_access(int locality) -{ - return tis_wait_access(locality, TIS_ACCESS_ACTIVE_LOCALITY, 0); -} - -static inline int tis_wait_received_access(int locality) -{ - return tis_wait_access(locality, TIS_ACCESS_ACTIVE_LOCALITY, - TIS_ACCESS_ACTIVE_LOCALITY); -} - -static inline int tis_has_access(int locality) -{ - return !!(tpm_read_access(locality) & TIS_ACCESS_ACTIVE_LOCALITY); -} - -static inline void tis_request_access(int locality) -{ - tpm_write_access(TIS_ACCESS_REQUEST_USE, locality); -} - -static inline void tis_drop_access(int locality) -{ - tpm_write_access(TIS_ACCESS_ACTIVE_LOCALITY, locality); -} - -/* - * PC Client Specific TPM Interface Specification section 11.2.12: - * - * Software must be prepared to send two writes of a "1" to command ready - * field: the first to indicate successful read of all the data, thus - * clearing the data from the ReadFIFO and freeing the TPM's resources, - * and the second to indicate to the TPM it is about to send a new command. - * - * In practice not all TPMs behave the same so it is necessary to be - * flexible when trying to set command ready. - * - * Returns 0 on success if the TPM is ready for transactions. - * Returns TPM_TIMEOUT_ERR if the command ready bit does not get set. - */ -static int tis_command_ready(u8 locality) -{ - u32 status; - - /* 1st attempt to set command ready */ - tpm_write_status(TIS_STS_COMMAND_READY, locality); - - /* Wait for response */ - status = tpm_read_status(locality); - - /* Check if command ready is set yet */ - if (status & TIS_STS_COMMAND_READY) - return 0; - - /* 2nd attempt to set command ready */ - tpm_write_status(TIS_STS_COMMAND_READY, locality); - - return tis_wait_ready(locality); -} - -/* - * Probe the TPM device and try determining its manufacturer/device name. - * - * Returns 0 on success (the device is found or was found during an earlier - * invocation) or TPM_DRIVER_ERR if the device is not found. - */ -static u32 tis_probe(void) -{ - const char *device_name = "unknown"; - const char *vendor_name = device_name; - const struct device_name *dev; - u32 didvid; - u16 vid, did; - int i; - - if (car_get_var(vendor_dev_id)) - return 0; /* Already probed. */ - - didvid = tpm_read_did_vid(0); - if (!didvid || (didvid == 0xffffffff)) { - printf("%s: No TPM device found\n", __FUNCTION__); - return TPM_DRIVER_ERR; - } - - car_set_var(vendor_dev_id, didvid); - - vid = didvid & 0xffff; - did = (didvid >> 16) & 0xffff; - for (i = 0; i < ARRAY_SIZE(vendor_names); i++) { - int j = 0; - u16 known_did; - if (vid == vendor_names[i].vendor_id) { - vendor_name = vendor_names[i].vendor_name; - } else { - continue; - } - dev = &vendor_names[i].dev_names[j]; - while ((known_did = dev->dev_id) != 0xffff) { - if (known_did == did) { - device_name = dev->dev_name; - break; - } - j++; - dev = &vendor_names[i].dev_names[j]; - } - break; - } - /* this will have to be converted into debug printout */ - printk(BIOS_INFO, "Found TPM %s by %s\n", device_name, vendor_name); - return 0; -} - -/* - * tis_senddata() - * - * send the passed in data to the TPM device. - * - * @data - address of the data to send, byte by byte - * @len - length of the data to send - * - * Returns 0 on success, TPM_DRIVER_ERR on error (in case the device does - * not accept the entire command). - */ -static u32 tis_senddata(const u8 * const data, u32 len) -{ - u32 offset = 0; - u16 burst = 0; - u32 max_cycles = 0; - u8 locality = 0; - - if (tis_wait_ready(locality)) { - printf("%s:%d - failed to get 'command_ready' status\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - burst = tpm_read_burst_count(locality); - - while (1) { - unsigned count; - - /* Wait till the device is ready to accept more data. */ - while (!burst) { - if (max_cycles++ == MAX_DELAY_US) { - printf("%s:%d failed to feed %d bytes of %d\n", - __FILE__, __LINE__, len - offset, len); - return TPM_DRIVER_ERR; - } - udelay(1); - burst = tpm_read_burst_count(locality); - } - - max_cycles = 0; - - /* - * Calculate number of bytes the TPM is ready to accept in one - * shot. - * - * We want to send the last byte outside of the loop (hence - * the -1 below) to make sure that the 'expected' status bit - * changes to zero exactly after the last byte is fed into the - * FIFO. - */ - count = min(burst, len - offset - 1); - while (count--) - tpm_write_data(data[offset++], locality); - - if (tis_wait_valid(locality) || !tis_expect_data(locality)) { - printf("%s:%d TPM command feed overflow\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - - burst = tpm_read_burst_count(locality); - if ((offset == (len - 1)) && burst) - /* - * We need to be able to send the last byte to the - * device, so burst size must be nonzero before we - * break out. - */ - break; - } - - /* Send the last byte. */ - tpm_write_data(data[offset++], locality); - - /* - * Verify that TPM does not expect any more data as part of this - * command. - */ - if (tis_wait_valid(locality) || tis_expect_data(locality)) { - printf("%s:%d unexpected TPM status 0x%x\n", - __FILE__, __LINE__, tpm_read_status(locality)); - return TPM_DRIVER_ERR; - } - - /* OK, sitting pretty, let's start the command execution. */ - tpm_write_status(TIS_STS_TPM_GO, locality); - - return 0; -} - -/* - * tis_readresponse() - * - * read the TPM device response after a command was issued. - * - * @buffer - address where to read the response, byte by byte. - * @len - pointer to the size of buffer - * - * On success stores the number of received bytes to len and returns 0. On - * errors (misformatted TPM data or synchronization problems) returns - * TPM_DRIVER_ERR. - */ -static u32 tis_readresponse(u8 *buffer, size_t *len) -{ - u16 burst_count; - u32 offset = 0; - u8 locality = 0; - u32 expected_count = *len; - int max_cycles = 0; - - /* Wait for the TPM to process the command */ - if (tis_wait_valid_data(locality)) { - printf("%s:%d failed processing command\n", __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - - do { - while ((burst_count = tpm_read_burst_count(locality)) == 0) { - if (max_cycles++ == MAX_DELAY_US) { - printf("%s:%d TPM stuck on read\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - udelay(1); - } - - max_cycles = 0; - - while (burst_count-- && (offset < expected_count)) { - buffer[offset++] = tpm_read_data(locality); - if (offset == 6) { - /* - * We got the first six bytes of the reply, - * let's figure out how many bytes to expect - * total - it is stored as a 4 byte number in - * network order, starting with offset 2 into - * the body of the reply. - */ - u32 real_length; - memcpy(&real_length, - buffer + 2, - sizeof(real_length)); - expected_count = be32_to_cpu(real_length); - - if ((expected_count < offset) || - (expected_count > *len)) { - printf("%s:%d bad response size %d\n", - __FILE__, __LINE__, - expected_count); - return TPM_DRIVER_ERR; - } - } - } - - /* Wait for the next portion */ - if (tis_wait_valid(locality)) { - printf("%s:%d failed to read response\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - - if (offset == expected_count) - break; /* We got all we need */ - - } while (tis_has_valid_data(locality)); - - /* * Make sure we indeed read all there was. */ - if (tis_has_valid_data(locality)) { - printf("%s:%d wrong receive status: %x %d bytes left\n", - __FILE__, __LINE__, tpm_read_status(locality), - tpm_read_burst_count(locality)); - return TPM_DRIVER_ERR; - } - - /* Tell the TPM that we are done. */ - if (tis_command_ready(locality) == TPM_TIMEOUT_ERR) - return TPM_DRIVER_ERR; - - *len = offset; - return 0; -} - -/* - * tis_init() - * - * Initialize the TPM device. Returns 0 on success or TPM_DRIVER_ERR on - * failure (in case device probing did not succeed). - */ -int tis_init(void) -{ - if (tis_probe()) - return TPM_DRIVER_ERR; - return 0; -} - -/* - * tis_open() - * - * Requests access to locality 0 for the caller. After all commands have been - * completed the caller is supposed to call tis_close(). - * - * Returns 0 on success, TPM_DRIVER_ERR on failure. - */ -int tis_open(void) -{ - u8 locality = 0; /* we use locality zero for everything */ - - if (tis_close()) - return TPM_DRIVER_ERR; - - /* now request access to locality */ - tis_request_access(locality); - - /* did we get a lock? */ - if (tis_wait_received_access(locality)) { - printf("%s:%d - failed to lock locality %d\n", - __FILE__, __LINE__, locality); - return TPM_DRIVER_ERR; - } - - /* Certain TPMs seem to need some delay here or they hang... */ - udelay(10); - - if (tis_command_ready(locality) == TPM_TIMEOUT_ERR) - return TPM_DRIVER_ERR; - - return 0; -} - -/* - * tis_close() - * - * terminate the current session with the TPM by releasing the locked - * locality. Returns 0 on success of TPM_DRIVER_ERR on failure (in case lock - * removal did not succeed). - */ -int tis_close(void) -{ - u8 locality = 0; - if (tis_has_access(locality)) { - tis_drop_access(locality); - if (tis_wait_dropped_access(locality)) { - printf("%s:%d - failed to release locality %d\n", - __FILE__, __LINE__, locality); - return TPM_DRIVER_ERR; - } - } - return 0; -} - -/* - * tis_sendrecv() - * - * Send the requested data to the TPM and then try to get its response - * - * @sendbuf - buffer of the data to send - * @send_size size of the data to send - * @recvbuf - memory to save the response to - * @recv_len - pointer to the size of the response buffer - * - * Returns 0 on success (and places the number of response bytes at recv_len) - * or TPM_DRIVER_ERR on failure. - */ -int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, - uint8_t *recvbuf, size_t *recv_len) -{ - if (tis_senddata(sendbuf, send_size)) { - printf("%s:%d failed sending data to TPM\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - - return tis_readresponse(recvbuf, recv_len); -} - -#ifdef __RAMSTAGE__ - -/* - * tis_setup_interrupt() - * - * Set up the interrupt vector and polarity for locality 0 and - * disable all interrupts so they are unused in firmware but can - * be enabled by the OS. - * - * The values used here must match what is passed in the TPM ACPI - * device if ACPI is used on the platform. - * - * @vector - TPM interrupt vector - * @polarity - TPM interrupt polarity - * - * Returns 0 on success, TPM_DRIVER_ERR on failure. - */ -static int tis_setup_interrupt(int vector, int polarity) -{ - u8 locality = 0; - int has_access = tis_has_access(locality); - - /* Open connection and request access if not already granted */ - if (!has_access && tis_open() < 0) - return TPM_DRIVER_ERR; - - /* Set TPM interrupt vector */ - tpm_write_int_vector(vector, locality); - - /* Set TPM interupt polarity and disable interrupts */ - tpm_write_int_polarity(polarity, locality); - - /* Close connection if it was opened */ - if (!has_access && tis_close() < 0) - return TPM_DRIVER_ERR; - - return 0; -} - -static void lpc_tpm_read_resources(struct device *dev) -{ - /* Static 5K memory region specified in Kconfig */ - mmio_resource(dev, 0, CONFIG_TPM_TIS_BASE_ADDRESS >> 10, 0x5000 >> 10); -} - -static void lpc_tpm_set_resources(struct device *dev) -{ - tpm_config_t *config = (tpm_config_t *)dev->chip_info; - struct resource *res; - - for (res = dev->resource_list; res; res = res->next) { - if (!(res->flags & IORESOURCE_ASSIGNED)) - continue; - - if (res->flags & IORESOURCE_IRQ) { - /* Set interrupt vector */ - tis_setup_interrupt((int)res->base, - config->irq_polarity); - } else { - continue; - } - - res->flags |= IORESOURCE_STORED; - report_resource_stored(dev, res, " <tpm>"); - } -} - -static struct device_operations lpc_tpm_ops = { - .read_resources = &lpc_tpm_read_resources, - .set_resources = &lpc_tpm_set_resources, -}; - -static struct pnp_info pnp_dev_info[] = { - { .flags = PNP_IRQ0 } -}; - -static void enable_dev(struct device *dev) -{ - pnp_enable_devices(dev, &lpc_tpm_ops, - ARRAY_SIZE(pnp_dev_info), pnp_dev_info); -} - -struct chip_operations drivers_pc80_tpm_ops = { - CHIP_NAME("LPC TPM") - .enable_dev = enable_dev -}; - -#endif /* __RAMSTAGE__ */ diff --git a/src/drivers/tpm/Kconfig b/src/drivers/tpm/Kconfig new file mode 100644 index 0000000..ca1e2fc --- /dev/null +++ b/src/drivers/tpm/Kconfig @@ -0,0 +1,24 @@ +source src/drivers/tpm/lpc/Kconfig +source src/drivers/tpm/i2c/Kconfig + +config TPM_INIT_FAILURE_IS_FATAL + bool + default n + depends on (LPC_TPM || I2C_TPM) && !TPM_DEACTIVATE + help + What to do if TPM init failed. If true, force a hard reset, + otherwise just log error message to console. + +config SKIP_TPM_STARTUP_ON_NORMAL_BOOT + bool + default n + depends on (LPC_TPM || I2C_TPM) && !TPM_DEACTIVATE + help + Skip TPM init on normal boot. Useful if payload does TPM init. + +config TPM_DEACTIVATE + bool "Deactivate TPM" + default n + depends on LPC_TPM || I2C_TPM + help + Deactivate TPM by issuing deactivate command. diff --git a/src/drivers/tpm/Makefile.inc b/src/drivers/tpm/Makefile.inc new file mode 100644 index 0000000..a7fad64 --- /dev/null +++ b/src/drivers/tpm/Makefile.inc @@ -0,0 +1 @@ +subdirs-y = i2c lpc \ No newline at end of file diff --git a/src/drivers/tpm/acpi/tpm.asl b/src/drivers/tpm/acpi/tpm.asl new file mode 100644 index 0000000..090bf4c --- /dev/null +++ b/src/drivers/tpm/acpi/tpm.asl @@ -0,0 +1,219 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* Trusted Platform Module */ + +#if CONFIG_LPC_TPM + +Device (TPM) +{ + Name (_HID, EISAID ("PNP0C31")) + Name (_CID, 0x310cd041) + Name (_UID, 1) + + OperationRegion (TREG, SystemMemory, + CONFIG_TPM_TIS_BASE_ADDRESS, 0x5000) + Field (TREG, ByteAcc, NoLock, Preserve) + { + /* TPM_INT_ENABLE_0 */ + Offset (0x0008), + , 3, + ITPL, 2, /* Interrupt type and polarity */ + + /* TPM_INT_VECTOR_0 */ + Offset (0x000C), + IVEC, 4, /* SERIRQ vector */ + + /* TPM_DID_VID */ + Offset (0x0f00), + DVID, 32, /* Device and vendor ID */ + } + + Method (_STA, 0) + { +#if !CONFIG_TPM_DEACTIVATE + If (LAnd (LGreater (DVID, 0), LLess (DVID, 0xffffffff))) { + Return (0xf) + } Else { + /* TPM module missing */ + Return (0x0) + } +#else + Return (0x0) +#endif + } + + Name (IBUF, ResourceTemplate () + { + /* Updated based on TPM interrupt for Locality 0 */ + Interrupt (ResourceConsumer, Edge, ActiveHigh, + Exclusive, , , TIRQ) { 0 } + }) + + Name (RBUF, ResourceTemplate () + { + IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) + Memory32Fixed (ReadWrite, CONFIG_TPM_TIS_BASE_ADDRESS, 0x5000) + }) + + Method (_CRS, 0, Serialized) + { + CreateField (^IBUF, ^TIRQ._INT, 32, TVEC) + CreateBitField (^IBUF, ^TIRQ._HE, TTYP) + CreateBitField (^IBUF, ^TIRQ._LL, TPOL) + CreateBitField (^IBUF, ^TIRQ._SHR, TSHR) + + If (LGreater (CONFIG_TPM_PIRQ, 0)) { + /* + * PIRQ: Update interrupt vector with configured PIRQ + */ + Store (CONFIG_TPM_PIRQ, TVEC) + + /* Active-Low Level-Triggered Shared */ + Store (One, TPOL) + Store (Zero, TTYP) + Store (One, TSHR) + + /* Merge IRQ with base address */ + Return (ConcatenateResTemplate (RBUF, IBUF)) + } ElseIf (LGreater (IVEC, 0)) { + /* + * SERIRQ: Update interrupt vector based on TPM register + */ + Store (IVEC, TVEC) + + If (LEqual (ITPL, 0x0)) { + /* Active-High Level-Triggered Shared */ + Store (Zero, TPOL) + Store (Zero, TTYP) + Store (One, TSHR) + } ElseIf (LEqual (ITPL, 0x1)) { + /* Active-Low Level-Triggered Shared */ + Store (One, TPOL) + Store (Zero, TTYP) + Store (One, TSHR) + } ElseIf (LEqual (ITPL, 0x2)) { + /* Active-High Edge-Triggered Exclusive */ + Store (Zero, TPOL) + Store (One, TTYP) + Store (Zero, TSHR) + } ElseIf (LEqual (ITPL, 0x3)) { + /* Active-Low Edge-Triggered Exclusive */ + Store (One, TPOL) + Store (One, TTYP) + Store (Zero, TSHR) + } + + /* Merge IRQ with base address */ + Return (ConcatenateResTemplate (RBUF, IBUF)) + } Else { + Return (RBUF) + } + } + + /* Dummy _DSM to make Bitlocker work. */ + Method (_DSM, 4, Serialized) + { + /* Physical presence interface. + This is used to submit commands like "Clear TPM" to + be run at next reboot provided that user confirms them. + Spec allows user to cancel all commands and/or + configure BIOS to reject commands. So we pretend that + user did just this: cancelled everything. If user + really wants to clear TPM the only option now is to do it manually + in payload. + */ + If (LEqual (Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653"))) + { + If (LEqual (Arg2, 0)) + { + /* Functions 1-8. */ + Return (Buffer (2) { 0xFF, 0x01 }) + } + + /* Interface version: 1.2 */ + If (LEqual (Arg2, 1)) + { + Return ("1.2") + } + + /* Submit operations: drop on the floor and return success. */ + If (LEqual (Arg2, 2)) + { + Return (0x00) + } + + /* Pending operation: none. */ + If (LEqual (Arg2, 3)) + { + Return (Package (2) { 0, 0 }) + } + + /* Pre-OS transition method: reboot. */ + If (LEqual (Arg2, 4)) + { + Return (2) + } + + /* Operation response: no operation executed. */ + If (LEqual (Arg2, 5)) + { + Return (Package (3) { 0, 0, 0 }) + } + + /* Set preffered user language: deprecated and must return 3 aka "not implemented". */ + If (LEqual (Arg2, 6)) + { + Return (3) + } + + /* Submit operations: deny. */ + If (LEqual (Arg2, 7)) + { + Return (3) + } + + /* All actions are forbidden. */ + If (LEqual (Arg2, 8)) + { + Return (1) + } + + Return (1) + } + + /* Memory clearing on boot: just a dummy. */ + If (LEqual (Arg0, ToUUID("376054ed-cc13-4675-901c-4756d7f2d45d"))) + { + If (LEqual (Arg2, 0)) + { + /* Function 1. */ + Return (Buffer (1) { 3 }) + } + + /* Just return success. */ + If (LEqual (Arg2, 1)) + { + Return (0) + } + + Return (1) + } + + Return (Buffer (1) { 0 }) + } +} + +#endif /* CONFIG_LPC_TPM */ diff --git a/src/drivers/tpm/i2c/Kconfig b/src/drivers/tpm/i2c/Kconfig new file mode 100644 index 0000000..82317d7 --- /dev/null +++ b/src/drivers/tpm/i2c/Kconfig @@ -0,0 +1,13 @@ +config I2C_TPM + bool "Enable TPM support" + depends on !PC80_SYSTEM # for now + +config DRIVER_TPM_I2C_BUS + hex "I2C TPM chip bus" + default 9 # FIXME, workaround for Kconfig BS + depends on I2C_TPM + +config DRIVER_TPM_I2C_ADDR + hex "I2C TPM chip address" + default 2 # FIXME, workaround for Kconfig BS + depends on I2C_TPM diff --git a/src/drivers/tpm/i2c/Makefile.inc b/src/drivers/tpm/i2c/Makefile.inc new file mode 100644 index 0000000..b415478 --- /dev/null +++ b/src/drivers/tpm/i2c/Makefile.inc @@ -0,0 +1,4 @@ +ramstage-$(CONFIG_I2C_TPM) += tpm.c +romstage-$(CONFIG_I2C_TPM) += tpm.c +verstage-$(CONFIG_I2C_TPM) += tpm.c +bootblock-$(CONFIG_I2C_TPM) += tpm.c diff --git a/src/drivers/tpm/i2c/chip.h b/src/drivers/tpm/i2c/chip.h new file mode 100644 index 0000000..9ab688e --- /dev/null +++ b/src/drivers/tpm/i2c/chip.h @@ -0,0 +1,98 @@ +#include <stddef.h> +#include <stdint.h> + +#ifndef DRIVERS_TPM_I2C_CHIP_H +#define DRIVERS_TPM_I2C_CHIP_H + + +enum tpm_timeout { + TPM_TIMEOUT = 1, /* msecs */ +}; + +/* Size of external transmit buffer (used for stack buffer in tpm_sendrecv) */ +#define TPM_BUFSIZE 1260 + +/* Index of fields in TPM command buffer */ +#define TPM_CMD_SIZE_BYTE 2 +#define TPM_CMD_ORDINAL_BYTE 6 + +/* Index of Count field in TPM response buffer */ +#define TPM_RSP_SIZE_BYTE 2 +#define TPM_RSP_RC_BYTE 6 + +struct tpm_chip; + +struct tpm_vendor_specific { + const uint8_t req_complete_mask; + const uint8_t req_complete_val; + const uint8_t req_canceled; + int irq; + int (*recv)(struct tpm_chip *, uint8_t *, size_t); + int (*send)(struct tpm_chip *, uint8_t *, size_t); + void (*cancel)(struct tpm_chip *); + uint8_t(*status)(struct tpm_chip *); + int locality; +}; + +struct tpm_chip { + int is_open; + struct tpm_vendor_specific vendor; +}; + +struct tpm_input_header { + uint16_t tag; + uint32_t length; + uint32_t ordinal; +} __attribute__ ((packed)); + +struct tpm_output_header { + uint16_t tag; + uint32_t length; + uint32_t return_code; +} __attribute__ ((packed)); + +struct timeout_t { + uint32_t a; + uint32_t b; + uint32_t c; + uint32_t d; +} __attribute__ ((packed)); + +struct duration_t { + uint32_t tpm_short; + uint32_t tpm_medium; + uint32_t tpm_long; +} __attribute__ ((packed)); + +typedef union { + struct timeout_t timeout; + struct duration_t duration; +} cap_t; + +struct tpm_getcap_params_in { + uint32_t cap; + uint32_t subcap_size; + uint32_t subcap; +} __attribute__ ((packed)); + +struct tpm_getcap_params_out { + uint32_t cap_size; + cap_t cap; +} __attribute__ ((packed)); + +typedef union { + struct tpm_input_header in; + struct tpm_output_header out; +} tpm_cmd_header; + +typedef union { + struct tpm_getcap_params_out getcap_out; + struct tpm_getcap_params_in getcap_in; +} tpm_cmd_params; + +struct tpm_cmd_t { + tpm_cmd_header header; + tpm_cmd_params params; +} __attribute__ ((packed)); + +#endif \ No newline at end of file diff --git a/src/drivers/tpm/i2c/tpm.c b/src/drivers/tpm/i2c/tpm.c new file mode 100644 index 0000000..ee97e9e --- /dev/null +++ b/src/drivers/tpm/i2c/tpm.c @@ -0,0 +1,721 @@ +/* + * Copyright (C) 2011 Infineon Technologies + * + * Authors: + * Peter Huewe <huewe.external(a)infineon.com> + * + * Description: + * Device driver for TCG/TCPA TPM (trusted platform module). + * Specifications at www.trustedcomputinggroup.org + * + * This device driver implements the TPM interface as defined in + * the TCG TPM Interface Spec version 1.2, revision 1.0 and the + * Infineon I2C Protocol Stack Specification v0.20. + * + * It is based on the Linux kernel driver tpm.c from Leendert van + * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall. + * + * Version: 2.1.1 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <string.h> +#include <types.h> +#include <delay.h> +#include <console/console.h> +#include <device/i2c.h> +#include <endian.h> +#include <timer.h> +#include <assert.h> +#include "chip.h" +#include <tpm/tpm.h> + +/* Address of the TPM on the I2C bus */ +#define TPM_I2C_ADDR 0x20 + +/* max. number of iterations after I2C NAK */ +#define MAX_COUNT 3 + +#define SLEEP_DURATION 60 /* in usec */ + +/* max. number of iterations after I2C NAK for 'long' commands + * we need this especially for sending TPM_READY, since the cleanup after the + * transtion to the ready state may take some time, but it is unpredictable + * how long it will take. + */ +#define MAX_COUNT_LONG 50 + +#define SLEEP_DURATION_LONG 210 /* in usec */ + +/* expected value for DIDVID register */ +#define TPM_TIS_I2C_DID_VID_9635 0x000b15d1L +#define TPM_TIS_I2C_DID_VID_9645 0x001a15d1L + +#define TPM_CMD_COUNT_BYTE 2 +#define TPM_CMD_ORDINAL_BYTE 6 +#define TPM_VALID_STATUS (1 << 7) + +/* global structure for tpm chip data */ +struct tpm_chip g_chip; + +enum i2c_chip_type { + SLB9635, + SLB9645, + UNKNOWN, +}; + +static const char * const chip_name[] = { + [SLB9635] = "slb9635tt", + [SLB9645] = "slb9645tt", + [UNKNOWN] = "unknown/fallback to slb9635", +}; + +/* Structure to store I2C TPM specific stuff */ +struct tpm_inf_dev { + int bus; + unsigned int addr; + uint8_t buf[TPM_BUFSIZE + sizeof(uint8_t)]; // max. buffer size + addr + enum i2c_chip_type chip_type; +}; + +static struct tpm_inf_dev tpm_dev = { + .bus = -1, + .addr = TPM_I2C_ADDR +}; + +/* + * iic_tpm_read() - read from TPM register + * @addr: register address to read from + * @buffer: provided by caller + * @len: number of bytes to read + * + * Read len bytes from TPM register and put them into + * buffer (little-endian format, i.e. first byte is put into buffer[0]). + * + * NOTE: TPM is big-endian for multi-byte values. Multi-byte + * values have to be swapped. + * + * Return -1 on error, 0 on success. + */ +static int iic_tpm_read(uint8_t addr, uint8_t *buffer, size_t len) +{ + int rc; + int count; + + if (tpm_dev.bus < 0) + return -1; + if ((tpm_dev.chip_type == SLB9635) || (tpm_dev.chip_type == UNKNOWN)) { + /* slb9635 protocol should work in both cases */ + for (count = 0; count < MAX_COUNT; count++) { + rc = i2c_write_raw(tpm_dev.bus, tpm_dev.addr, &addr, 1); + if (rc == 0) + break; /* success, break to skip sleep */ + + udelay(SLEEP_DURATION); + } + + if (rc) + return -1; + + /* After the TPM has successfully received the register address + * it needs some time, thus we're sleeping here again, before + * retrieving the data + */ + for (count = 0; count < MAX_COUNT; count++) { + udelay(SLEEP_DURATION); + rc = i2c_read_raw(tpm_dev.bus, tpm_dev.addr, + buffer, len); + if (rc == 0) + break; /* success, break to skip sleep */ + + } + } else { + /* use a combined read for newer chips + * unfortunately the smbus functions are not suitable due to + * the 32 byte limit of the smbus. + * retries should usually not be needed, but are kept just to + * be safe on the safe side. + */ + struct i2c_seg aseg = { .read = 0, .chip = tpm_dev.addr, + .buf = &addr, .len = 1 }; + struct i2c_seg dseg = { .read = 1, .chip = tpm_dev.addr, + .buf = buffer, .len = len }; + for (count = 0; count < MAX_COUNT; count++) { + rc = i2c_transfer(tpm_dev.bus, &aseg, 1) || + i2c_transfer(tpm_dev.bus, &dseg, 1); + if (rc == 0) + break; /* break here to skip sleep */ + udelay(SLEEP_DURATION); + } + } + + /* take care of 'guard time' */ + udelay(SLEEP_DURATION); + if (rc) + return -1; + + return 0; +} + +static int iic_tpm_write_generic(uint8_t addr, uint8_t *buffer, size_t len, + unsigned int sleep_time, + uint8_t max_count) +{ + int rc = 0; + int count; + + if (len > TPM_BUFSIZE) { + printk(BIOS_DEBUG, "%s: Length %zd is too large\n", __func__, len); + return -1; + } + + /* prepare send buffer */ + tpm_dev.buf[0] = addr; + memcpy(&(tpm_dev.buf[1]), buffer, len); + + if (tpm_dev.bus < 0) + return -1; + for (count = 0; count < max_count; count++) { + rc = i2c_write_raw(tpm_dev.bus, tpm_dev.addr, + tpm_dev.buf, len + 1); + if (rc == 0) + break; /* success, break to skip sleep */ + + udelay(sleep_time); + } + + /* take care of 'guard time' */ + udelay(SLEEP_DURATION); + if (rc) + return -1; + + return 0; +} + +/* + * iic_tpm_write() - write to TPM register + * @addr: register address to write to + * @buffer: containing data to be written + * @len: number of bytes to write + * + * Write len bytes from provided buffer to TPM register (little + * endian format, i.e. buffer[0] is written as first byte). + * + * NOTE: TPM is big-endian for multi-byte values. Multi-byte + * values have to be swapped. + * + * NOTE: use this function instead of the iic_tpm_write_generic function. + * + * Return -EIO on error, 0 on success + */ +static int iic_tpm_write(uint8_t addr, uint8_t *buffer, size_t len) +{ + return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION, + MAX_COUNT); +} + +/* + * This function is needed especially for the cleanup situation after + * sending TPM_READY + * */ +static int iic_tpm_write_long(uint8_t addr, uint8_t *buffer, size_t len) +{ + return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION_LONG, + MAX_COUNT_LONG); +} + +#define TPM_HEADER_SIZE 10 + +enum tis_access { + TPM_ACCESS_VALID = 0x80, + TPM_ACCESS_ACTIVE_LOCALITY = 0x20, + TPM_ACCESS_REQUEST_PENDING = 0x04, + TPM_ACCESS_REQUEST_USE = 0x02, +}; + +enum tis_status { + TPM_STS_VALID = 0x80, + TPM_STS_COMMAND_READY = 0x40, + TPM_STS_GO = 0x20, + TPM_STS_DATA_AVAIL = 0x10, + TPM_STS_DATA_EXPECT = 0x08, +}; + +#define TPM_ACCESS(l) (0x0000 | ((l) << 4)) +#define TPM_STS(l) (0x0001 | ((l) << 4)) +#define TPM_DATA_FIFO(l) (0x0005 | ((l) << 4)) +#define TPM_DID_VID(l) (0x0006 | ((l) << 4)) + +static int check_locality(struct tpm_chip *chip, int loc) +{ + uint8_t buf; + + if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0) + return -1; + + if ((buf & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == + (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { + chip->vendor.locality = loc; + return loc; + } + + return -1; +} + +static void release_locality(struct tpm_chip *chip, int loc, int force) +{ + uint8_t buf; + if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0) + return; + + if (force || (buf & (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == + (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) { + buf = TPM_ACCESS_ACTIVE_LOCALITY; + iic_tpm_write(TPM_ACCESS(loc), &buf, 1); + } +} + +static int request_locality(struct tpm_chip *chip, int loc) +{ + uint8_t buf = TPM_ACCESS_REQUEST_USE; + + if (check_locality(chip, loc) >= 0) + return loc; /* we already have the locality */ + + iic_tpm_write(TPM_ACCESS(loc), &buf, 1); + + /* wait for burstcount */ + int timeout = 2 * 1000; /* 2s timeout */ + while (timeout) { + if (check_locality(chip, loc) >= 0) + return loc; + mdelay(TPM_TIMEOUT); + timeout--; + } + + return -1; +} + +static uint8_t tpm_tis_i2c_status(struct tpm_chip *chip) +{ + /* NOTE: Since I2C read may fail, return 0 in this case --> time-out */ + uint8_t buf; + if (iic_tpm_read(TPM_STS(chip->vendor.locality), &buf, 1) < 0) + return 0; + else + return buf; +} + +static void tpm_tis_i2c_ready(struct tpm_chip *chip) +{ + /* this causes the current command to be aborted */ + uint8_t buf = TPM_STS_COMMAND_READY; + iic_tpm_write_long(TPM_STS(chip->vendor.locality), &buf, 1); +} + +static ssize_t get_burstcount(struct tpm_chip *chip) +{ + ssize_t burstcnt; + uint8_t buf[3]; + + /* wait for burstcount */ + int timeout = 2 * 1000; /* 2s timeout */ + while (timeout) { + /* Note: STS is little endian */ + if (iic_tpm_read(TPM_STS(chip->vendor.locality) + 1, buf, 3) < 0) + burstcnt = 0; + else + burstcnt = (buf[2] << 16) + (buf[1] << 8) + buf[0]; + + if (burstcnt) + return burstcnt; + mdelay(TPM_TIMEOUT); + timeout--; + } + return -1; +} + +static int wait_for_stat(struct tpm_chip *chip, uint8_t mask, int *status) +{ + unsigned long timeout = 2 * 1024; + while (timeout) { + *status = tpm_tis_i2c_status(chip); + if ((*status & mask) == mask) + return 0; + mdelay(TPM_TIMEOUT); + timeout--; + } + + return -1; +} + +static int recv_data(struct tpm_chip *chip, uint8_t *buf, size_t count) +{ + size_t size = 0; + + while (size < count) { + ssize_t burstcnt = get_burstcount(chip); + int rc; + + /* burstcount < 0 = TPM is busy */ + if (burstcnt < 0) + return burstcnt; + + /* limit received data to max. left */ + if (burstcnt > (count - size)) + burstcnt = count - size; + + rc = iic_tpm_read(TPM_DATA_FIFO(chip->vendor.locality), + &(buf[size]), + burstcnt); + if (rc == 0) + size += burstcnt; + + } + return size; +} + +static int tpm_tis_i2c_recv(struct tpm_chip *chip, uint8_t *buf, size_t count) +{ + int size = 0; + uint32_t expected; + int status; + + if (count < TPM_HEADER_SIZE) { + size = -1; + goto out; + } + + /* read first 10 bytes, including tag, paramsize, and result */ + size = recv_data(chip, buf, TPM_HEADER_SIZE); + if (size < TPM_HEADER_SIZE) { + printk(BIOS_DEBUG, "tpm_tis_i2c_recv: Unable to read header\n"); + goto out; + } + + memcpy(&expected, buf + TPM_RSP_SIZE_BYTE, sizeof(expected)); + expected = be32_to_cpu(expected); + if ((size_t)expected > count) { + size = -1; + goto out; + } + + size += recv_data(chip, &buf[TPM_HEADER_SIZE], + expected - TPM_HEADER_SIZE); + if (size < expected) { + printk(BIOS_DEBUG, "tpm_tis_i2c_recv: Unable to " + "read remainder of result\n"); + size = -1; + goto out; + } + + wait_for_stat(chip, TPM_STS_VALID, &status); + if (status & TPM_STS_DATA_AVAIL) { /* retry? */ + printk(BIOS_DEBUG, "tpm_tis_i2c_recv: Error left over data\n"); + size = -1; + goto out; + } + +out: + tpm_tis_i2c_ready(chip); + + return size; +} + +static int tpm_tis_i2c_send(struct tpm_chip *chip, uint8_t *buf, size_t len) +{ + int status; + size_t count = 0; + uint8_t sts = TPM_STS_GO; + + if (len > TPM_BUFSIZE) + return -1; /* command is too long for our TPM, sorry */ + + status = tpm_tis_i2c_status(chip); + if ((status & TPM_STS_COMMAND_READY) == 0) { + tpm_tis_i2c_ready(chip); + if (wait_for_stat(chip, TPM_STS_COMMAND_READY, &status) < 0) + goto out_err; + } + + while (count < len - 1) { + ssize_t burstcnt = get_burstcount(chip); + + /* burstcount < 0 = TPM is busy */ + if (burstcnt < 0) + return burstcnt; + + if (burstcnt > (len-1-count)) + burstcnt = len-1-count; + +#ifdef CONFIG_TPM_I2C_BURST_LIMITATION + if (burstcnt > CONFIG_TPM_I2C_BURST_LIMITATION) + burstcnt = CONFIG_TPM_I2C_BURST_LIMITATION; +#endif /* CONFIG_TPM_I2C_BURST_LIMITATION */ + + if (iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), + &(buf[count]), burstcnt) == 0) + count += burstcnt; + + wait_for_stat(chip, TPM_STS_VALID, &status); + if ((status & TPM_STS_DATA_EXPECT) == 0) + goto out_err; + } + + /* write last byte */ + iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), &(buf[count]), 1); + + wait_for_stat(chip, TPM_STS_VALID, &status); + if ((status & TPM_STS_DATA_EXPECT) != 0) + goto out_err; + + /* go and do it */ + iic_tpm_write(TPM_STS(chip->vendor.locality), &sts, 1); + + return len; + +out_err: + tpm_tis_i2c_ready(chip); + + return -1; +} + +static struct tpm_vendor_specific tpm_tis_i2c = { + .status = tpm_tis_i2c_status, + .recv = tpm_tis_i2c_recv, + .send = tpm_tis_i2c_send, + .cancel = tpm_tis_i2c_ready, + .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, + .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, + .req_canceled = TPM_STS_COMMAND_READY, +}; + +int tis_open(void) +{ + int rc; + + if (g_chip.is_open) { + printk(BIOS_DEBUG, "tis_open() called twice.\n"); + return -1; + } + + rc = tpm_vendor_init(CONFIG_DRIVER_TPM_I2C_BUS, + CONFIG_DRIVER_TPM_I2C_ADDR); + + if (rc < 0) + g_chip.is_open = 0; + + if (rc) { + return -1; + } + + return 0; +} + +int tis_close(void) +{ + if (g_chip.is_open) { + tpm_vendor_cleanup(&g_chip); + g_chip.is_open = 0; + } + + return 0; +} + +int tis_init(void) +{ + int bus = CONFIG_DRIVER_TPM_I2C_BUS; + int chip = CONFIG_DRIVER_TPM_I2C_ADDR; + struct stopwatch sw; + uint8_t buf = 0; + int ret; + long sw_run_duration = 750; + + /* + * Probe TPM. Check if the TPM_ACCESS register's ValidSts bit is set(1) + * If the bit remains clear(0) then claim that init has failed. + */ + stopwatch_init_msecs_expire(&sw, sw_run_duration); + do { + ret = i2c_readb(bus, chip, 0, &buf); + if (!ret && (buf & TPM_VALID_STATUS)) { + sw_run_duration = stopwatch_duration_msecs(&sw); + break; + } + } while (!stopwatch_expired(&sw)); + + printk(BIOS_INFO, + "%s: ValidSts bit %s(%d) in TPM_ACCESS register after %ld ms\n", + __func__, (buf & TPM_VALID_STATUS) ? "set" : "clear", + (buf & TPM_VALID_STATUS) >> 7, sw_run_duration); + + /* + * Claim failure if the ValidSts (bit 7) is clear. + */ + if (!(buf & TPM_VALID_STATUS)) + return -1; + + return 0; +} + +static ssize_t tpm_transmit(const uint8_t *buf, size_t bufsiz) +{ + int rc; + uint32_t count, ordinal; + + struct tpm_chip *chip = &g_chip; + + memcpy(&count, buf + TPM_CMD_COUNT_BYTE, sizeof(count)); + count = be32_to_cpu(count); + memcpy(&ordinal, buf + TPM_CMD_ORDINAL_BYTE, sizeof(ordinal)); + ordinal = be32_to_cpu(ordinal); + + if (count == 0) { + printk(BIOS_DEBUG, "tpm_transmit: no data\n"); + return -1; + } + if (count > bufsiz) { + printk(BIOS_DEBUG, "tpm_transmit: invalid count value %x %zx\n", + count, bufsiz); + return -1; + } + + ASSERT(chip->vendor.send); + rc = chip->vendor.send(chip, (uint8_t *) buf, count); + if (rc < 0) { + printk(BIOS_DEBUG, "tpm_transmit: tpm_send error\n"); + goto out; + } + + if (chip->vendor.irq) + goto out_recv; + + int timeout = 2 * 60 * 1000; /* two minutes timeout */ + while (timeout) { + ASSERT(chip->vendor.status); + uint8_t status = chip->vendor.status(chip); + if ((status & chip->vendor.req_complete_mask) == + chip->vendor.req_complete_val) { + goto out_recv; + } + + if ((status == chip->vendor.req_canceled)) { + printk(BIOS_DEBUG, "tpm_transmit: Operation Canceled\n"); + rc = -1; + goto out; + } + mdelay(TPM_TIMEOUT); + timeout--; + } + + ASSERT(chip->vendor.cancel); + chip->vendor.cancel(chip); + printk(BIOS_DEBUG, "tpm_transmit: Operation Timed out\n"); + rc = -1; //ETIME; + goto out; + +out_recv: + + rc = chip->vendor.recv(chip, (uint8_t *) buf, TPM_BUFSIZE); + if (rc < 0) + printk(BIOS_DEBUG, "tpm_transmit: tpm_recv: error %d\n", rc); +out: + return rc; +} + +int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size, + uint8_t *recvbuf, size_t *rbuf_len) +{ + uint8_t buf[TPM_BUFSIZE]; + + if (sizeof(buf) < sbuf_size) + return -1; + + memcpy(buf, sendbuf, sbuf_size); + + int len = tpm_transmit(buf, sbuf_size); + + if (len < 10) { + *rbuf_len = 0; + return -1; + } + + if (len > *rbuf_len) { + *rbuf_len = len; + return -1; + } + + memcpy(recvbuf, buf, len); + *rbuf_len = len; + + return 0; +} + +/* Initialization of I2C TPM */ + +int tpm_vendor_init(unsigned bus, uint32_t dev_addr) +{ + uint32_t vendor; + unsigned int old_addr; + struct tpm_chip *chip; + + old_addr = tpm_dev.addr; + if (dev_addr != 0) + tpm_dev.addr = dev_addr; + tpm_dev.bus = bus; + + chip = &g_chip; + memcpy(&chip->vendor, &tpm_tis_i2c, sizeof(struct tpm_vendor_specific)); + chip->is_open = 1; + + /* Disable interrupts (not supported) */ + chip->vendor.irq = 0; + + if (request_locality(chip, 0) != 0) + goto out_err; + + /* Read four bytes from DID_VID register */ + if (iic_tpm_read(TPM_DID_VID(0), (uint8_t *)&vendor, 4) < 0) + goto out_release; + + if (vendor == TPM_TIS_I2C_DID_VID_9645) { + tpm_dev.chip_type = SLB9645; + } else if (be32_to_cpu(vendor) == TPM_TIS_I2C_DID_VID_9635) { + tpm_dev.chip_type = SLB9635; + } else { + printk(BIOS_DEBUG, "Vendor ID 0x%08x not recognized.\n", vendor); + goto out_release; + } + + printk(BIOS_DEBUG, "1.2 TPM (chip type %s device-id 0x%X)\n", + chip_name[tpm_dev.chip_type], vendor >> 16); + + /* + * A timeout query to TPM can be placed here. + * Standard timeout values are used so far + */ + + return 0; + +out_release: + release_locality(chip, 0, 1); + +out_err: + tpm_dev.addr = old_addr; + return -1; +} + +void tpm_vendor_cleanup(struct tpm_chip *chip) +{ + release_locality(chip, chip->vendor.locality, 1); +} diff --git a/src/drivers/tpm/lpc/Kconfig b/src/drivers/tpm/lpc/Kconfig new file mode 100644 index 0000000..e377e99 --- /dev/null +++ b/src/drivers/tpm/lpc/Kconfig @@ -0,0 +1,32 @@ +config MAINBOARD_HAS_LPC_TPM + bool + default n + help + Board has TPM support + +config LPC_TPM + bool "Enable TPM support" + depends on MAINBOARD_HAS_LPC_TPM + default n + help + Enable this option to enable LPC TPM support in coreboot. + + If unsure, say N. + +config TPM_TIS_BASE_ADDRESS + hex + default 0xfed40000 + depends on LPC_TPM + help + This can be used to adjust the TPM memory base address. + The default is specified by the TCG PC Client Specific TPM + Interface Specification 1.2 and should not be changed unless + the TPM being used does not conform to TPM TIS 1.2. + +config TPM_PIRQ + hex + default 0 + depends on LPC_TPM + help + This can be used to specify a PIRQ to use instead of SERIRQ, + which is needed for SPI TPM interrupt support on x86. diff --git a/src/drivers/tpm/lpc/Makefile.inc b/src/drivers/tpm/lpc/Makefile.inc new file mode 100644 index 0000000..a592639 --- /dev/null +++ b/src/drivers/tpm/lpc/Makefile.inc @@ -0,0 +1,4 @@ +ramstage-$(CONFIG_LPC_TPM) += tpm.c +romstage-$(CONFIG_LPC_TPM) += tpm.c +verstage-$(CONFIG_LPC_TPM) += tpm.c +bootblock-$(CONFIG_LPC_TPM) += tpm.c diff --git a/src/drivers/tpm/lpc/chip.h b/src/drivers/tpm/lpc/chip.h new file mode 100644 index 0000000..6b5b2c8 --- /dev/null +++ b/src/drivers/tpm/lpc/chip.h @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef DRIVERS_TPM_LPC_CHIP_H +#define DRIVERS_TPM_LPC_CHIP_H + +typedef struct drivers_tpm_config { + /* + * TPM Interrupt polarity: + * + * High Level 0 + * Low Level 1 + * Rising Edge 2 + * Falling Edge 3 + */ + u8 irq_polarity; +} tpm_config_t; + +#endif /* DRIVERS_TPM_LPC_CHIP_H */ diff --git a/src/drivers/tpm/lpc/tpm.c b/src/drivers/tpm/lpc/tpm.c new file mode 100644 index 0000000..471b6e9 --- /dev/null +++ b/src/drivers/tpm/lpc/tpm.c @@ -0,0 +1,772 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The code in this file has been heavily based on the article "Writing a TPM + * Device Driver" published on http://ptgmedia.pearsoncmg.com and the + * submission by Stefan Berger on Qemu-devel mailing list. + * + * One principal difference is that in the simplest config the other than 0 + * TPM localities do not get mapped by some devices (for instance, by + * Infineon slb9635), so this driver provides access to locality 0 only. + */ + +#include <stdlib.h> +#include <string.h> +#include <delay.h> +#include <arch/io.h> +#include <console/console.h> +#include <tpm/tpm.h> +#include <arch/early_variables.h> +#include <device/pnp.h> +#include "chip.h" + +#define PREFIX "lpc_tpm: " + +/* coreboot wrapper for TPM driver (start) */ +#define TPM_DEBUG(fmt, args...) do { \ + if (IS_ENABLED(CONFIG_DEBUG_TPM)) { \ + printk(BIOS_DEBUG, PREFIX); \ + printk(BIOS_DEBUG, fmt, ##args); \ + } } while (0) +#define TPM_DEBUG_IO_READ(reg_, val_) \ + TPM_DEBUG("Read reg 0x%x returns 0x%x\n", (reg_), (val_)) +#define TPM_DEBUG_IO_WRITE(reg_, val_) \ + TPM_DEBUG("Write reg 0x%x with 0x%x\n", (reg_), (val_)) +#define printf(x...) printk(BIOS_ERR, x) + +/* coreboot wrapper for TPM driver (end) */ + +/* the macro accepts the locality value, but only locality 0 is operational */ +#define TIS_REG(LOCALITY, REG) \ + (void *)(CONFIG_TPM_TIS_BASE_ADDRESS + (LOCALITY << 12) + REG) + +/* hardware registers' offsets */ +#define TIS_REG_ACCESS 0x0 +#define TIS_REG_INT_ENABLE 0x8 +#define TIS_REG_INT_VECTOR 0xc +#define TIS_REG_INT_STATUS 0x10 +#define TIS_REG_INTF_CAPABILITY 0x14 +#define TIS_REG_STS 0x18 +#define TIS_REG_BURST_COUNT 0x19 +#define TIS_REG_DATA_FIFO 0x24 +#define TIS_REG_DID_VID 0xf00 +#define TIS_REG_RID 0xf04 + +/* Some registers' bit field definitions */ +#define TIS_STS_VALID (1 << 7) /* 0x80 */ +#define TIS_STS_COMMAND_READY (1 << 6) /* 0x40 */ +#define TIS_STS_TPM_GO (1 << 5) /* 0x20 */ +#define TIS_STS_DATA_AVAILABLE (1 << 4) /* 0x10 */ +#define TIS_STS_EXPECT (1 << 3) /* 0x08 */ +#define TIS_STS_RESPONSE_RETRY (1 << 1) /* 0x02 */ + +#define TIS_ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */ +#define TIS_ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */ +#define TIS_ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */ +#define TIS_ACCESS_SEIZE (1 << 3) /* 0x08 */ +#define TIS_ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */ +#define TIS_ACCESS_REQUEST_USE (1 << 1) /* 0x02 */ +#define TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */ + +/* + * Error value returned if a tpm register does not enter the expected state + * after continuous polling. No actual TPM register reading ever returns ~0, + * so this value is a safe error indication to be mixed with possible status + * register values. + */ +#define TPM_TIMEOUT_ERR (~0) + +/* Error value returned on various TPM driver errors */ +#define TPM_DRIVER_ERR (~0) + + /* 1 second is plenty for anything TPM does.*/ +#define MAX_DELAY_US (1000 * 1000) + +/* + * Structures defined below allow creating descriptions of TPM vendor/device + * ID information for run time discovery. The only device the system knows + * about at this time is Infineon slb9635 + */ +struct device_name { + u16 dev_id; + const char * const dev_name; +}; + +struct vendor_name { + u16 vendor_id; + const char *vendor_name; + const struct device_name *dev_names; +}; + +static const struct device_name atmel_devices[] = { + {0x3204, "AT97SC3204"}, + {0xffff} +}; + +static const struct device_name infineon_devices[] = { + {0x000b, "SLB9635 TT 1.2"}, + {0x001a, "SLB9660 TT 1.2"}, + {0x001b, "SLB9670 TT 1.2"}, + {0xffff} +}; + +static const struct device_name nuvoton_devices[] = { + {0x00fe, "NPCT420AA V2"}, + {0xffff} +}; + +static const struct device_name stmicro_devices[] = { + {0x0000, "ST33ZP24" }, + {0xffff} +}; + +static const struct vendor_name vendor_names[] = { + {0x1114, "Atmel", atmel_devices}, + {0x15d1, "Infineon", infineon_devices}, + {0x1050, "Nuvoton", nuvoton_devices}, + {0x104a, "ST Microelectronics", stmicro_devices}, +}; + +/* + * Cached vendor/device ID pair to indicate that the device has been already + * discovered + */ +static u32 vendor_dev_id CAR_GLOBAL; + +static inline u8 tpm_read_status(int locality) +{ + u8 value = read8(TIS_REG(locality, TIS_REG_STS)); + TPM_DEBUG_IO_READ(TIS_REG_STS, value); + return value; +} + +static inline void tpm_write_status(u8 sts, int locality) +{ + TPM_DEBUG_IO_WRITE(TIS_REG_STS, sts); + write8(TIS_REG(locality, TIS_REG_STS), sts); +} + +static inline u8 tpm_read_data(int locality) +{ + u8 value = read8(TIS_REG(locality, TIS_REG_DATA_FIFO)); + TPM_DEBUG_IO_READ(TIS_REG_DATA_FIFO, value); + return value; +} + +static inline void tpm_write_data(u8 data, int locality) +{ + TPM_DEBUG_IO_WRITE(TIS_REG_STS, data); + write8(TIS_REG(locality, TIS_REG_DATA_FIFO), data); +} + +static inline u16 tpm_read_burst_count(int locality) +{ + u16 count; + count = read8(TIS_REG(locality, TIS_REG_BURST_COUNT)); + count |= read8(TIS_REG(locality, TIS_REG_BURST_COUNT + 1)) << 8; + TPM_DEBUG_IO_READ(TIS_REG_BURST_COUNT, count); + return count; +} + +static inline u8 tpm_read_access(int locality) +{ + u8 value = read8(TIS_REG(locality, TIS_REG_ACCESS)); + TPM_DEBUG_IO_READ(TIS_REG_ACCESS, value); + return value; +} + +static inline void tpm_write_access(u8 data, int locality) +{ + TPM_DEBUG_IO_WRITE(TIS_REG_ACCESS, data); + write8(TIS_REG(locality, TIS_REG_ACCESS), data); +} + +static inline u32 tpm_read_did_vid(int locality) +{ + u32 value = read32(TIS_REG(locality, TIS_REG_DID_VID)); + TPM_DEBUG_IO_READ(TIS_REG_DID_VID, value); + return value; +} + +static inline void tpm_write_int_vector(int vector, int locality) +{ + TPM_DEBUG_IO_WRITE(TIS_REG_INT_VECTOR, vector); + write8(TIS_REG(locality, TIS_REG_INT_VECTOR), vector & 0xf); +} + +static inline void tpm_write_int_polarity(int polarity, int locality) +{ + /* Set polarity and leave all other bits at 0 */ + u32 value = (polarity & 0x3) << 3; + TPM_DEBUG_IO_WRITE(TIS_REG_INT_ENABLE, value); + write32(TIS_REG(locality, TIS_REG_INT_ENABLE), value); +} + +/* + * tis_wait_sts() + * + * Wait for at least a second for a status to change its state to match the + * expected state. Normally the transition happens within microseconds. + * + * @locality - locality + * @mask - bitmask for the bitfield(s) to watch + * @expected - value the field(s) are supposed to be set to + * + * Returns 0 on success or TPM_TIMEOUT_ERR on timeout. + */ +static int tis_wait_sts(int locality, u8 mask, u8 expected) +{ + u32 time_us = MAX_DELAY_US; + while (time_us > 0) { + u8 value = tpm_read_status(locality); + if ((value & mask) == expected) + return 0; + udelay(1); /* 1 us */ + time_us--; + } + return TPM_TIMEOUT_ERR; +} + +static inline int tis_wait_ready(int locality) +{ + return tis_wait_sts(locality, TIS_STS_COMMAND_READY, + TIS_STS_COMMAND_READY); +} + +static inline int tis_wait_valid(int locality) +{ + return tis_wait_sts(locality, TIS_STS_VALID, TIS_STS_VALID); +} + +static inline int tis_wait_valid_data(int locality) +{ + const u8 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID; + return tis_wait_sts(locality, has_data, has_data); +} + +static inline int tis_has_valid_data(int locality) +{ + const u8 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID; + return (tpm_read_status(locality) & has_data) == has_data; +} + +static inline int tis_expect_data(int locality) +{ + return !!(tpm_read_status(locality) & TIS_STS_EXPECT); +} + +/* + * tis_wait_access() + * + * Wait for at least a second for a access to change its state to match the + * expected state. Normally the transition happens within microseconds. + * + * @locality - locality + * @mask - bitmask for the bitfield(s) to watch + * @expected - value the field(s) are supposed to be set to + * + * Returns 0 on success or TPM_TIMEOUT_ERR on timeout. + */ +static int tis_wait_access(int locality, u8 mask, u8 expected) +{ + u32 time_us = MAX_DELAY_US; + while (time_us > 0) { + u8 value = tpm_read_access(locality); + if ((value & mask) == expected) + return 0; + udelay(1); /* 1 us */ + time_us--; + } + return TPM_TIMEOUT_ERR; +} + +static inline int tis_wait_dropped_access(int locality) +{ + return tis_wait_access(locality, TIS_ACCESS_ACTIVE_LOCALITY, 0); +} + +static inline int tis_wait_received_access(int locality) +{ + return tis_wait_access(locality, TIS_ACCESS_ACTIVE_LOCALITY, + TIS_ACCESS_ACTIVE_LOCALITY); +} + +static inline int tis_has_access(int locality) +{ + return !!(tpm_read_access(locality) & TIS_ACCESS_ACTIVE_LOCALITY); +} + +static inline void tis_request_access(int locality) +{ + tpm_write_access(TIS_ACCESS_REQUEST_USE, locality); +} + +static inline void tis_drop_access(int locality) +{ + tpm_write_access(TIS_ACCESS_ACTIVE_LOCALITY, locality); +} + +/* + * PC Client Specific TPM Interface Specification section 11.2.12: + * + * Software must be prepared to send two writes of a "1" to command ready + * field: the first to indicate successful read of all the data, thus + * clearing the data from the ReadFIFO and freeing the TPM's resources, + * and the second to indicate to the TPM it is about to send a new command. + * + * In practice not all TPMs behave the same so it is necessary to be + * flexible when trying to set command ready. + * + * Returns 0 on success if the TPM is ready for transactions. + * Returns TPM_TIMEOUT_ERR if the command ready bit does not get set. + */ +static int tis_command_ready(u8 locality) +{ + u32 status; + + /* 1st attempt to set command ready */ + tpm_write_status(TIS_STS_COMMAND_READY, locality); + + /* Wait for response */ + status = tpm_read_status(locality); + + /* Check if command ready is set yet */ + if (status & TIS_STS_COMMAND_READY) + return 0; + + /* 2nd attempt to set command ready */ + tpm_write_status(TIS_STS_COMMAND_READY, locality); + + return tis_wait_ready(locality); +} + +/* + * Probe the TPM device and try determining its manufacturer/device name. + * + * Returns 0 on success (the device is found or was found during an earlier + * invocation) or TPM_DRIVER_ERR if the device is not found. + */ +static u32 tis_probe(void) +{ + const char *device_name = "unknown"; + const char *vendor_name = device_name; + const struct device_name *dev; + u32 didvid; + u16 vid, did; + int i; + + if (car_get_var(vendor_dev_id)) + return 0; /* Already probed. */ + + didvid = tpm_read_did_vid(0); + if (!didvid || (didvid == 0xffffffff)) { + printf("%s: No TPM device found\n", __FUNCTION__); + return TPM_DRIVER_ERR; + } + + car_set_var(vendor_dev_id, didvid); + + vid = didvid & 0xffff; + did = (didvid >> 16) & 0xffff; + for (i = 0; i < ARRAY_SIZE(vendor_names); i++) { + int j = 0; + u16 known_did; + + if (vid == vendor_names[i].vendor_id) { + vendor_name = vendor_names[i].vendor_name; + } else { + continue; + } + dev = &vendor_names[i].dev_names[j]; + while ((known_did = dev->dev_id) != 0xffff) { + if (known_did == did) { + device_name = dev->dev_name; + break; + } + j++; + dev = &vendor_names[i].dev_names[j]; + } + break; + } + /* this will have to be converted into debug printout */ + printk(BIOS_INFO, "Found TPM %s by %s\n", device_name, vendor_name); + return 0; +} + +/* + * tis_senddata() + * + * send the passed in data to the TPM device. + * + * @data - address of the data to send, byte by byte + * @len - length of the data to send + * + * Returns 0 on success, TPM_DRIVER_ERR on error (in case the device does + * not accept the entire command). + */ +static u32 tis_senddata(const u8 * const data, u32 len) +{ + u32 offset = 0; + u16 burst = 0; + u32 max_cycles = 0; + u8 locality = 0; + + if (tis_wait_ready(locality)) { + printf("%s:%d - failed to get 'command_ready' status\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + burst = tpm_read_burst_count(locality); + + while (1) { + unsigned count; + + /* Wait till the device is ready to accept more data. */ + while (!burst) { + if (max_cycles++ == MAX_DELAY_US) { + printf("%s:%d failed to feed %d bytes of %d\n", + __FILE__, __LINE__, len - offset, len); + return TPM_DRIVER_ERR; + } + udelay(1); + burst = tpm_read_burst_count(locality); + } + + max_cycles = 0; + + /* + * Calculate number of bytes the TPM is ready to accept in one + * shot. + * + * We want to send the last byte outside of the loop (hence + * the -1 below) to make sure that the 'expected' status bit + * changes to zero exactly after the last byte is fed into the + * FIFO. + */ + count = min(burst, len - offset - 1); + while (count--) + tpm_write_data(data[offset++], locality); + + if (tis_wait_valid(locality) || !tis_expect_data(locality)) { + printf("%s:%d TPM command feed overflow\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + + burst = tpm_read_burst_count(locality); + if ((offset == (len - 1)) && burst) + /* + * We need to be able to send the last byte to the + * device, so burst size must be nonzero before we + * break out. + */ + break; + } + + /* Send the last byte. */ + tpm_write_data(data[offset++], locality); + + /* + * Verify that TPM does not expect any more data as part of this + * command. + */ + if (tis_wait_valid(locality) || tis_expect_data(locality)) { + printf("%s:%d unexpected TPM status 0x%x\n", + __FILE__, __LINE__, tpm_read_status(locality)); + return TPM_DRIVER_ERR; + } + + /* OK, sitting pretty, let's start the command execution. */ + tpm_write_status(TIS_STS_TPM_GO, locality); + + return 0; +} + +/* + * tis_readresponse() + * + * read the TPM device response after a command was issued. + * + * @buffer - address where to read the response, byte by byte. + * @len - pointer to the size of buffer + * + * On success stores the number of received bytes to len and returns 0. On + * errors (misformatted TPM data or synchronization problems) returns + * TPM_DRIVER_ERR. + */ +static u32 tis_readresponse(u8 *buffer, size_t *len) +{ + u16 burst_count; + u32 offset = 0; + u8 locality = 0; + u32 expected_count = *len; + int max_cycles = 0; + + /* Wait for the TPM to process the command */ + if (tis_wait_valid_data(locality)) { + printf("%s:%d failed processing command\n", __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + + do { + while ((burst_count = tpm_read_burst_count(locality)) == 0) { + if (max_cycles++ == MAX_DELAY_US) { + printf("%s:%d TPM stuck on read\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + udelay(1); + } + + max_cycles = 0; + + while (burst_count-- && (offset < expected_count)) { + buffer[offset++] = tpm_read_data(locality); + if (offset == 6) { + /* + * We got the first six bytes of the reply, + * let's figure out how many bytes to expect + * total - it is stored as a 4 byte number in + * network order, starting with offset 2 into + * the body of the reply. + */ + u32 real_length; + + memcpy(&real_length, + buffer + 2, + sizeof(real_length)); + expected_count = be32_to_cpu(real_length); + + if ((expected_count < offset) || + (expected_count > *len)) { + printf("%s:%d bad response size %d\n", + __FILE__, __LINE__, + expected_count); + return TPM_DRIVER_ERR; + } + } + } + + /* Wait for the next portion */ + if (tis_wait_valid(locality)) { + printf("%s:%d failed to read response\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + + if (offset == expected_count) + break; /* We got all we need */ + + } while (tis_has_valid_data(locality)); + + /* * Make sure we indeed read all there was. */ + if (tis_has_valid_data(locality)) { + printf("%s:%d wrong receive status: %x %d bytes left\n", + __FILE__, __LINE__, tpm_read_status(locality), + tpm_read_burst_count(locality)); + return TPM_DRIVER_ERR; + } + + /* Tell the TPM that we are done. */ + if (tis_command_ready(locality) == TPM_TIMEOUT_ERR) + return TPM_DRIVER_ERR; + + *len = offset; + return 0; +} + +/* + * tis_init() + * + * Initialize the TPM device. Returns 0 on success or TPM_DRIVER_ERR on + * failure (in case device probing did not succeed). + */ +int tis_init(void) +{ + if (tis_probe()) + return TPM_DRIVER_ERR; + return 0; +} + +/* + * tis_open() + * + * Requests access to locality 0 for the caller. After all commands have been + * completed the caller is supposed to call tis_close(). + * + * Returns 0 on success, TPM_DRIVER_ERR on failure. + */ +int tis_open(void) +{ + u8 locality = 0; /* we use locality zero for everything */ + + if (tis_close()) + return TPM_DRIVER_ERR; + + /* now request access to locality */ + tis_request_access(locality); + + /* did we get a lock? */ + if (tis_wait_received_access(locality)) { + printf("%s:%d - failed to lock locality %d\n", + __FILE__, __LINE__, locality); + return TPM_DRIVER_ERR; + } + + /* Certain TPMs seem to need some delay here or they hang... */ + udelay(10); + + if (tis_command_ready(locality) == TPM_TIMEOUT_ERR) + return TPM_DRIVER_ERR; + + return 0; +} + +/* + * tis_close() + * + * terminate the current session with the TPM by releasing the locked + * locality. Returns 0 on success of TPM_DRIVER_ERR on failure (in case lock + * removal did not succeed). + */ +int tis_close(void) +{ + u8 locality = 0; + + if (tis_has_access(locality)) { + tis_drop_access(locality); + if (tis_wait_dropped_access(locality)) { + printf("%s:%d - failed to release locality %d\n", + __FILE__, __LINE__, locality); + return TPM_DRIVER_ERR; + } + } + return 0; +} + +/* + * tis_sendrecv() + * + * Send the requested data to the TPM and then try to get its response + * + * @sendbuf - buffer of the data to send + * @send_size size of the data to send + * @recvbuf - memory to save the response to + * @recv_len - pointer to the size of the response buffer + * + * Returns 0 on success (and places the number of response bytes at recv_len) + * or TPM_DRIVER_ERR on failure. + */ +int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, + uint8_t *recvbuf, size_t *recv_len) +{ + if (tis_senddata(sendbuf, send_size)) { + printf("%s:%d failed sending data to TPM\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + + return tis_readresponse(recvbuf, recv_len); +} + +#ifdef __RAMSTAGE__ + +/* + * tis_setup_interrupt() + * + * Set up the interrupt vector and polarity for locality 0 and + * disable all interrupts so they are unused in firmware but can + * be enabled by the OS. + * + * The values used here must match what is passed in the TPM ACPI + * device if ACPI is used on the platform. + * + * @vector - TPM interrupt vector + * @polarity - TPM interrupt polarity + * + * Returns 0 on success, TPM_DRIVER_ERR on failure. + */ +static int tis_setup_interrupt(int vector, int polarity) +{ + u8 locality = 0; + int has_access = tis_has_access(locality); + + /* Open connection and request access if not already granted */ + if (!has_access && tis_open() < 0) + return TPM_DRIVER_ERR; + + /* Set TPM interrupt vector */ + tpm_write_int_vector(vector, locality); + + /* Set TPM interrupt polarity and disable interrupts */ + tpm_write_int_polarity(polarity, locality); + + /* Close connection if it was opened */ + if (!has_access && tis_close() < 0) + return TPM_DRIVER_ERR; + + return 0; +} + +static void lpc_tpm_read_resources(struct device *dev) +{ + /* Static 5K memory region specified in Kconfig */ + mmio_resource(dev, 0, CONFIG_TPM_TIS_BASE_ADDRESS >> 10, 0x5000 >> 10); +} + +static void lpc_tpm_set_resources(struct device *dev) +{ + tpm_config_t *config = (tpm_config_t *)dev->chip_info; + struct resource *res; + + for (res = dev->resource_list; res; res = res->next) { + if (!(res->flags & IORESOURCE_ASSIGNED)) + continue; + + if (res->flags & IORESOURCE_IRQ) { + /* Set interrupt vector */ + tis_setup_interrupt((int)res->base, + config->irq_polarity); + } else { + continue; + } + + res->flags |= IORESOURCE_STORED; + report_resource_stored(dev, res, " <tpm>"); + } +} + +static struct device_operations lpc_tpm_ops = { + .read_resources = &lpc_tpm_read_resources, + .set_resources = &lpc_tpm_set_resources, +}; + +static struct pnp_info pnp_dev_info[] = { + { .flags = PNP_IRQ0 } +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &lpc_tpm_ops, + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); +} + +struct chip_operations drivers_tpm_ops = { + CHIP_NAME("LPC TPM") + .enable_dev = enable_dev +}; + +#endif /* __RAMSTAGE__ */ diff --git a/src/include/antirollback.h b/src/include/antirollback.h index 5ba36f7..9d3c3fd 100644 --- a/src/include/antirollback.h +++ b/src/include/antirollback.h @@ -9,7 +9,7 @@ #ifndef ANTIROLLBACK_H_ #define ANTIROLLBACK_H_ -#include "tpm_lite/tss_constants.h" +#include <tpm/tss_constants.h> struct vb2_context; enum vb2_pcr_digest; diff --git a/src/include/tpm.h b/src/include/tpm.h deleted file mode 100644 index b15ca6e..0000000 --- a/src/include/tpm.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2011 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef TPM_H_ -#define TPM_H_ - -#include <stddef.h> -#include <stdint.h> - -/* - * tis_init() - * - * Initialize the TPM device. Returns 0 on success or -1 on - * failure (in case device probing did not succeed). - */ -int tis_init(void); - -/* - * tis_open() - * - * Requests access to locality 0 for the caller. After all commands have been - * completed the caller is supposed to call tis_close(). - * - * Returns 0 on success, -1 on failure. - */ -int tis_open(void); - -/* - * tis_close() - * - * terminate the currect session with the TPM by releasing the locked - * locality. Returns 0 on success of -1 on failure (in case lock - * removal did not succeed). - */ -int tis_close(void); - -/* - * tis_sendrecv() - * - * Send the requested data to the TPM and then try to get its response - * - * @sendbuf - buffer of the data to send - * @send_size size of the data to send - * @recvbuf - memory to save the response to - * @recv_len - pointer to the size of the response buffer - * - * Returns 0 on success (and places the number of response bytes at recv_len) - * or -1 on failure. - */ -int tis_sendrecv(const u8 *sendbuf, size_t send_size, u8 *recvbuf, - size_t *recv_len); - -void init_tpm(int s3resume); - -#endif /* TPM_H_ */ diff --git a/src/include/tpm/tpm.h b/src/include/tpm/tpm.h new file mode 100644 index 0000000..71768a5 --- /dev/null +++ b/src/include/tpm/tpm.h @@ -0,0 +1,71 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2011 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef TPM_TPM_H +#define TPM_TPM_H + +#include <stddef.h> +#include <stdint.h> + +struct tpm_chip; + +/* + * tis_init() + * + * Initialize the TPM device. Returns 0 on success or -1 on + * failure (in case device probing did not succeed). + */ +int tis_init(void); + +/* + * tis_open() + * + * Requests access to locality 0 for the caller. After all commands have been + * completed the caller is supposed to call tis_close(). + * + * Returns 0 on success, -1 on failure. + */ +int tis_open(void); + +/* + * tis_close() + * + * terminate the currect session with the TPM by releasing the locked + * locality. Returns 0 on success of -1 on failure (in case lock + * removal did not succeed). + */ +int tis_close(void); + +/* + * tis_sendrecv() + * + * Send the requested data to the TPM and then try to get its response + * + * @sendbuf - buffer of the data to send + * @send_size size of the data to send + * @recvbuf - memory to save the response to + * @recv_len - pointer to the size of the response buffer + * + * Returns 0 on success (and places the number of response bytes at recv_len) + * or -1 on failure. + */ +int tis_sendrecv(const u8 *sendbuf, size_t send_size, u8 *recvbuf, + size_t *recv_len); + +int tpm_vendor_init(unsigned bus, uint32_t dev_addr); + +void tpm_vendor_cleanup(struct tpm_chip *chip); + +#endif /* TPM_TPM_H */ diff --git a/src/include/tpm/tspi.h b/src/include/tpm/tspi.h new file mode 100644 index 0000000..ba2f119 --- /dev/null +++ b/src/include/tpm/tspi.h @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef TPM_TSPI_H +#define TPM_TSPI_H + +/** + * TSPI Implementation for coreboot without vboot2 + */ +void init_tpm(int s3resume); + + +#endif /* TPM_TSPI_H */ diff --git a/src/include/tpm/tss.h b/src/include/tpm/tss.h new file mode 100644 index 0000000..04ad9b3 --- /dev/null +++ b/src/include/tpm/tss.h @@ -0,0 +1,136 @@ +/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* + * TPM Lightweight Command Library. + * + * A low-level library for interfacing to TPM hardware or an emulator. + */ + +#ifndef TPM_TSS_H +#define TPM_TSS_H + +#include "tss_constants.h" + +/*****************************************************************************/ +/* Functions implemented in tlcl.c */ + +/** + * Call this first. Returns 0 if success, nonzero if error. + */ +uint32_t tlcl_lib_init(void); + +/** + * Perform a raw TPM request/response transaction. + */ +uint32_t tlcl_send_receive(const uint8_t *request, uint8_t *response, + int max_length); + +/* Commands */ + +/** + * Send a TPM_Startup(ST_CLEAR). The TPM error code is returned (0 for + * success). + */ +uint32_t tlcl_startup(void); + +/** + * Resume by sending a TPM_Startup(ST_STATE). The TPM error code is returned + * (0 for success). + */ +uint32_t tlcl_resume(void); + +/** + * Run the self test. + * + * Note---this is synchronous. To run this in parallel with other firmware, + * use ContinueSelfTest(). The TPM error code is returned. + */ +uint32_t tlcl_self_test_full(void); + +/** + * Run the self test in the background. + */ +uint32_t tlcl_continue_self_test(void); + +/** + * Define a space with permission [perm]. [index] is the index for the space, + * [size] the usable data size. The TPM error code is returned. + */ +uint32_t tlcl_define_space(uint32_t index, uint32_t perm, uint32_t size); + +/** + * Write [length] bytes of [data] to space at [index]. The TPM error code is + * returned. + */ +uint32_t tlcl_write(uint32_t index, const void *data, uint32_t length); + +/** + * Read [length] bytes from space at [index] into [data]. The TPM error code + * is returned. + */ +uint32_t tlcl_read(uint32_t index, void *data, uint32_t length); + +/** + * Assert physical presence in software. The TPM error code is returned. + */ +uint32_t tlcl_assert_physical_presence(void); + +/** + * Enable the physical presence command. The TPM error code is returned. + */ +uint32_t tlcl_physical_presence_cmd_enable(void); + +/** + * Finalize the physical presence settings: sofware PP is enabled, hardware PP + * is disabled, and the lifetime lock is set. The TPM error code is returned. + */ +uint32_t tlcl_finalize_physical_presence(void); + +/** + * Set the nvLocked bit. The TPM error code is returned. + */ +uint32_t tlcl_set_nv_locked(void); + +/** + * Issue a ForceClear. The TPM error code is returned. + */ +uint32_t tlcl_force_clear(void); + +/** + * Issue a PhysicalEnable. The TPM error code is returned. + */ +uint32_t tlcl_set_enable(void); + +/** + * Issue a SetDeactivated. Pass 0 to activate. Returns result code. + */ +uint32_t tlcl_set_deactivated(uint8_t flag); + +/** + * Get flags of interest. Pointers for flags you aren't interested in may + * be NULL. The TPM error code is returned. + */ +uint32_t tlcl_get_flags(uint8_t *disable, uint8_t *deactivated, + uint8_t *nvlocked); + +/** + * Set the bGlobalLock flag, which only a reboot can clear. The TPM error + * code is returned. + */ +uint32_t tlcl_set_global_lock(void); + +/** + * Perform a TPM_Extend. + */ +uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest, + uint8_t *out_digest); + +/** + * Get the entire set of permanent flags. + */ +uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS *pflags); + +#endif diff --git a/src/include/tpm/tss_constants.h b/src/include/tpm/tss_constants.h new file mode 100644 index 0000000..afd2593 --- /dev/null +++ b/src/include/tpm/tss_constants.h @@ -0,0 +1,97 @@ +/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Some TPM constants and type definitions for standalone compilation for use + * in the firmware + */ + +#ifndef TPM_TSS_CONSTANTS_H +#define TPM_TSS_CONSTANTS_H + +#include <stdint.h> + +#define TPM_MAX_COMMAND_SIZE 4096 +#define TPM_LARGE_ENOUGH_COMMAND_SIZE 256 /* saves space in the firmware */ +#define TPM_PUBEK_SIZE 256 +#define TPM_PCR_DIGEST 20 + +#define TPM_E_NON_FATAL 0x800 + +#define TPM_SUCCESS ((uint32_t)0x00000000) + +#define TPM_E_AREA_LOCKED ((uint32_t)0x0000003c) +#define TPM_E_BADINDEX ((uint32_t)0x00000002) +#define TPM_E_BAD_PRESENCE ((uint32_t)0x0000002d) +#define TPM_E_IOERROR ((uint32_t)0x0000001f) +#define TPM_E_INVALID_POSTINIT ((uint32_t)0x00000026) +#define TPM_E_MAXNVWRITES ((uint32_t)0x00000048) +#define TPM_E_OWNER_SET ((uint32_t)0x00000014) + +#define TPM_E_NEEDS_SELFTEST ((uint32_t)(TPM_E_NON_FATAL + 1)) +#define TPM_E_DOING_SELFTEST ((uint32_t)(TPM_E_NON_FATAL + 2)) + +#define TPM_E_ALREADY_INITIALIZED ((uint32_t)0x00005000) /* vboot local */ +#define TPM_E_INTERNAL_INCONSISTENCY ((uint32_t)0x00005001) /* vboot local */ +#define TPM_E_MUST_REBOOT ((uint32_t)0x00005002) /* vboot local */ +#define TPM_E_CORRUPTED_STATE ((uint32_t)0x00005003) /* vboot local */ +#define TPM_E_COMMUNICATION_ERROR ((uint32_t)0x00005004) /* vboot local */ +#define TPM_E_RESPONSE_TOO_LARGE ((uint32_t)0x00005005) /* vboot local */ +#define TPM_E_NO_DEVICE ((uint32_t)0x00005006) /* vboot local */ +#define TPM_E_INPUT_TOO_SMALL ((uint32_t)0x00005007) /* vboot local */ +#define TPM_E_WRITE_FAILURE ((uint32_t)0x00005008) /* vboot local */ +#define TPM_E_READ_EMPTY ((uint32_t)0x00005009) /* vboot local */ +#define TPM_E_READ_FAILURE ((uint32_t)0x0000500a) /* vboot local */ + +#define TPM_NV_INDEX0 ((uint32_t)0x00000000) +#define TPM_NV_INDEX_LOCK ((uint32_t)0xffffffff) +#define TPM_NV_PER_GLOBALLOCK (((uint32_t)1)<<15) +#define TPM_NV_PER_PPWRITE (((uint32_t)1)<<0) +#define TPM_NV_PER_READ_STCLEAR (((uint32_t)1)<<31) +#define TPM_NV_PER_WRITE_STCLEAR (((uint32_t)1)<<14) + +#define TPM_TAG_RQU_COMMAND ((uint16_t) 0xc1) +#define TPM_TAG_RQU_AUTH1_COMMAND ((uint16_t) 0xc2) +#define TPM_TAG_RQU_AUTH2_COMMAND ((uint16_t) 0xc3) + +#define TPM_TAG_RSP_COMMAND ((uint16_t) 0xc4) +#define TPM_TAG_RSP_AUTH1_COMMAND ((uint16_t) 0xc5) +#define TPM_TAG_RSP_AUTH2_COMMAND ((uint16_t) 0xc6) + +typedef uint8_t TSS_BOOL; +typedef uint16_t TPM_STRUCTURE_TAG; + +typedef struct tdTPM_PERMANENT_FLAGS { + TPM_STRUCTURE_TAG tag; + TSS_BOOL disable; + TSS_BOOL ownership; + TSS_BOOL deactivated; + TSS_BOOL readPubek; + TSS_BOOL disableOwnerClear; + TSS_BOOL allowMaintenance; + TSS_BOOL physicalPresenceLifetimeLock; + TSS_BOOL physicalPresenceHWEnable; + TSS_BOOL physicalPresenceCMDEnable; + TSS_BOOL CEKPUsed; + TSS_BOOL TPMpost; + TSS_BOOL TPMpostLock; + TSS_BOOL FIPS; + TSS_BOOL Operator; + TSS_BOOL enableRevokeEK; + TSS_BOOL nvLocked; + TSS_BOOL readSRKPub; + TSS_BOOL tpmEstablished; + TSS_BOOL maintenanceDone; + TSS_BOOL disableFullDALogicInfo; +} TPM_PERMANENT_FLAGS; + +typedef struct tdTPM_STCLEAR_FLAGS { + TPM_STRUCTURE_TAG tag; + TSS_BOOL deactivated; + TSS_BOOL disableForceClear; + TSS_BOOL physicalPresence; + TSS_BOOL physicalPresenceLock; + TSS_BOOL bGlobalLock; +} TPM_STCLEAR_FLAGS; + +#endif /* TPM_TSS_CONSTANTS_H */ diff --git a/src/include/tpm_lite/tlcl.h b/src/include/tpm_lite/tlcl.h deleted file mode 100644 index 7724592..0000000 --- a/src/include/tpm_lite/tlcl.h +++ /dev/null @@ -1,137 +0,0 @@ -/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * TPM Lightweight Command Library. - * - * A low-level library for interfacing to TPM hardware or an emulator. - */ - -#ifndef TPM_LITE_TLCL_H_ -#define TPM_LITE_TLCL_H_ -#include <stdint.h> - -#include "tss_constants.h" - -/*****************************************************************************/ -/* Functions implemented in tlcl.c */ - -/** - * Call this first. Returns 0 if success, nonzero if error. - */ -uint32_t tlcl_lib_init(void); - -/** - * Perform a raw TPM request/response transaction. - */ -uint32_t tlcl_send_receive(const uint8_t *request, uint8_t *response, - int max_length); - -/* Commands */ - -/** - * Send a TPM_Startup(ST_CLEAR). The TPM error code is returned (0 for - * success). - */ -uint32_t tlcl_startup(void); - -/** - * Resume by sending a TPM_Startup(ST_STATE). The TPM error code is returned - * (0 for success). - */ -uint32_t tlcl_resume(void); - -/** - * Run the self test. - * - * Note---this is synchronous. To run this in parallel with other firmware, - * use ContinueSelfTest(). The TPM error code is returned. - */ -uint32_t tlcl_self_test_full(void); - -/** - * Run the self test in the background. - */ -uint32_t tlcl_continue_self_test(void); - -/** - * Define a space with permission [perm]. [index] is the index for the space, - * [size] the usable data size. The TPM error code is returned. - */ -uint32_t tlcl_define_space(uint32_t index, uint32_t perm, uint32_t size); - -/** - * Write [length] bytes of [data] to space at [index]. The TPM error code is - * returned. - */ -uint32_t tlcl_write(uint32_t index, const void *data, uint32_t length); - -/** - * Read [length] bytes from space at [index] into [data]. The TPM error code - * is returned. - */ -uint32_t tlcl_read(uint32_t index, void *data, uint32_t length); - -/** - * Assert physical presence in software. The TPM error code is returned. - */ -uint32_t tlcl_assert_physical_presence(void); - -/** - * Enable the physical presence command. The TPM error code is returned. - */ -uint32_t tlcl_physical_presence_cmd_enable(void); - -/** - * Finalize the physical presence settings: sofware PP is enabled, hardware PP - * is disabled, and the lifetime lock is set. The TPM error code is returned. - */ -uint32_t tlcl_finalize_physical_presence(void); - -/** - * Set the nvLocked bit. The TPM error code is returned. - */ -uint32_t tlcl_set_nv_locked(void); - -/** - * Issue a ForceClear. The TPM error code is returned. - */ -uint32_t tlcl_force_clear(void); - -/** - * Issue a PhysicalEnable. The TPM error code is returned. - */ -uint32_t tlcl_set_enable(void); - -/** - * Issue a SetDeactivated. Pass 0 to activate. Returns result code. - */ -uint32_t tlcl_set_deactivated(uint8_t flag); - -/** - * Get flags of interest. Pointers for flags you aren't interested in may - * be NULL. The TPM error code is returned. - */ -uint32_t tlcl_get_flags(uint8_t *disable, uint8_t *deactivated, - uint8_t *nvlocked); - -/** - * Set the bGlobalLock flag, which only a reboot can clear. The TPM error - * code is returned. - */ -uint32_t tlcl_set_global_lock(void); - -/** - * Perform a TPM_Extend. - */ -uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest, - uint8_t *out_digest); - -/** - * Get the entire set of permanent flags. - */ -uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS *pflags); - -#endif /* TPM_LITE_TLCL_H_ */ diff --git a/src/include/tpm_lite/tss_constants.h b/src/include/tpm_lite/tss_constants.h deleted file mode 100644 index 883a5ad..0000000 --- a/src/include/tpm_lite/tss_constants.h +++ /dev/null @@ -1,96 +0,0 @@ -/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Some TPM constants and type definitions for standalone compilation for use - * in the firmware - */ -#ifndef VBOOT_REFERENCE_TSS_CONSTANTS_H_ -#define VBOOT_REFERENCE_TSS_CONSTANTS_H_ -#include <stdint.h> - -#define TPM_MAX_COMMAND_SIZE 4096 -#define TPM_LARGE_ENOUGH_COMMAND_SIZE 256 /* saves space in the firmware */ -#define TPM_PUBEK_SIZE 256 -#define TPM_PCR_DIGEST 20 - -#define TPM_E_NON_FATAL 0x800 - -#define TPM_SUCCESS ((uint32_t)0x00000000) - -#define TPM_E_AREA_LOCKED ((uint32_t)0x0000003c) -#define TPM_E_BADINDEX ((uint32_t)0x00000002) -#define TPM_E_BAD_PRESENCE ((uint32_t)0x0000002d) -#define TPM_E_IOERROR ((uint32_t)0x0000001f) -#define TPM_E_INVALID_POSTINIT ((uint32_t)0x00000026) -#define TPM_E_MAXNVWRITES ((uint32_t)0x00000048) -#define TPM_E_OWNER_SET ((uint32_t)0x00000014) - -#define TPM_E_NEEDS_SELFTEST ((uint32_t)(TPM_E_NON_FATAL + 1)) -#define TPM_E_DOING_SELFTEST ((uint32_t)(TPM_E_NON_FATAL + 2)) - -#define TPM_E_ALREADY_INITIALIZED ((uint32_t)0x00005000) /* vboot local */ -#define TPM_E_INTERNAL_INCONSISTENCY ((uint32_t)0x00005001) /* vboot local */ -#define TPM_E_MUST_REBOOT ((uint32_t)0x00005002) /* vboot local */ -#define TPM_E_CORRUPTED_STATE ((uint32_t)0x00005003) /* vboot local */ -#define TPM_E_COMMUNICATION_ERROR ((uint32_t)0x00005004) /* vboot local */ -#define TPM_E_RESPONSE_TOO_LARGE ((uint32_t)0x00005005) /* vboot local */ -#define TPM_E_NO_DEVICE ((uint32_t)0x00005006) /* vboot local */ -#define TPM_E_INPUT_TOO_SMALL ((uint32_t)0x00005007) /* vboot local */ -#define TPM_E_WRITE_FAILURE ((uint32_t)0x00005008) /* vboot local */ -#define TPM_E_READ_EMPTY ((uint32_t)0x00005009) /* vboot local */ -#define TPM_E_READ_FAILURE ((uint32_t)0x0000500a) /* vboot local */ - -#define TPM_NV_INDEX0 ((uint32_t)0x00000000) -#define TPM_NV_INDEX_LOCK ((uint32_t)0xffffffff) -#define TPM_NV_PER_GLOBALLOCK (((uint32_t)1)<<15) -#define TPM_NV_PER_PPWRITE (((uint32_t)1)<<0) -#define TPM_NV_PER_READ_STCLEAR (((uint32_t)1)<<31) -#define TPM_NV_PER_WRITE_STCLEAR (((uint32_t)1)<<14) - -#define TPM_TAG_RQU_COMMAND ((uint16_t) 0xc1) -#define TPM_TAG_RQU_AUTH1_COMMAND ((uint16_t) 0xc2) -#define TPM_TAG_RQU_AUTH2_COMMAND ((uint16_t) 0xc3) - -#define TPM_TAG_RSP_COMMAND ((uint16_t) 0xc4) -#define TPM_TAG_RSP_AUTH1_COMMAND ((uint16_t) 0xc5) -#define TPM_TAG_RSP_AUTH2_COMMAND ((uint16_t) 0xc6) - -typedef uint8_t TSS_BOOL; -typedef uint16_t TPM_STRUCTURE_TAG; - -typedef struct tdTPM_PERMANENT_FLAGS -{ - TPM_STRUCTURE_TAG tag; - TSS_BOOL disable; - TSS_BOOL ownership; - TSS_BOOL deactivated; - TSS_BOOL readPubek; - TSS_BOOL disableOwnerClear; - TSS_BOOL allowMaintenance; - TSS_BOOL physicalPresenceLifetimeLock; - TSS_BOOL physicalPresenceHWEnable; - TSS_BOOL physicalPresenceCMDEnable; - TSS_BOOL CEKPUsed; - TSS_BOOL TPMpost; - TSS_BOOL TPMpostLock; - TSS_BOOL FIPS; - TSS_BOOL Operator; - TSS_BOOL enableRevokeEK; - TSS_BOOL nvLocked; - TSS_BOOL readSRKPub; - TSS_BOOL tpmEstablished; - TSS_BOOL maintenanceDone; - TSS_BOOL disableFullDALogicInfo; -} TPM_PERMANENT_FLAGS; - -typedef struct tdTPM_STCLEAR_FLAGS{ - TPM_STRUCTURE_TAG tag; - TSS_BOOL deactivated; - TSS_BOOL disableForceClear; - TSS_BOOL physicalPresence; - TSS_BOOL physicalPresenceLock; - TSS_BOOL bGlobalLock; -} TPM_STCLEAR_FLAGS; - -#endif /* VBOOT_REFERENCE_TSS_CONSTANTS_H_ */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 646fefa..f996d9a 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -12,7 +12,7 @@ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # -subdirs-y += loaders +subdirs-y += loaders tpm ifneq ($(CONFIG_BOOTBLOCK_CUSTOM),y) @@ -51,12 +51,6 @@ verstage-y += boot_device.c verstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c -ifeq ($(MOCK_TPM),1) -libverstage-y += mocked_tlcl.c -else -libverstage-y += tlcl.c -endif - verstage-$(CONFIG_GENERIC_UDELAY) += timer.c verstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c diff --git a/src/lib/mocked_tlcl.c b/src/lib/mocked_tlcl.c deleted file mode 100644 index 8dfcfab..0000000 --- a/src/lib/mocked_tlcl.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 The ChromiumOS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <tpm_lite/tlcl.h> - -#ifdef FOR_TEST -#include <stdio.h> -#define VBDEBUG(format, args...) printf(format, ## args) -#else -#include <console/console.h> -#define VBDEBUG(format, args...) printk(BIOS_DEBUG, format, ## args) -#endif - -uint32_t tlcl_lib_init(void) { - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_startup(void) { - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_resume(void) { - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_self_test_full(void) -{ - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_continue_self_test(void) -{ - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_define_space(uint32_t index, uint32_t perm, uint32_t size) -{ - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_write(uint32_t index, const void* data, uint32_t length) -{ - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_read(uint32_t index, void* data, uint32_t length) -{ - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - - -uint32_t tlcl_assert_physical_presence(void) { - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_physical_presence_cmd_enable(void) { - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_finalize_physical_presence(void) { - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_set_nv_locked(void) { - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_force_clear(void) { - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_set_enable(void) { - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_set_deactivated(uint8_t flag) -{ - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS* pflags) -{ - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_get_flags(uint8_t* disable, uint8_t* deactivated, - uint8_t *nvlocked) -{ - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_set_global_lock(void) -{ - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} - -uint32_t tlcl_extend(int pcr_num, const uint8_t* in_digest, - uint8_t* out_digest) -{ - VBDEBUG("MOCK_TPM: %s\n", __func__); - return TPM_E_NO_DEVICE; -} diff --git a/src/lib/tlcl.c b/src/lib/tlcl.c deleted file mode 100644 index ccf4e80..0000000 --- a/src/lib/tlcl.c +++ /dev/null @@ -1,327 +0,0 @@ -/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* A lightweight TPM command library. - * - * The general idea is that TPM commands are array of bytes whose - * fields are mostly compile-time constant. The goal is to build much - * of the commands at compile time (or build time) and change some of - * the fields at run time as needed. The code in - * utility/tlcl_generator.c builds structures containing the commands, - * as well as the offsets of the fields that need to be set at run - * time. - */ - -#include <assert.h> -#include <string.h> -#include <tpm_lite/tlcl.h> -#include <tpm.h> -#include <vb2_api.h> -#include "tlcl_internal.h" -#include "tlcl_structures.h" - -#ifdef FOR_TEST -#include <stdio.h> -#define VBDEBUG(format, args...) printf(format, ## args) -#else -#include <console/console.h> -#define VBDEBUG(format, args...) printk(BIOS_DEBUG, format, ## args) -#endif - -static int tpm_send_receive(const uint8_t *request, - uint32_t request_length, - uint8_t *response, - uint32_t *response_length) -{ - size_t len = *response_length; - if (tis_sendrecv(request, request_length, response, &len)) - return VB2_ERROR_UNKNOWN; - /* check 64->32bit overflow and (re)check response buffer overflow */ - if (len > *response_length) - return VB2_ERROR_UNKNOWN; - *response_length = len; - return VB2_SUCCESS; -} - -/* Sets the size field of a TPM command. */ -static inline void set_tpm_command_size(uint8_t* buffer, uint32_t size) { - to_tpm_uint32(buffer + sizeof(uint16_t), size); -} - -/* Gets the size field of a TPM command. */ -__attribute__((unused)) -static inline int tpm_command_size(const uint8_t* buffer) { - uint32_t size; - from_tpm_uint32(buffer + sizeof(uint16_t), &size); - return (int) size; -} - -/* Gets the code field of a TPM command. */ -static inline int tpm_command_code(const uint8_t* buffer) { - uint32_t code; - from_tpm_uint32(buffer + sizeof(uint16_t) + sizeof(uint32_t), &code); - return code; -} - -/* Gets the return code field of a TPM result. */ -static inline int tpm_return_code(const uint8_t* buffer) { - return tpm_command_code(buffer); -} - -/* Like TlclSendReceive below, but do not retry if NEEDS_SELFTEST or - * DOING_SELFTEST errors are returned. - */ -static uint32_t tlcl_send_receive_no_retry(const uint8_t* request, - uint8_t* response, int max_length) { - uint32_t response_length = max_length; - uint32_t result; - - result = tpm_send_receive(request, tpm_command_size(request), - response, &response_length); - if (0 != result) { - /* Communication with TPM failed, so response is garbage */ - VBDEBUG("TPM: command 0x%x send/receive failed: 0x%x\n", - tpm_command_code(request), result); - return result; - } - /* Otherwise, use the result code from the response */ - result = tpm_return_code(response); - - /* TODO: add paranoia about returned response_length vs. max_length - * (and possibly expected length from the response header). See - * crosbug.com/17017 */ - - VBDEBUG("TPM: command 0x%x returned 0x%x\n", - tpm_command_code(request), result); - -return result; -} - - -/* Sends a TPM command and gets a response. Returns 0 if success or the TPM - * error code if error. Waits for the self test to complete if needed. */ -uint32_t tlcl_send_receive(const uint8_t* request, uint8_t* response, - int max_length) { - uint32_t result = tlcl_send_receive_no_retry(request, response, - max_length); - /* If the command fails because the self test has not completed, try it - * again after attempting to ensure that the self test has completed. */ - if (result == TPM_E_NEEDS_SELFTEST || result == TPM_E_DOING_SELFTEST) { - result = tlcl_continue_self_test(); - if (result != TPM_SUCCESS) - return result; -#if defined(TPM_BLOCKING_CONTINUESELFTEST) || defined(VB_RECOVERY_MODE) - /* Retry only once */ - result = tlcl_send_receive_no_retry(request, response, - max_length); -#else - /* This needs serious testing. The TPM specification says: "iii. - * The caller MUST wait for the actions of TPM_ContinueSelfTest - * to complete before reissuing the command C1." But, if - * ContinueSelfTest is non-blocking, how do we know that the - * actions have completed other than trying again? */ - do { - result = tlcl_send_receive_no_retry(request, response, - max_length); - } while (result == TPM_E_DOING_SELFTEST); -#endif - } - return result; -} - -/* Sends a command and returns the error code. */ -static uint32_t send(const uint8_t* command) { - uint8_t response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; - return tlcl_send_receive(command, response, sizeof(response)); -} - -/* Exported functions. */ - -uint32_t tlcl_lib_init(void) { - if (tis_init()) - return VB2_ERROR_UNKNOWN; - if (tis_open()) - return VB2_ERROR_UNKNOWN; - return VB2_SUCCESS; -} - -uint32_t tlcl_startup(void) { - VBDEBUG("TPM: Startup\n"); - return send(tpm_startup_cmd.buffer); -} - -uint32_t tlcl_resume(void) { - VBDEBUG("TPM: Resume\n"); - return send(tpm_resume_cmd.buffer); -} - -uint32_t tlcl_self_test_full(void) -{ - VBDEBUG("TPM: Self test full\n"); - return send(tpm_selftestfull_cmd.buffer); -} - -uint32_t tlcl_continue_self_test(void) -{ - uint8_t response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; - VBDEBUG("TPM: Continue self test\n"); - /* Call the No Retry version of SendReceive to avoid recursion. */ - return tlcl_send_receive_no_retry(tpm_continueselftest_cmd.buffer, - response, sizeof(response)); -} - -uint32_t tlcl_define_space(uint32_t index, uint32_t perm, uint32_t size) -{ - struct s_tpm_nv_definespace_cmd cmd; - VBDEBUG("TPM: TlclDefineSpace(0x%x, 0x%x, %d)\n", index, perm, size); - memcpy(&cmd, &tpm_nv_definespace_cmd, sizeof(cmd)); - to_tpm_uint32(cmd.buffer + tpm_nv_definespace_cmd.index, index); - to_tpm_uint32(cmd.buffer + tpm_nv_definespace_cmd.perm, perm); - to_tpm_uint32(cmd.buffer + tpm_nv_definespace_cmd.size, size); - return send(cmd.buffer); -} - -uint32_t tlcl_write(uint32_t index, const void* data, uint32_t length) -{ - struct s_tpm_nv_write_cmd cmd; - uint8_t response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; - const int total_length = - kTpmRequestHeaderLength + kWriteInfoLength + length; - - VBDEBUG("TPM: tlcl_write(0x%x, %d)\n", index, length); - memcpy(&cmd, &tpm_nv_write_cmd, sizeof(cmd)); - assert(total_length <= TPM_LARGE_ENOUGH_COMMAND_SIZE); - set_tpm_command_size(cmd.buffer, total_length); - - to_tpm_uint32(cmd.buffer + tpm_nv_write_cmd.index, index); - to_tpm_uint32(cmd.buffer + tpm_nv_write_cmd.length, length); - memcpy(cmd.buffer + tpm_nv_write_cmd.data, data, length); - - return tlcl_send_receive(cmd.buffer, response, sizeof(response)); -} - -uint32_t tlcl_read(uint32_t index, void* data, uint32_t length) -{ - struct s_tpm_nv_read_cmd cmd; - uint8_t response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; - uint32_t result_length; - uint32_t result; - - VBDEBUG("TPM: tlcl_read(0x%x, %d)\n", index, length); - memcpy(&cmd, &tpm_nv_read_cmd, sizeof(cmd)); - to_tpm_uint32(cmd.buffer + tpm_nv_read_cmd.index, index); - to_tpm_uint32(cmd.buffer + tpm_nv_read_cmd.length, length); - - result = tlcl_send_receive(cmd.buffer, response, sizeof(response)); - if (result == TPM_SUCCESS && length > 0) { - uint8_t* nv_read_cursor = response + kTpmResponseHeaderLength; - from_tpm_uint32(nv_read_cursor, &result_length); - nv_read_cursor += sizeof(uint32_t); - memcpy(data, nv_read_cursor, result_length); - } - - return result; -} - - -uint32_t tlcl_assert_physical_presence(void) { - VBDEBUG("TPM: Asserting physical presence\n"); - return send(tpm_ppassert_cmd.buffer); -} - -uint32_t tlcl_physical_presence_cmd_enable(void) { - VBDEBUG("TPM: Enable the physical presence command\n"); - return send(tpm_ppenable_cmd.buffer); -} - -uint32_t tlcl_finalize_physical_presence(void) { - VBDEBUG("TPM: Enable PP cmd, disable HW pp, and set lifetime lock\n"); - return send(tpm_finalizepp_cmd.buffer); -} - -uint32_t tlcl_set_nv_locked(void) { - VBDEBUG("TPM: Set NV locked\n"); - return tlcl_define_space(TPM_NV_INDEX_LOCK, 0, 0); -} - -uint32_t tlcl_force_clear(void) { - VBDEBUG("TPM: Force clear\n"); - return send(tpm_forceclear_cmd.buffer); -} - -uint32_t tlcl_set_enable(void) { - VBDEBUG("TPM: Enabling TPM\n"); - return send(tpm_physicalenable_cmd.buffer); -} - -uint32_t tlcl_set_deactivated(uint8_t flag) -{ - struct s_tpm_physicalsetdeactivated_cmd cmd; - VBDEBUG("TPM: SetDeactivated(%d)\n", flag); - memcpy(&cmd, &tpm_physicalsetdeactivated_cmd, sizeof(cmd)); - *(cmd.buffer + cmd.deactivated) = flag; - return send(cmd.buffer); -} - -uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS* pflags) -{ - uint8_t response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; - uint32_t size; - uint32_t result = tlcl_send_receive(tpm_getflags_cmd.buffer, response, - sizeof(response)); - if (result != TPM_SUCCESS) - return result; - from_tpm_uint32(response + kTpmResponseHeaderLength, &size); - assert(size == sizeof(TPM_PERMANENT_FLAGS)); - memcpy(pflags, response + kTpmResponseHeaderLength + sizeof(size), - sizeof(TPM_PERMANENT_FLAGS)); - return result; -} - -uint32_t tlcl_get_flags(uint8_t* disable, uint8_t* deactivated, - uint8_t *nvlocked) -{ - TPM_PERMANENT_FLAGS pflags; - uint32_t result = tlcl_get_permanent_flags(&pflags); - if (result == TPM_SUCCESS) { - if (disable) - *disable = pflags.disable; - if (deactivated) - *deactivated = pflags.deactivated; - if (nvlocked) - *nvlocked = pflags.nvLocked; - VBDEBUG("TPM: flags disable=%d, deactivated=%d, nvlocked=%d\n", - pflags.disable, pflags.deactivated, pflags.nvLocked); - } - return result; -} - -uint32_t tlcl_set_global_lock(void) -{ - uint32_t x; - VBDEBUG("TPM: Set global lock\n"); - return tlcl_write(TPM_NV_INDEX0, (uint8_t*) &x, 0); -} - -uint32_t tlcl_extend(int pcr_num, const uint8_t* in_digest, - uint8_t* out_digest) -{ - struct s_tpm_extend_cmd cmd; - uint8_t response[kTpmResponseHeaderLength + kPcrDigestLength]; - uint32_t result; - - memcpy(&cmd, &tpm_extend_cmd, sizeof(cmd)); - to_tpm_uint32(cmd.buffer + tpm_extend_cmd.pcrNum, pcr_num); - memcpy(cmd.buffer + cmd.inDigest, in_digest, kPcrDigestLength); - - result = tlcl_send_receive(cmd.buffer, response, sizeof(response)); - if (result != TPM_SUCCESS) - return result; - - if (out_digest) - memcpy(out_digest, response + kTpmResponseHeaderLength, - kPcrDigestLength); - return result; -} diff --git a/src/lib/tlcl_internal.h b/src/lib/tlcl_internal.h deleted file mode 100644 index 8261b0d..0000000 --- a/src/lib/tlcl_internal.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Copyright (c) 2010 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef TPM_LITE_TLCL_INTERNAL_H_ -#define TPM_LITE_TLCL_INTERNAL_H_ - -/* - * These numbers derive from adding the sizes of command fields as shown in the - * TPM commands manual. - */ -#define kTpmRequestHeaderLength 10 -#define kTpmResponseHeaderLength 10 -#define kTpmReadInfoLength 12 -#define kEncAuthLength 20 -#define kPcrDigestLength 20 - - -/* - * Conversion functions. to_tpm_TYPE puts a value of type TYPE into a TPM - * command buffer. from_tpm_TYPE gets a value of type TYPE from a TPM command - * buffer into a variable. - */ -__attribute__((unused)) -static inline void to_tpm_uint32(uint8_t *buffer, uint32_t x) { - buffer[0] = (uint8_t)(x >> 24); - buffer[1] = (uint8_t)((x >> 16) & 0xff); - buffer[2] = (uint8_t)((x >> 8) & 0xff); - buffer[3] = (uint8_t)(x & 0xff); -} - -/* - * See comment for above function. - */ -__attribute__((unused)) -static inline void from_tpm_uint32(const uint8_t *buffer, uint32_t *x) { - *x = ((buffer[0] << 24) | - (buffer[1] << 16) | - (buffer[2] << 8) | - buffer[3]); -} - -/* - * See comment for above function. - */ -__attribute__((unused)) -static inline void to_tpm_uint16(uint8_t *buffer, uint16_t x) { - buffer[0] = (uint8_t)(x >> 8); - buffer[1] = (uint8_t)(x & 0xff); -} - -/* - * See comment for above function. - */ -__attribute__((unused)) -static inline void from_tpm_uint16(const uint8_t *buffer, uint16_t *x) { - *x = (buffer[0] << 8) | buffer[1]; -} - -#endif /* TPM_LITE_TLCL_INTERNAL_H_ */ diff --git a/src/lib/tlcl_structures.h b/src/lib/tlcl_structures.h deleted file mode 100644 index 36c1bb9..0000000 --- a/src/lib/tlcl_structures.h +++ /dev/null @@ -1,138 +0,0 @@ -/* This file is automatically generated */ - -const struct s_tpm_extend_cmd{ - uint8_t buffer[34]; - uint16_t pcrNum; - uint16_t inDigest; -} tpm_extend_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x22, 0x0, 0x0, 0x0, 0x14, }, -10, 14, }; - -const struct s_tpm_get_random_cmd{ - uint8_t buffer[14]; - uint16_t bytesRequested; -} tpm_get_random_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xe, 0x0, 0x0, 0x0, 0x46, }, -10, }; - -const struct s_tpm_getownership_cmd{ - uint8_t buffer[22]; -} tpm_getownership_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0x65, 0x0, 0x0, 0x0, 0x5, 0x0, 0x0, 0x0, 0x4, 0x0, 0x0, 0x1, 0x11, }, -}; - -const struct s_tpm_getpermissions_cmd{ - uint8_t buffer[22]; - uint16_t index; -} tpm_getpermissions_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0x65, 0x0, 0x0, 0x0, 0x11, 0x0, 0x0, 0x0, 0x4, }, -18, }; - -const struct s_tpm_getstclearflags_cmd{ - uint8_t buffer[22]; -} tpm_getstclearflags_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0x65, 0x0, 0x0, 0x0, 0x4, 0x0, 0x0, 0x0, 0x4, 0x0, 0x0, 0x1, 0x9, }, -}; - -const struct s_tpm_getflags_cmd{ - uint8_t buffer[22]; -} tpm_getflags_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0x65, 0x0, 0x0, 0x0, 0x4, 0x0, 0x0, 0x0, 0x4, 0x0, 0x0, 0x1, 0x8, }, -}; - -const struct s_tpm_physicalsetdeactivated_cmd{ - uint8_t buffer[11]; - uint16_t deactivated; -} tpm_physicalsetdeactivated_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xb, 0x0, 0x0, 0x0, 0x72, }, -10, }; - -const struct s_tpm_physicalenable_cmd{ - uint8_t buffer[10]; -} tpm_physicalenable_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x6f, }, -}; - -const struct s_tpm_physicaldisable_cmd{ - uint8_t buffer[10]; -} tpm_physicaldisable_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x70, }, -}; - -const struct s_tpm_forceclear_cmd{ - uint8_t buffer[10]; -} tpm_forceclear_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x5d, }, -}; - -const struct s_tpm_readpubek_cmd{ - uint8_t buffer[30]; -} tpm_readpubek_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x1e, 0x0, 0x0, 0x0, 0x7c, }, -}; - -const struct s_tpm_continueselftest_cmd{ - uint8_t buffer[10]; -} tpm_continueselftest_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x53, }, -}; - -const struct s_tpm_selftestfull_cmd{ - uint8_t buffer[10]; -} tpm_selftestfull_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x50, }, -}; - -const struct s_tpm_resume_cmd{ - uint8_t buffer[12]; -} tpm_resume_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x2, }, -}; - -const struct s_tpm_savestate_cmd{ - uint8_t buffer[10]; -} tpm_savestate_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x98, }, -}; - -const struct s_tpm_startup_cmd{ - uint8_t buffer[12]; -} tpm_startup_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x1, }, -}; - -const struct s_tpm_finalizepp_cmd{ - uint8_t buffer[12]; -} tpm_finalizepp_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x2, 0xa0, }, -}; - -const struct s_tpm_pplock_cmd{ - uint8_t buffer[12]; -} tpm_pplock_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0, 0x4, }, -}; - -const struct s_tpm_ppenable_cmd{ - uint8_t buffer[12]; -} tpm_ppenable_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0, 0x20, }, -}; - -const struct s_tpm_ppassert_cmd{ - uint8_t buffer[12]; -} tpm_ppassert_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0, 0x8, }, -}; - -const struct s_tpm_pcr_read_cmd{ - uint8_t buffer[14]; - uint16_t pcrNum; -} tpm_pcr_read_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xe, 0x0, 0x0, 0x0, 0x15, }, -10, }; - -const struct s_tpm_nv_read_cmd{ - uint8_t buffer[22]; - uint16_t index; - uint16_t length; -} tpm_nv_read_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0xcf, }, -10, 18, }; - -const struct s_tpm_nv_write_cmd{ - uint8_t buffer[256]; - uint16_t index; - uint16_t length; - uint16_t data; -} tpm_nv_write_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xcd, }, -10, 18, 22, }; - -const struct s_tpm_nv_definespace_cmd{ - uint8_t buffer[101]; - uint16_t index; - uint16_t perm; - uint16_t size; -} tpm_nv_definespace_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x65, 0x0, 0x0, 0x0, 0xcc, 0x0, 0x18, 0, 0, 0, 0, 0x0, 0x3, 0, 0, 0, 0x1f, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0, 0x3, 0, 0, 0, 0x1f, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0, 0x17, }, -12, 70, 77, }; - -const int kWriteInfoLength = 12; -const int kNvDataPublicPermissionsOffset = 60; diff --git a/src/lib/tpm/Makefile.inc b/src/lib/tpm/Makefile.inc new file mode 100644 index 0000000..81a3eb9 --- /dev/null +++ b/src/lib/tpm/Makefile.inc @@ -0,0 +1,13 @@ +ifneq ($(CONFIG_CHROMEOS),y) +romstage-$(CONFIG_LPC_TPM) += tss.c tspi.c +ramstage-$(CONFIG_LPC_TPM) += tss.c tspi.c +else +romstage-$(CONFIG_LPC_TPM) += tspi.c +endif + +ifeq ($(MOCK_TPM),1) +libverstage-y += mocked_tss.c +else +libverstage-y += tss.c +endif + diff --git a/src/lib/tpm/mocked_tss.c b/src/lib/tpm/mocked_tss.c new file mode 100644 index 0000000..ebb0168 --- /dev/null +++ b/src/lib/tpm/mocked_tss.c @@ -0,0 +1,141 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 The ChromiumOS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <tpm/tss.h> + +#ifdef FOR_TEST +#include <stdio.h> +#define VBDEBUG(format, args...) printf(format, ## args) +#else +#include <console/console.h> +#define VBDEBUG(format, args...) printk(BIOS_DEBUG, format, ## args) +#endif + +uint32_t tlcl_lib_init(void) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_startup(void) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_resume(void) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_self_test_full(void) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_continue_self_test(void) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_define_space(uint32_t index, uint32_t perm, uint32_t size) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_write(uint32_t index, const void *data, uint32_t length) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_read(uint32_t index, void *data, uint32_t length) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + + +uint32_t tlcl_assert_physical_presence(void) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_physical_presence_cmd_enable(void) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_finalize_physical_presence(void) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_set_nv_locked(void) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_force_clear(void) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_set_enable(void) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_set_deactivated(uint8_t flag) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS *pflags) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_get_flags(uint8_t *disable, uint8_t *deactivated, + uint8_t *nvlocked) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_set_global_lock(void) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} + +uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest, + uint8_t *out_digest) +{ + VBDEBUG("MOCK_TPM: %s\n", __func__); + return TPM_E_NO_DEVICE; +} diff --git a/src/lib/tpm/tspi.c b/src/lib/tpm/tspi.c new file mode 100644 index 0000000..0114af8 --- /dev/null +++ b/src/lib/tpm/tspi.c @@ -0,0 +1,92 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <console/cbmem_console.h> +#include <console/console.h> +#include <reset.h> + +#include <tpm/tss.h> +#include <tpm/tspi.h> + +void init_tpm(int s3resume) +{ + u32 result = 0; + + if (CONFIG_TPM_DEACTIVATE) { + printk(BIOS_SPEW, "TPM: Deactivate\n"); + + result = tlcl_set_deactivated(1); + if (result != TPM_SUCCESS) { + printk(BIOS_ERR, "TPM: Error code 0x%x.\n", result); + return; + } + } + + /* Doing TPM startup when we're not coming in on the S3 resume path + * saves us roughly 20ms in boot time only. This does not seem to + * be worth an API change to vboot_reference-firmware right now, so + * let's keep the code around, but just bail out early: + */ + if (s3resume ? CONFIG_NO_TPM_RESUME + : CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT) + return; + + printk(BIOS_DEBUG, "TPM initialization.\n"); + + if (tlcl_lib_init() != TPM_SUCCESS) { + printk(BIOS_ERR, "TPM: Error code 0x%x.\n", result); + return; + } + + if (s3resume) { + /* S3 Resume */ + printk(BIOS_SPEW, "TPM: Resume\n"); + + result = tlcl_resume(); + if (result == TPM_E_INVALID_POSTINIT) { + /* We're on a platform where the TPM maintains power + * in S3, so it's already initialized. + */ + printk(BIOS_DEBUG, "TPM: Already initialized.\n"); + return; + } else if (result != TPM_SUCCESS) { + printk(BIOS_ERR, "TPM: Error code 0x%x.\n", result); + return; + } + } else { + printk(BIOS_SPEW, "TPM: Startup\n"); + result = tlcl_startup(); + if (result != TPM_SUCCESS) { + printk(BIOS_ERR, "TPM: Error code 0x%x.\n", result); + return; + } + } + + if (result == TPM_SUCCESS) { + printk(BIOS_SPEW, "TPM: OK.\n"); + return; + } + + printk(BIOS_ERR, "TPM: Error code 0x%x.\n", result); + + if (CONFIG_TPM_INIT_FAILURE_IS_FATAL) { + printk(BIOS_ERR, "Hard reset!\n"); + post_code(POST_TPM_FAILURE); + if (IS_ENABLED(CONFIG_CONSOLE_CBMEM_DUMP_TO_UART)) + cbmem_dump_console(); + hard_reset(); + } +} diff --git a/src/lib/tpm/tss.c b/src/lib/tpm/tss.c new file mode 100644 index 0000000..a22aa15 --- /dev/null +++ b/src/lib/tpm/tss.c @@ -0,0 +1,356 @@ +/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* A lightweight TPM command library. + * + * The general idea is that TPM commands are array of bytes whose + * fields are mostly compile-time constant. The goal is to build much + * of the commands at compile time (or build time) and change some of + * the fields at run time as needed. The code in + * utility/tlcl_generator.c builds structures containing the commands, + * as well as the offsets of the fields that need to be set at run + * time. + */ + +#include <assert.h> +#include <string.h> +#include <tpm/tss.h> +#include <tpm/tpm.h> +#include <console/cbmem_console.h> +#include <console/console.h> +#include <reset.h> +#include "tss_internal.h" +#include "tss_structures.h" + +#ifdef FOR_TEST +#include <stdio.h> +#define VBDEBUG(format, args...) printf(format, ## args) +#else +#include <console/console.h> +#define VBDEBUG(format, args...) printk(BIOS_DEBUG, format, ## args) +#endif + +#define UNKNOWN_ERROR 0x10000001 // see VBOOT2 error codes.. + +static int tpm_send_receive(const uint8_t *request, + uint32_t request_length, + uint8_t *response, + uint32_t *response_length) +{ + size_t len = *response_length; + + if (tis_sendrecv(request, request_length, response, &len)) + return UNKNOWN_ERROR; + /* check 64->32bit overflow and (re)check response buffer overflow */ + if (len > *response_length) + return UNKNOWN_ERROR; + *response_length = len; + return TPM_SUCCESS; +} + +/* Sets the size field of a TPM command. */ +static inline void set_tpm_command_size(uint8_t *buffer, uint32_t size) +{ + to_tpm_uint32(buffer + sizeof(uint16_t), size); +} + +/* Gets the size field of a TPM command. */ +__attribute__((unused)) +static inline int tpm_command_size(const uint8_t *buffer) +{ + uint32_t size; + + from_tpm_uint32(buffer + sizeof(uint16_t), &size); + return (int) size; +} + +/* Gets the code field of a TPM command. */ +static inline int tpm_command_code(const uint8_t *buffer) +{ + uint32_t code; + + from_tpm_uint32(buffer + sizeof(uint16_t) + sizeof(uint32_t), &code); + return code; +} + +/* Gets the return code field of a TPM result. */ +static inline int tpm_return_code(const uint8_t *buffer) +{ + return tpm_command_code(buffer); +} + +/* Like TlclSendReceive below, but do not retry if NEEDS_SELFTEST or + * DOING_SELFTEST errors are returned. + */ +static uint32_t tlcl_send_receive_no_retry(const uint8_t *request, + uint8_t *response, int max_length) { + uint32_t response_length = max_length; + uint32_t result; + + result = tpm_send_receive(request, tpm_command_size(request), + response, &response_length); + if (0 != result) { + /* Communication with TPM failed, so response is garbage */ + VBDEBUG("TPM: command 0x%x send/receive failed: 0x%x\n", + tpm_command_code(request), result); + return result; + } + /* Otherwise, use the result code from the response */ + result = tpm_return_code(response); + + /* TODO: add paranoia about returned response_length vs. max_length + * (and possibly expected length from the response header). See + * crosbug.com/17017 */ + + VBDEBUG("TPM: command 0x%x returned 0x%x\n", + tpm_command_code(request), result); + +return result; +} + + +/* Sends a TPM command and gets a response. Returns 0 if success or the TPM + * error code if error. Waits for the self test to complete if needed. */ +uint32_t tlcl_send_receive(const uint8_t *request, uint8_t *response, + int max_length) { + uint32_t result = tlcl_send_receive_no_retry(request, response, + max_length); + /* If the command fails because the self test has not completed, try it + * again after attempting to ensure that the self test has completed. */ + if (result == TPM_E_NEEDS_SELFTEST || result == TPM_E_DOING_SELFTEST) { + result = tlcl_continue_self_test(); + if (result != TPM_SUCCESS) + return result; +#if defined(TPM_BLOCKING_CONTINUESELFTEST) || defined(VB_RECOVERY_MODE) + /* Retry only once */ + result = tlcl_send_receive_no_retry(request, response, + max_length); +#else + /* This needs serious testing. The TPM specification says: "iii. + * The caller MUST wait for the actions of TPM_ContinueSelfTest + * to complete before reissuing the command C1." But, if + * ContinueSelfTest is non-blocking, how do we know that the + * actions have completed other than trying again? */ + do { + result = tlcl_send_receive_no_retry(request, response, + max_length); + } while (result == TPM_E_DOING_SELFTEST); +#endif + } + return result; +} + +/* Sends a command and returns the error code. */ +static uint32_t send(const uint8_t *command) +{ + uint8_t response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; + + return tlcl_send_receive(command, response, sizeof(response)); +} + +/* Exported functions. */ + +uint32_t tlcl_lib_init(void) +{ + if (tis_init()) + return UNKNOWN_ERROR; + if (tis_open()) + return UNKNOWN_ERROR; + return TPM_SUCCESS; +} + +uint32_t tlcl_startup(void) +{ + VBDEBUG("TPM: Startup\n"); + return send(tpm_startup_cmd.buffer); +} + +uint32_t tlcl_resume(void) +{ + VBDEBUG("TPM: Resume\n"); + return send(tpm_resume_cmd.buffer); +} + +uint32_t tlcl_self_test_full(void) +{ + VBDEBUG("TPM: Self test full\n"); + return send(tpm_selftestfull_cmd.buffer); +} + +uint32_t tlcl_continue_self_test(void) +{ + uint8_t response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; + + VBDEBUG("TPM: Continue self test\n"); + /* Call the No Retry version of SendReceive to avoid recursion. */ + return tlcl_send_receive_no_retry(tpm_continueselftest_cmd.buffer, + response, sizeof(response)); +} + +uint32_t tlcl_define_space(uint32_t index, uint32_t perm, uint32_t size) +{ + struct s_tpm_nv_definespace_cmd cmd; + + VBDEBUG("TPM: TlclDefineSpace(0x%x, 0x%x, %d)\n", index, perm, size); + memcpy(&cmd, &tpm_nv_definespace_cmd, sizeof(cmd)); + to_tpm_uint32(cmd.buffer + tpm_nv_definespace_cmd.index, index); + to_tpm_uint32(cmd.buffer + tpm_nv_definespace_cmd.perm, perm); + to_tpm_uint32(cmd.buffer + tpm_nv_definespace_cmd.size, size); + return send(cmd.buffer); +} + +uint32_t tlcl_write(uint32_t index, const void *data, uint32_t length) +{ + struct s_tpm_nv_write_cmd cmd; + uint8_t response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; + const int total_length = + kTpmRequestHeaderLength + kWriteInfoLength + length; + + VBDEBUG("TPM: tlcl_write(0x%x, %d)\n", index, length); + memcpy(&cmd, &tpm_nv_write_cmd, sizeof(cmd)); + assert(total_length <= TPM_LARGE_ENOUGH_COMMAND_SIZE); + set_tpm_command_size(cmd.buffer, total_length); + + to_tpm_uint32(cmd.buffer + tpm_nv_write_cmd.index, index); + to_tpm_uint32(cmd.buffer + tpm_nv_write_cmd.length, length); + memcpy(cmd.buffer + tpm_nv_write_cmd.data, data, length); + + return tlcl_send_receive(cmd.buffer, response, sizeof(response)); +} + +uint32_t tlcl_read(uint32_t index, void *data, uint32_t length) +{ + struct s_tpm_nv_read_cmd cmd; + uint8_t response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; + uint32_t result_length; + uint32_t result; + + VBDEBUG("TPM: tlcl_read(0x%x, %d)\n", index, length); + memcpy(&cmd, &tpm_nv_read_cmd, sizeof(cmd)); + to_tpm_uint32(cmd.buffer + tpm_nv_read_cmd.index, index); + to_tpm_uint32(cmd.buffer + tpm_nv_read_cmd.length, length); + + result = tlcl_send_receive(cmd.buffer, response, sizeof(response)); + if (result == TPM_SUCCESS && length > 0) { + uint8_t *nv_read_cursor = response + kTpmResponseHeaderLength; + + from_tpm_uint32(nv_read_cursor, &result_length); + nv_read_cursor += sizeof(uint32_t); + memcpy(data, nv_read_cursor, result_length); + } + + return result; +} + + +uint32_t tlcl_assert_physical_presence(void) +{ + VBDEBUG("TPM: Asserting physical presence\n"); + return send(tpm_ppassert_cmd.buffer); +} + +uint32_t tlcl_physical_presence_cmd_enable(void) +{ + VBDEBUG("TPM: Enable the physical presence command\n"); + return send(tpm_ppenable_cmd.buffer); +} + +uint32_t tlcl_finalize_physical_presence(void) +{ + VBDEBUG("TPM: Enable PP cmd, disable HW pp, and set lifetime lock\n"); + return send(tpm_finalizepp_cmd.buffer); +} + +uint32_t tlcl_set_nv_locked(void) +{ + VBDEBUG("TPM: Set NV locked\n"); + return tlcl_define_space(TPM_NV_INDEX_LOCK, 0, 0); +} + +uint32_t tlcl_force_clear(void) +{ + VBDEBUG("TPM: Force clear\n"); + return send(tpm_forceclear_cmd.buffer); +} + +uint32_t tlcl_set_enable(void) +{ + VBDEBUG("TPM: Enabling TPM\n"); + return send(tpm_physicalenable_cmd.buffer); +} + +uint32_t tlcl_set_deactivated(uint8_t flag) +{ + struct s_tpm_physicalsetdeactivated_cmd cmd; + + VBDEBUG("TPM: SetDeactivated(%d)\n", flag); + memcpy(&cmd, &tpm_physicalsetdeactivated_cmd, sizeof(cmd)); + *(cmd.buffer + cmd.deactivated) = flag; + return send(cmd.buffer); +} + +uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS *pflags) +{ + uint8_t response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; + uint32_t size; + uint32_t result = tlcl_send_receive(tpm_getflags_cmd.buffer, response, + sizeof(response)); + + if (result != TPM_SUCCESS) + return result; + from_tpm_uint32(response + kTpmResponseHeaderLength, &size); + assert(size == sizeof(TPM_PERMANENT_FLAGS)); + memcpy(pflags, response + kTpmResponseHeaderLength + sizeof(size), + sizeof(TPM_PERMANENT_FLAGS)); + return result; +} + +uint32_t tlcl_get_flags(uint8_t *disable, uint8_t *deactivated, + uint8_t *nvlocked) +{ + TPM_PERMANENT_FLAGS pflags; + uint32_t result = tlcl_get_permanent_flags(&pflags); + + if (result == TPM_SUCCESS) { + if (disable) + *disable = pflags.disable; + if (deactivated) + *deactivated = pflags.deactivated; + if (nvlocked) + *nvlocked = pflags.nvLocked; + VBDEBUG("TPM: flags disable=%d, deactivated=%d, nvlocked=%d\n", + pflags.disable, pflags.deactivated, pflags.nvLocked); + } + return result; +} + +uint32_t tlcl_set_global_lock(void) +{ + uint32_t x; + + VBDEBUG("TPM: Set global lock\n"); + return tlcl_write(TPM_NV_INDEX0, (uint8_t *) &x, 0); +} + +uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest, + uint8_t *out_digest) +{ + struct s_tpm_extend_cmd cmd; + uint8_t response[kTpmResponseHeaderLength + kPcrDigestLength]; + uint32_t result; + + memcpy(&cmd, &tpm_extend_cmd, sizeof(cmd)); + to_tpm_uint32(cmd.buffer + tpm_extend_cmd.pcrNum, pcr_num); + memcpy(cmd.buffer + cmd.inDigest, in_digest, kPcrDigestLength); + + result = tlcl_send_receive(cmd.buffer, response, sizeof(response)); + if (result != TPM_SUCCESS) + return result; + + if (out_digest) + memcpy(out_digest, response + kTpmResponseHeaderLength, + kPcrDigestLength); + return result; +} diff --git a/src/lib/tpm/tss_internal.h b/src/lib/tpm/tss_internal.h new file mode 100644 index 0000000..b40d8f5 --- /dev/null +++ b/src/lib/tpm/tss_internal.h @@ -0,0 +1,65 @@ +/* Copyright (c) 2010 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef LIB_TPM_TSS_INTERNAL_H +#define LIB_TPM_TSS_INTERNAL_H + +/* + * These numbers derive from adding the sizes of command fields as shown in the + * TPM commands manual. + */ +#define kTpmRequestHeaderLength 10 +#define kTpmResponseHeaderLength 10 +#define kTpmReadInfoLength 12 +#define kEncAuthLength 20 +#define kPcrDigestLength 20 + + +/* + * Conversion functions. to_tpm_TYPE puts a value of type TYPE into a TPM + * command buffer. from_tpm_TYPE gets a value of type TYPE from a TPM command + * buffer into a variable. + */ +__attribute__((unused)) +static inline void to_tpm_uint32(uint8_t *buffer, uint32_t x) +{ + buffer[0] = (uint8_t)(x >> 24); + buffer[1] = (uint8_t)((x >> 16) & 0xff); + buffer[2] = (uint8_t)((x >> 8) & 0xff); + buffer[3] = (uint8_t)(x & 0xff); +} + +/* + * See comment for above function. + */ +__attribute__((unused)) +static inline void from_tpm_uint32(const uint8_t *buffer, uint32_t *x) +{ + *x = ((buffer[0] << 24) | + (buffer[1] << 16) | + (buffer[2] << 8) | + buffer[3]); +} + +/* + * See comment for above function. + */ +__attribute__((unused)) +static inline void to_tpm_uint16(uint8_t *buffer, uint16_t x) +{ + buffer[0] = (uint8_t)(x >> 8); + buffer[1] = (uint8_t)(x & 0xff); +} + +/* + * See comment for above function. + */ +__attribute__((unused)) +static inline void from_tpm_uint16(const uint8_t *buffer, uint16_t *x) +{ + *x = (buffer[0] << 8) | buffer[1]; +} + +#endif /* LIB_TPM_TSS_INTERNAL_H */ diff --git a/src/lib/tpm/tss_structures.h b/src/lib/tpm/tss_structures.h new file mode 100644 index 0000000..4853446 --- /dev/null +++ b/src/lib/tpm/tss_structures.h @@ -0,0 +1,142 @@ +/* This file is automatically generated */ + +const struct s_tpm_extend_cmd{ + uint8_t buffer[34]; + uint16_t pcrNum; + uint16_t inDigest; +} tpm_extend_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x22, 0x0, 0x0, 0x0, 0x14, }, + 10, 14, }; + +const struct s_tpm_get_random_cmd{ + uint8_t buffer[14]; + uint16_t bytesRequested; +} tpm_get_random_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xe, 0x0, 0x0, 0x0, 0x46, }, + 10, }; + +const struct s_tpm_getownership_cmd{ + uint8_t buffer[22]; +} tpm_getownership_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0x65, + 0x0, 0x0, 0x0, 0x5, 0x0, 0x0, 0x0, 0x4, 0x0, 0x0, 0x1, 0x11, }, +}; + +const struct s_tpm_getpermissions_cmd{ + uint8_t buffer[22]; + uint16_t index; +} tpm_getpermissions_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, + 0x65, 0x0, 0x0, 0x0, 0x11, 0x0, 0x0, 0x0, 0x4, }, 18, }; + +const struct s_tpm_getstclearflags_cmd{ + uint8_t buffer[22]; +} tpm_getstclearflags_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, + 0x65, 0x0, 0x0, 0x0, 0x4, 0x0, 0x0, 0x0, 0x4, 0x0, 0x0, 0x1, 0x9, }, }; + +const struct s_tpm_getflags_cmd{ + uint8_t buffer[22]; +} tpm_getflags_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0x65, + 0x0, 0x0, 0x0, 0x4, 0x0, 0x0, 0x0, 0x4, 0x0, 0x0, 0x1, 0x8, }, }; + +const struct s_tpm_physicalsetdeactivated_cmd{ + uint8_t buffer[11]; + uint16_t deactivated; +} tpm_physicalsetdeactivated_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xb, 0x0, 0x0, + 0x0, 0x72, }, 10, }; + +const struct s_tpm_physicalenable_cmd{ + uint8_t buffer[10]; +} tpm_physicalenable_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, + 0x6f, }, }; + +const struct s_tpm_physicaldisable_cmd{ + uint8_t buffer[10]; +} tpm_physicaldisable_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, + 0x70, }, }; + +const struct s_tpm_forceclear_cmd{ + uint8_t buffer[10]; +} tpm_forceclear_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x5d, }, +}; + +const struct s_tpm_readpubek_cmd{ + uint8_t buffer[30]; +} tpm_readpubek_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x1e, 0x0, 0x0, 0x0, 0x7c, }, +}; + +const struct s_tpm_continueselftest_cmd{ + uint8_t buffer[10]; +} tpm_continueselftest_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, + 0x53, }, }; + +const struct s_tpm_selftestfull_cmd{ + uint8_t buffer[10]; +} tpm_selftestfull_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x50, +}, }; + +const struct s_tpm_resume_cmd{ + uint8_t buffer[12]; +} tpm_resume_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, + 0x2, }, }; + +const struct s_tpm_savestate_cmd{ + uint8_t buffer[10]; +} tpm_savestate_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x98, }, +}; + +const struct s_tpm_startup_cmd{ + uint8_t buffer[12]; +} tpm_startup_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, + 0x1, }, }; + +const struct s_tpm_finalizepp_cmd{ + uint8_t buffer[12]; +} tpm_finalizepp_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, + 0x2, 0xa0, }, }; + +const struct s_tpm_pplock_cmd{ + uint8_t buffer[12]; +} tpm_pplock_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0, + 0x4, }, }; + +const struct s_tpm_ppenable_cmd{ + uint8_t buffer[12]; +} tpm_ppenable_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0, + 0x20, }, }; + +const struct s_tpm_ppassert_cmd{ + uint8_t buffer[12]; +} tpm_ppassert_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0, + 0x8, }, }; + +const struct s_tpm_pcr_read_cmd{ + uint8_t buffer[14]; + uint16_t pcrNum; +} tpm_pcr_read_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xe, 0x0, 0x0, 0x0, 0x15, }, + 10, }; + +const struct s_tpm_nv_read_cmd{ + uint8_t buffer[22]; + uint16_t index; + uint16_t length; +} tpm_nv_read_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0xcf, }, +10, 18, }; + +const struct s_tpm_nv_write_cmd{ + uint8_t buffer[256]; + uint16_t index; + uint16_t length; + uint16_t data; +} tpm_nv_write_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xcd, }, +10, 18, 22, }; + +const struct s_tpm_nv_definespace_cmd{ + uint8_t buffer[101]; + uint16_t index; + uint16_t perm; + uint16_t size; +} tpm_nv_definespace_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x65, 0x0, 0x0, 0x0, + 0xcc, 0x0, 0x18, 0, 0, 0, 0, 0x0, 0x3, 0, 0, 0, 0x1f, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0, 0x3, 0, 0, 0, 0x1f, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0, 0x17, }, 12, + 70, 77, }; + +const int kWriteInfoLength = 12; +const int kNvDataPublicPermissionsOffset = 60; diff --git a/src/mainboard/google/auron/acpi/mainboard.asl b/src/mainboard/google/auron/acpi/mainboard.asl index 2e4352e..f974124 100644 --- a/src/mainboard/google/auron/acpi/mainboard.asl +++ b/src/mainboard/google/auron/acpi/mainboard.asl @@ -44,7 +44,7 @@ Scope (\_SB) */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } Scope (\_SB.PCI0.I2C0) diff --git a/src/mainboard/google/auron/devicetree.cb b/src/mainboard/google/auron/devicetree.cb index 77e71b8..ea71cf6 100644 --- a/src/mainboard/google/auron/devicetree.cb +++ b/src/mainboard/google/auron/devicetree.cb @@ -90,7 +90,7 @@ chip soc/intel/broadwell device pci 1d.0 on end # USB2 EHCI device pci 1e.0 off end # PCI bridge device pci 1f.0 on - chip drivers/pc80/tpm + chip drivers/tpm # Rising edge interrupt register "irq_polarity" = "2" device pnp 0c31.0 on diff --git a/src/mainboard/google/auron_paine/acpi/mainboard.asl b/src/mainboard/google/auron_paine/acpi/mainboard.asl index fe68e30..f2478ae 100644 --- a/src/mainboard/google/auron_paine/acpi/mainboard.asl +++ b/src/mainboard/google/auron_paine/acpi/mainboard.asl @@ -44,7 +44,7 @@ Scope (\_SB) */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } Scope (\_SB.PCI0.I2C0) diff --git a/src/mainboard/google/auron_paine/devicetree.cb b/src/mainboard/google/auron_paine/devicetree.cb index 5872cf2..6c7bfbb 100644 --- a/src/mainboard/google/auron_paine/devicetree.cb +++ b/src/mainboard/google/auron_paine/devicetree.cb @@ -90,7 +90,7 @@ chip soc/intel/broadwell device pci 1d.0 on end # USB2 EHCI device pci 1e.0 off end # PCI bridge device pci 1f.0 on - chip drivers/pc80/tpm + chip drivers/tpm # Rising edge interrupt register "irq_polarity" = "2" device pnp 0c31.0 on diff --git a/src/mainboard/google/chell/acpi/mainboard.asl b/src/mainboard/google/chell/acpi/mainboard.asl index a7c7bfe..51ac0d2 100644 --- a/src/mainboard/google/chell/acpi/mainboard.asl +++ b/src/mainboard/google/chell/acpi/mainboard.asl @@ -51,7 +51,7 @@ Scope (\_SB) */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } /* diff --git a/src/mainboard/google/chell/devicetree.cb b/src/mainboard/google/chell/devicetree.cb index 428779a..611e698 100644 --- a/src/mainboard/google/chell/devicetree.cb +++ b/src/mainboard/google/chell/devicetree.cb @@ -219,7 +219,7 @@ chip soc/intel/skylake device pci 1e.5 off end # SDIO device pci 1e.6 off end # SDCard device pci 1f.0 on - chip drivers/pc80/tpm + chip drivers/tpm device pnp 0c31.0 on end end chip ec/google/chromeec diff --git a/src/mainboard/google/cyan/acpi/mainboard.asl b/src/mainboard/google/cyan/acpi/mainboard.asl index c9f4017..e8f0a8e 100644 --- a/src/mainboard/google/cyan/acpi/mainboard.asl +++ b/src/mainboard/google/cyan/acpi/mainboard.asl @@ -42,7 +42,7 @@ Scope (\_SB) */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } Scope (\_SB.I2C1) diff --git a/src/mainboard/google/cyan/devicetree.cb b/src/mainboard/google/cyan/devicetree.cb index 9d14ba6..e486fa5 100644 --- a/src/mainboard/google/cyan/devicetree.cb +++ b/src/mainboard/google/cyan/devicetree.cb @@ -126,7 +126,7 @@ chip soc/intel/braswell device pci 1e.6 on end # 8086 2290 - SPI 2 device pci 1e.7 on end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge - chip drivers/pc80/tpm + chip drivers/tpm # Rising edge interrupt register "irq_polarity" = "2" device pnp 0c31.0 on diff --git a/src/mainboard/google/glados/acpi/mainboard.asl b/src/mainboard/google/glados/acpi/mainboard.asl index 3fbe332..1339c45 100644 --- a/src/mainboard/google/glados/acpi/mainboard.asl +++ b/src/mainboard/google/glados/acpi/mainboard.asl @@ -50,7 +50,7 @@ Scope (\_SB) */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } /* diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index c4b89af..40869e6 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -219,7 +219,7 @@ chip soc/intel/skylake device pci 1e.5 off end # SDIO device pci 1e.6 on end # SDCard device pci 1f.0 on - chip drivers/pc80/tpm + chip drivers/tpm device pnp 0c31.0 on end end chip ec/google/chromeec diff --git a/src/mainboard/google/jecht/acpi/mainboard.asl b/src/mainboard/google/jecht/acpi/mainboard.asl index b069446..a1988ed 100644 --- a/src/mainboard/google/jecht/acpi/mainboard.asl +++ b/src/mainboard/google/jecht/acpi/mainboard.asl @@ -29,7 +29,7 @@ Scope (\_SB) */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } /* diff --git a/src/mainboard/google/lars/acpi/mainboard.asl b/src/mainboard/google/lars/acpi/mainboard.asl index d6299a5..9e18fe7 100644 --- a/src/mainboard/google/lars/acpi/mainboard.asl +++ b/src/mainboard/google/lars/acpi/mainboard.asl @@ -91,7 +91,7 @@ Scope (\_SB) */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } /* diff --git a/src/mainboard/google/lars/devicetree.cb b/src/mainboard/google/lars/devicetree.cb index 50b3e1e..8bd131e 100644 --- a/src/mainboard/google/lars/devicetree.cb +++ b/src/mainboard/google/lars/devicetree.cb @@ -211,7 +211,7 @@ chip soc/intel/skylake device pci 1e.5 off end # SDIO device pci 1e.6 off end # SDCard device pci 1f.0 on - chip drivers/pc80/tpm + chip drivers/tpm device pnp 0c31.0 on end end chip ec/google/chromeec diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index 8142845..e7e4a56 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -35,7 +35,7 @@ #include <arch/cpu.h> #include <cpu/x86/msr.h> #include <halt.h> -#include <tpm.h> +#include <tpm/tpm.h> #include <cbfs.h> #include <southbridge/intel/bd82x6x/chip.h> diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index 135cc76..48055f2 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -35,7 +35,7 @@ #include <cpu/x86/msr.h> #include <halt.h> #include <cbfs.h> -#include <tpm.h> +#include <tpm/tspi.h> #include "ec/compal/ene932/ec.h" void pch_enable_lpc(void) diff --git a/src/mainboard/google/samus/acpi/mainboard.asl b/src/mainboard/google/samus/acpi/mainboard.asl index 17f6257..b36ee72 100644 --- a/src/mainboard/google/samus/acpi/mainboard.asl +++ b/src/mainboard/google/samus/acpi/mainboard.asl @@ -40,7 +40,7 @@ Scope (\_SB) */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } /* diff --git a/src/mainboard/google/samus/devicetree.cb b/src/mainboard/google/samus/devicetree.cb index d12762d..104af07 100644 --- a/src/mainboard/google/samus/devicetree.cb +++ b/src/mainboard/google/samus/devicetree.cb @@ -94,7 +94,7 @@ chip soc/intel/broadwell device pci 1d.0 off end # USB2 EHCI device pci 1e.0 off end # PCI bridge device pci 1f.0 on - chip drivers/pc80/tpm + chip drivers/tpm # Rising edge interrupt register "irq_polarity" = "2" device pnp 0c31.0 on diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 8348e4f..cde2061 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -35,7 +35,7 @@ #include <cpu/x86/msr.h> #include <halt.h> #include <bootmode.h> -#include <tpm.h> +#include <tpm/tspi.h> #include <cbfs.h> #include <ec/quanta/it8518/ec.h> #include "ec.h" diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index 069b6ad..72dfb03 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -35,7 +35,7 @@ #include <arch/cpu.h> #include <cpu/x86/msr.h> #include <halt.h> -#include <tpm.h> +#include <tpm/tpm.h> #define SIO_PORT 0x164e diff --git a/src/mainboard/intel/kunimitsu/acpi/mainboard.asl b/src/mainboard/intel/kunimitsu/acpi/mainboard.asl index 4a85e35..976042d 100644 --- a/src/mainboard/intel/kunimitsu/acpi/mainboard.asl +++ b/src/mainboard/intel/kunimitsu/acpi/mainboard.asl @@ -95,7 +95,7 @@ Scope (\_SB) */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } /* diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index 62a0c26..72cc1e0 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -215,7 +215,7 @@ chip soc/intel/skylake device pci 1e.5 off end # SDIO device pci 1e.6 on end # SDCard device pci 1f.0 on - chip drivers/pc80/tpm + chip drivers/tpm device pnp 0c31.0 on end end chip ec/google/chromeec diff --git a/src/mainboard/intel/strago/acpi/mainboard.asl b/src/mainboard/intel/strago/acpi/mainboard.asl index 0353eed..6383f0f 100644 --- a/src/mainboard/intel/strago/acpi/mainboard.asl +++ b/src/mainboard/intel/strago/acpi/mainboard.asl @@ -41,7 +41,7 @@ Scope (\_SB) */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } Scope (\_SB.I2C1) { diff --git a/src/mainboard/intel/strago/devicetree.cb b/src/mainboard/intel/strago/devicetree.cb index 9133787..e09435d 100644 --- a/src/mainboard/intel/strago/devicetree.cb +++ b/src/mainboard/intel/strago/devicetree.cb @@ -127,7 +127,7 @@ chip soc/intel/braswell device pci 1e.6 off end # 8086 2290 - SPI 2 device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge - chip drivers/pc80/tpm + chip drivers/tpm # Rising edge interrupt register "irq_polarity" = "2" device pnp 0c31.0 on diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb index ca02455..d81df00 100644 --- a/src/mainboard/lenovo/t420s/devicetree.cb +++ b/src/mainboard/lenovo/t420s/devicetree.cb @@ -110,7 +110,7 @@ chip northbridge/intel/sandybridge register "dock_event_enable" = "0x01" end - chip drivers/pc80/tpm + chip drivers/tpm device pnp 0c31.0 on end end diff --git a/src/mainboard/lenovo/t420s/dsdt.asl b/src/mainboard/lenovo/t420s/dsdt.asl index 827a2ea..e2ad559 100644 --- a/src/mainboard/lenovo/t420s/dsdt.asl +++ b/src/mainboard/lenovo/t420s/dsdt.asl @@ -57,7 +57,7 @@ DefinitionBlock( */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } /* Chipset specific sleep states */ diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb index 7b83fbc..9e453fd 100644 --- a/src/mainboard/lenovo/t430s/devicetree.cb +++ b/src/mainboard/lenovo/t430s/devicetree.cb @@ -114,7 +114,7 @@ chip northbridge/intel/sandybridge register "dock_event_enable" = "0x01" end - chip drivers/pc80/tpm + chip drivers/tpm device pnp 0c31.0 on end end diff --git a/src/mainboard/lenovo/t430s/dsdt.asl b/src/mainboard/lenovo/t430s/dsdt.asl index 827a2ea..e2ad559 100644 --- a/src/mainboard/lenovo/t430s/dsdt.asl +++ b/src/mainboard/lenovo/t430s/dsdt.asl @@ -57,7 +57,7 @@ DefinitionBlock( */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } /* Chipset specific sleep states */ diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb index 379a95d..3fbbe74 100644 --- a/src/mainboard/lenovo/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/devicetree.cb @@ -91,7 +91,7 @@ chip northbridge/intel/sandybridge register "dock_event_enable" = "0x01" end - chip drivers/pc80/tpm + chip drivers/tpm device pnp 0c31.0 on end end diff --git a/src/mainboard/lenovo/t520/dsdt.asl b/src/mainboard/lenovo/t520/dsdt.asl index aaa0338..c51bde3 100644 --- a/src/mainboard/lenovo/t520/dsdt.asl +++ b/src/mainboard/lenovo/t520/dsdt.asl @@ -56,7 +56,7 @@ DefinitionBlock( */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } /* Chipset specific sleep states */ diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb index 7db65c7..374a399 100644 --- a/src/mainboard/lenovo/t530/devicetree.cb +++ b/src/mainboard/lenovo/t530/devicetree.cb @@ -96,7 +96,7 @@ chip northbridge/intel/sandybridge register "dock_event_enable" = "0x01" end - chip drivers/pc80/tpm + chip drivers/tpm device pnp 0c31.0 on end end diff --git a/src/mainboard/lenovo/t530/dsdt.asl b/src/mainboard/lenovo/t530/dsdt.asl index aaa0338..c51bde3 100644 --- a/src/mainboard/lenovo/t530/dsdt.asl +++ b/src/mainboard/lenovo/t530/dsdt.asl @@ -56,7 +56,7 @@ DefinitionBlock( */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } /* Chipset specific sleep states */ diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb index 2374554..7ac1678 100644 --- a/src/mainboard/lenovo/x201/devicetree.cb +++ b/src/mainboard/lenovo/x201/devicetree.cb @@ -150,7 +150,7 @@ chip northbridge/intel/nehalem # DLPC, not connected device pnp 164e.19 off end end - chip drivers/pc80/tpm + chip drivers/tpm device pnp 0c31.0 on end end end diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl index 19096fd..52ffb8b 100644 --- a/src/mainboard/lenovo/x201/dsdt.asl +++ b/src/mainboard/lenovo/x201/dsdt.asl @@ -90,7 +90,7 @@ DefinitionBlock( */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } /* Chipset specific sleep states */ diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c index 53032f6..ebc9395 100644 --- a/src/mainboard/lenovo/x201/romstage.c +++ b/src/mainboard/lenovo/x201/romstage.c @@ -33,7 +33,7 @@ #include <timestamp.h> #include <arch/acpi.h> #include <cbmem.h> -#include <tpm.h> +#include <tpm/tspi.h> #include "gpio.h" #include "dock.h" diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb index 9f25658..31618de 100644 --- a/src/mainboard/lenovo/x220/devicetree.cb +++ b/src/mainboard/lenovo/x220/devicetree.cb @@ -126,7 +126,7 @@ chip northbridge/intel/sandybridge register "dock_event_enable" = "0x01" end - chip drivers/pc80/tpm + chip drivers/tpm device pnp 0c31.0 on end end diff --git a/src/mainboard/lenovo/x220/dsdt.asl b/src/mainboard/lenovo/x220/dsdt.asl index aaa0338..c51bde3 100644 --- a/src/mainboard/lenovo/x220/dsdt.asl +++ b/src/mainboard/lenovo/x220/dsdt.asl @@ -56,7 +56,7 @@ DefinitionBlock( */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } /* Chipset specific sleep states */ diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb index 37d53d4..9676156 100644 --- a/src/mainboard/lenovo/x230/devicetree.cb +++ b/src/mainboard/lenovo/x230/devicetree.cb @@ -126,7 +126,7 @@ chip northbridge/intel/sandybridge register "dock_event_enable" = "0x01" end - chip drivers/pc80/tpm + chip drivers/tpm device pnp 0c31.0 on end end diff --git a/src/mainboard/lenovo/x230/dsdt.asl b/src/mainboard/lenovo/x230/dsdt.asl index b9575f0..109ccd2 100644 --- a/src/mainboard/lenovo/x230/dsdt.asl +++ b/src/mainboard/lenovo/x230/dsdt.asl @@ -55,7 +55,7 @@ DefinitionBlock( */ Scope (\_SB.PCI0.LPCB) { - #include <drivers/pc80/tpm/acpi/tpm.asl> + #include <drivers/tpm/acpi/tpm.asl> } diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index 650c8d7..cf45a4b 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -28,7 +28,7 @@ #include <cbmem.h> #include <console/console.h> #include <bootmode.h> -#include <tpm.h> +#include <tpm/tspi.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit.h> #include <northbridge/intel/sandybridge/raminit_native.h> diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index 738f1ff..57ed237 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -37,7 +37,7 @@ #include <arch/cpu.h> #include <cpu/x86/msr.h> #include <halt.h> -#include <tpm.h> +#include <tpm/tpm.h> #if CONFIG_DRIVERS_UART_8250IO #include <superio/smsc/lpc47n207/lpc47n207.h> #endif diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c index df0c5bb..4d1b759 100644 --- a/src/northbridge/intel/sandybridge/romstage.c +++ b/src/northbridge/intel/sandybridge/romstage.c @@ -28,7 +28,9 @@ #include <device/pci_def.h> #include <device/device.h> #include <halt.h> -#include <tpm.h> +#include <tpm/tpm.h> +#include <tpm/tspi.h> +#include "raminit_native.h" #include <northbridge/intel/sandybridge/chip.h> #include "southbridge/intel/bd82x6x/pch.h" #include <southbridge/intel/common/gpio.h> diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index 3668235..b4aea0d 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -29,7 +29,7 @@ #include <romstage_handoff.h> #include <stage_cache.h> #include <timestamp.h> -#include <tpm.h> +#include <tpm/tspi.h> #include <vendorcode/google/chromeos/chromeos.h> #include <soc/gpio.h> #include <soc/iomap.h> diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index 5f2a1ce..d13c22a 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -42,7 +42,7 @@ #include <soc/romstage.h> #include <soc/smm.h> #include <soc/spi.h> -#include <tpm.h> +#include <tpm/tspi.h> void program_base_addresses(void) { diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index 762758d..a92f263 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -25,7 +25,7 @@ #include <cbmem.h> #include <cpu/x86/mtrr.h> #include <elog.h> -#include <tpm.h> +#include <tpm/tspi.h> #include <romstage_handoff.h> #include <stage_cache.h> #include <timestamp.h> diff --git a/src/vendorcode/google/chromeos/vboot2/antirollback.c b/src/vendorcode/google/chromeos/vboot2/antirollback.c index 654fd34..1f6c696 100644 --- a/src/vendorcode/google/chromeos/vboot2/antirollback.c +++ b/src/vendorcode/google/chromeos/vboot2/antirollback.c @@ -9,8 +9,8 @@ #include <antirollback.h> #include <stdlib.h> #include <string.h> -#include <tpm_lite/tlcl.h> -#include <tpm_lite/tss_constants.h> +#include <tpm/tss.h> +#include <tpm/tss_constants.h> #include <vb2_api.h> #ifndef offsetof

1 0

Patch set updated for coreboot: TPM: Add option to read PCRs after TPM initialization
by Georg Wicherski 14 Mar '16

14 Mar '16

Georg Wicherski (gw(a)oxff.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14009 -gerrit commit 80eb817fb874d521d382e03370b179c4156bc054 Author: Georg Wicherski <gw(a)oxff.net> Date: Wed Mar 9 17:21:31 2016 +0100 TPM: Add option to read PCRs after TPM initialization Coreboot may be used on platforms using "Measured Boot". This change adds an option to read and print all PCRs right after initialization for identifying "Measured Boot" on a mainboard and determining the resulting initial PCR stage (depending on the bootblock). This works as expected on my Auron Paine, which apparently does not have "Measured Boot" and reports PCR contents as defined in the TPM TIS 1.2 (0s and -1s). Add new Kconfig TPM_READ_INIT_PCRS and tlcl_pcr_read depending on the former (which is then invoked in init_tpm). Change-Id: I79e7fdc97d500228aa574fe344ad7ac1cb0dfe64 Signed-off-by: Georg Wicherski <gw(a)oxff.net> --- src/drivers/tpm/lpc/Kconfig | 11 +++++++++++ src/include/tpm/tss.h | 5 +++++ src/lib/tpm/tspi.c | 35 +++++++++++++++++++++++++++++++++++ src/lib/tpm/tss.c | 23 ++++++++++++++++++++--- 4 files changed, 71 insertions(+), 3 deletions(-) diff --git a/src/drivers/tpm/lpc/Kconfig b/src/drivers/tpm/lpc/Kconfig index e377e99..ec17782 100644 --- a/src/drivers/tpm/lpc/Kconfig +++ b/src/drivers/tpm/lpc/Kconfig @@ -13,6 +13,17 @@ config LPC_TPM If unsure, say N. +config TPM_READ_INIT_PCRS + bool "Read PCR values after initialization" + depends on LPC_TPM + default n + help + Read (and print) initial PCR values at end of TPM initialization. + This is useful for identifying "Measured Boot" and verifying that + the TPM is adhering to TPM TIS 1.2 PCR initial values. + + If unsure, say N. + config TPM_TIS_BASE_ADDRESS hex default 0xfed40000 diff --git a/src/include/tpm/tss.h b/src/include/tpm/tss.h index 04ad9b3..b940e9c 100644 --- a/src/include/tpm/tss.h +++ b/src/include/tpm/tss.h @@ -129,6 +129,11 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest, uint8_t *out_digest); /** + * Read current PCR digest + */ +uint32_t tlcl_pcr_read(int pcr_num, uint8_t *out_digest); + +/** * Get the entire set of permanent flags. */ uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS *pflags); diff --git a/src/lib/tpm/tspi.c b/src/lib/tpm/tspi.c index 0114af8..0d9c6aa 100644 --- a/src/lib/tpm/tspi.c +++ b/src/lib/tpm/tspi.c @@ -19,8 +19,40 @@ #include <reset.h> #include <tpm/tss.h> +#define TPM_PCR_DIGEST_LENGTH 20 #include <tpm/tspi.h> +static inline void _debug_init_pcrs(void) +{ + uint32_t result; + int pcr_index; + uint8_t digest[TPM_PCR_DIGEST_LENGTH]; + + for (pcr_index = 0; pcr_index < 24; ++pcr_index) { + int digest_offset; + + result = tlcl_pcr_read(pcr_index, digest); + + if (result != TPM_SUCCESS) { + printk(BIOS_DEBUG, + "TPM: reading PCR %i failed\n", + pcr_index); + continue; + } + + printk(BIOS_SPEW, "TPM: PCR %i value is ", + pcr_index); + for (digest_offset = 0; + digest_offset < TPM_PCR_DIGEST_LENGTH; + ++digest_offset) { + printk(BIOS_SPEW, "%02x%c", + digest[digest_offset], + digest_offset < TPM_PCR_DIGEST_LENGTH - 1 ? + ':' : '\n'); + } + } +} + void init_tpm(int s3resume) { u32 result = 0; @@ -76,6 +108,9 @@ void init_tpm(int s3resume) } if (result == TPM_SUCCESS) { + if (IS_ENABLED(CONFIG_TPM_READ_INIT_PCRS)) + _debug_init_pcrs(); + printk(BIOS_SPEW, "TPM: OK.\n"); return; } diff --git a/src/lib/tpm/tss.c b/src/lib/tpm/tss.c index a22aa15..8f38504 100644 --- a/src/lib/tpm/tss.c +++ b/src/lib/tpm/tss.c @@ -116,7 +116,7 @@ return result; uint32_t tlcl_send_receive(const uint8_t *request, uint8_t *response, int max_length) { uint32_t result = tlcl_send_receive_no_retry(request, response, - max_length); + max_length); /* If the command fails because the self test has not completed, try it * again after attempting to ensure that the self test has completed. */ if (result == TPM_E_NEEDS_SELFTEST || result == TPM_E_DOING_SELFTEST) { @@ -303,7 +303,7 @@ uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS *pflags) from_tpm_uint32(response + kTpmResponseHeaderLength, &size); assert(size == sizeof(TPM_PERMANENT_FLAGS)); memcpy(pflags, response + kTpmResponseHeaderLength + sizeof(size), - sizeof(TPM_PERMANENT_FLAGS)); + sizeof(TPM_PERMANENT_FLAGS)); return result; } @@ -351,6 +351,23 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest, if (out_digest) memcpy(out_digest, response + kTpmResponseHeaderLength, - kPcrDigestLength); + kPcrDigestLength); + return result; +} + +uint32_t tlcl_pcr_read(int pcr_num, uint8_t *out_digest) +{ + struct s_tpm_pcr_read_cmd cmd; + uint8_t response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; + uint32_t result; + + memcpy(&cmd, &tpm_pcr_read_cmd, sizeof(cmd)); + to_tpm_uint32(cmd.buffer + tpm_pcr_read_cmd.pcrNum, pcr_num); + + result = tlcl_send_receive(cmd.buffer, response, sizeof(response)); + if (result == TPM_SUCCESS) + memcpy(out_digest, response + kTpmResponseHeaderLength, + kPcrDigestLength); + return result; }

1 0

Patch set updated for coreboot: TPM: add measurement code
by Georg Wicherski 14 Mar '16

14 Mar '16

Georg Wicherski (gw(a)oxff.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14038 -gerrit commit 29ec80eb8edfbdba19c242d91a3465b3ecdc4e97 Author: Georg Wicherski <gw(a)oxff.net> Date: Fri Mar 11 17:53:01 2016 +0100 TPM: add measurement code WORK IN PROGRESS Measure ramstage, PCI option ROMs, and payload, extend PCRs. Change-Id: I1c15108e4a27e9929ae02c6409c3cae0bda073a5 --- src/device/pci_device.c | 12 ++- src/drivers/tpm/lpc/Kconfig | 40 ++++++++ src/include/tpm/tspi.h | 23 +++++ src/lib/prog_loaders.c | 13 ++- src/lib/tpm/Makefile.inc | 5 + src/lib/tpm/sha1.c | 222 ++++++++++++++++++++++++++++++++++++++++++++ src/lib/tpm/tspi.c | 48 +++++++++- 7 files changed, 356 insertions(+), 7 deletions(-) diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 5123229..0301ac7 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -42,6 +42,7 @@ #include <pc80/i8259.h> #include <kconfig.h> #include <vendorcode/google/chromeos/chromeos.h> +#include <tpm/tspi.h> u8 pci_moving_config8(struct device *dev, unsigned int reg) { @@ -711,10 +712,19 @@ void pci_dev_init(struct device *dev) ram = pci_rom_load(dev, rom); if (ram == NULL) return; + + if (IS_ENABLED(CONFIG_TPM_MEASURE_VGA_ROM)) { + char rom_name[64]; + snprintf(rom_name, sizeof (rom_name), + "Option ROM %s", + dev_path(dev)); + measure_thing((uint8_t *) ram, + ram->size * 512, 2, rom_name); + } if (!should_run_oprom(dev)) return; - + run_bios(dev, (unsigned long)ram); gfx_set_init_done(1); printk(BIOS_DEBUG, "VGA Option ROM was run\n"); diff --git a/src/drivers/tpm/lpc/Kconfig b/src/drivers/tpm/lpc/Kconfig index ec17782..595db12 100644 --- a/src/drivers/tpm/lpc/Kconfig +++ b/src/drivers/tpm/lpc/Kconfig @@ -13,6 +13,46 @@ config LPC_TPM If unsure, say N. +config TPM_MEASURE + bool "Enable TPM PCR measurements" + depends on LPC_TPM + default n + help + Add code to compute SHA1 digests on coreboot components and the + payload; extend appropriate PCRs with these digests. + + If unsure, say N. + +config TPM_MEASURE_RAMSTAGE + bool "Measure the coreboot ramstage" + depends on TPM_MEASURE + default n + help + Compute SHA1 digest on the ramstage after loading it. Extend PCR[0] + with the digest. + + If unsure, say N. + +config TPM_MEASURE_VGA_ROM + bool "Measure PCI option ROMs" + depends on TPM_MEASURE && VGA_ROM_RUN + default n + help + Compute SHA1 digest on any option ROM after loading it. Extend PCR[2] + with the digest. Also measures ROMs that are not actually run. + + If unsure, say N. + +config TPM_MEASURE_PAYLOAD + bool "Measure the coreboot payload" + depends on TPM_MEASURE + default n + help + Compute SHA1 digest on the payload as it is found in memory just + before mirroring it. Extend PCR[4] with the digest. + + If unsure, say N. + config TPM_READ_INIT_PCRS bool "Read PCR values after initialization" depends on LPC_TPM diff --git a/src/include/tpm/tspi.h b/src/include/tpm/tspi.h index ba2f119..8c4b11b 100644 --- a/src/include/tpm/tspi.h +++ b/src/include/tpm/tspi.h @@ -17,10 +17,33 @@ #ifndef TPM_TSPI_H #define TPM_TSPI_H +#include <stdint.h> +#include <program_loading.h> + /** * TSPI Implementation for coreboot without vboot2 */ void init_tpm(int s3resume); +/** + * Compute SHA1 digest on arbitrary memory contents and + * extend requested PCR with the digest. + */ +void measure_thing(const uint8_t * data, size_t size, int pcr, + const char *thing_name); + +/** + * Compute SHA1 digest on program memory contents and + * extend requested PCR with the digest. + * + * Wraps measure_thing . + */ +void measure_prog(struct prog *program, int pcr, const char *prog_name); + + +#define SHA1_BLOCK_LENGTH 64 +#define SHA1_DIGEST_LENGTH 20 +u8 *sha1(const u8 *data, unsigned long len, u8 *buf); + #endif /* TPM_TSPI_H */ diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 14e1299..c67882a 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -28,6 +28,7 @@ #include <stage_cache.h> #include <symbols.h> #include <timestamp.h> +#include <tpm/tspi.h> /* Only can represent up to 1 byte less than size_t. */ const struct mem_region_device addrspace_32bit = MEM_REGION_DEV_INIT(0, ~0UL); @@ -53,7 +54,7 @@ void run_romstage(void) if (prog_locate(&romstage)) goto fail; - + timestamp_add_now(TS_START_COPYROM); if (cbfs_prog_stage_load(&romstage)) @@ -115,8 +116,12 @@ void run_ramstage(void) if (prog_locate(&ramstage)) goto fail; - timestamp_add_now(TS_START_COPYRAM); + if (IS_ENABLED(CONFIG_TPM_MEASURE_RAMSTAGE)) { + measure_prog(&ramstage, 0, "coreboot ramstage"); + } + timestamp_add_now(TS_START_COPYRAM); + if (IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) { if (load_relocatable_ramstage(&ramstage)) goto fail; @@ -151,6 +156,10 @@ void payload_load(void) if (prog_locate(payload)) goto out; + + if (IS_ENABLED(CONFIG_TPM_MEASURE_PAYLOAD)) { + measure_prog(payload, 4, "coreboot payload"); + } mirror_payload(payload); diff --git a/src/lib/tpm/Makefile.inc b/src/lib/tpm/Makefile.inc index 81a3eb9..60bdfa2 100644 --- a/src/lib/tpm/Makefile.inc +++ b/src/lib/tpm/Makefile.inc @@ -1,10 +1,15 @@ ifneq ($(CONFIG_CHROMEOS),y) romstage-$(CONFIG_LPC_TPM) += tss.c tspi.c ramstage-$(CONFIG_LPC_TPM) += tss.c tspi.c +bootblock-$(CONFIG_LPC_TPM) += tss.c tspi.c else romstage-$(CONFIG_LPC_TPM) += tspi.c endif +bootblock-$(CONFIG_TPM_MEASURE) += sha1.c +romstage-$(CONFIG_TPM_MEASURE) += sha1.c +ramstage-$(CONFIG_TPM_MEASURE) += sha1.c + ifeq ($(MOCK_TPM),1) libverstage-y += mocked_tss.c else diff --git a/src/lib/tpm/sha1.c b/src/lib/tpm/sha1.c new file mode 100644 index 0000000..2f1f9a6 --- /dev/null +++ b/src/lib/tpm/sha1.c @@ -0,0 +1,222 @@ +/* + * This file was copied from the libpayload project. + * + * It has originally been taken from the OpenBSD project. + */ + +/* $OpenBSD: sha1.c,v 1.20 2005/08/08 08:05:35 espie Exp $ */ + +/* + * SHA-1 in C + * By Steve Reid <steve(a)edmweb.com> + * 100% Public Domain + * + * Test Vectors (from FIPS PUB 180-1) + * "abc" + * A9993E36 4706816A BA3E2571 7850C26C 9CD0D89D + * "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq" + * 84983E44 1C3BD26E BAAE4AA1 F95129E5 E54670F1 + * A million repetitions of "a" + * 34AA973C D4C4DAA4 F61EEB2B DBAD2731 6534016F + */ + +#include <tpm/tspi.h> +#include <string.h> + +typedef u8 u_int8_t; +typedef u32 u_int32_t; +typedef u64 u_int64_t; +typedef unsigned int u_int; + +typedef struct { + u32 state[5]; + u64 count; + u8 buffer[SHA1_BLOCK_LENGTH]; +} SHA1_CTX; + + +#define LITTLE_ENDIAN 1234 +#define BIG_ENDIAN 4321 + +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +#define BYTE_ORDER LITTLE_ENDIAN +#else +#define BYTE_ORDER BIG_ENDIAN +#endif + +#define rol(value, bits) (((value) << (bits)) | ((value) >> (32 - (bits)))) + +/* + * blk0() and blk() perform the initial expand. + * I got the idea of expanding during the round function from SSLeay + */ +#if BYTE_ORDER == LITTLE_ENDIAN +# define blk0(i) (block->l[i] = (rol(block->l[i],24)&0xFF00FF00) \ + |(rol(block->l[i],8)&0x00FF00FF)) +#else +# define blk0(i) block->l[i] +#endif +#define blk(i) (block->l[i&15] = rol(block->l[(i+13)&15]^block->l[(i+8)&15] \ + ^block->l[(i+2)&15]^block->l[i&15],1)) + +/* + * (R0+R1), R2, R3, R4 are the different operations (rounds) used in SHA1 + */ +#define R0(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk0(i)+0x5A827999+rol(v,5);w=rol(w,30); +#define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30); +#define R2(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0x6ED9EBA1+rol(v,5);w=rol(w,30); +#define R3(v,w,x,y,z,i) z+=(((w|x)&y)|(w&x))+blk(i)+0x8F1BBCDC+rol(v,5);w=rol(w,30); +#define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); + +/* + * Hash a single 512-bit block. This is the core of the algorithm. + */ +static void +SHA1Transform(u_int32_t state[5], const u_int8_t buffer[SHA1_BLOCK_LENGTH]) +{ + u_int32_t a, b, c, d, e; + u_int8_t workspace[SHA1_BLOCK_LENGTH]; + typedef union { + u_int8_t c[64]; + u_int32_t l[16]; + } CHAR64LONG16; + CHAR64LONG16 *block = (CHAR64LONG16 *)workspace; + + (void)memcpy(block, buffer, SHA1_BLOCK_LENGTH); + + /* Copy context->state[] to working vars */ + a = state[0]; + b = state[1]; + c = state[2]; + d = state[3]; + e = state[4]; + + /* 4 rounds of 20 operations each. Loop unrolled. */ + R0(a,b,c,d,e, 0); R0(e,a,b,c,d, 1); R0(d,e,a,b,c, 2); R0(c,d,e,a,b, 3); + R0(b,c,d,e,a, 4); R0(a,b,c,d,e, 5); R0(e,a,b,c,d, 6); R0(d,e,a,b,c, 7); + R0(c,d,e,a,b, 8); R0(b,c,d,e,a, 9); R0(a,b,c,d,e,10); R0(e,a,b,c,d,11); + R0(d,e,a,b,c,12); R0(c,d,e,a,b,13); R0(b,c,d,e,a,14); R0(a,b,c,d,e,15); + R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19); + R2(a,b,c,d,e,20); R2(e,a,b,c,d,21); R2(d,e,a,b,c,22); R2(c,d,e,a,b,23); + R2(b,c,d,e,a,24); R2(a,b,c,d,e,25); R2(e,a,b,c,d,26); R2(d,e,a,b,c,27); + R2(c,d,e,a,b,28); R2(b,c,d,e,a,29); R2(a,b,c,d,e,30); R2(e,a,b,c,d,31); + R2(d,e,a,b,c,32); R2(c,d,e,a,b,33); R2(b,c,d,e,a,34); R2(a,b,c,d,e,35); + R2(e,a,b,c,d,36); R2(d,e,a,b,c,37); R2(c,d,e,a,b,38); R2(b,c,d,e,a,39); + R3(a,b,c,d,e,40); R3(e,a,b,c,d,41); R3(d,e,a,b,c,42); R3(c,d,e,a,b,43); + R3(b,c,d,e,a,44); R3(a,b,c,d,e,45); R3(e,a,b,c,d,46); R3(d,e,a,b,c,47); + R3(c,d,e,a,b,48); R3(b,c,d,e,a,49); R3(a,b,c,d,e,50); R3(e,a,b,c,d,51); + R3(d,e,a,b,c,52); R3(c,d,e,a,b,53); R3(b,c,d,e,a,54); R3(a,b,c,d,e,55); + R3(e,a,b,c,d,56); R3(d,e,a,b,c,57); R3(c,d,e,a,b,58); R3(b,c,d,e,a,59); + R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); + R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); + R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); + R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); + R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); + + /* Add the working vars back into context.state[] */ + state[0] += a; + state[1] += b; + state[2] += c; + state[3] += d; + state[4] += e; + + /* Wipe variables */ + a = b = c = d = e = 0; +} + + +/* + * SHA1Init - Initialize new context + */ +static void +SHA1Init(SHA1_CTX *context) +{ + + /* SHA1 initialization constants */ + context->count = 0; + context->state[0] = 0x67452301; + context->state[1] = 0xEFCDAB89; + context->state[2] = 0x98BADCFE; + context->state[3] = 0x10325476; + context->state[4] = 0xC3D2E1F0; +} + + +/* + * Run your data through this. + */ +static void +SHA1Update(SHA1_CTX *context, const u_int8_t *data, unsigned long len) +{ + size_t i, j; + + j = (size_t)((context->count >> 3) & 63); + context->count += (len << 3); + if ((j + len) > 63) { + (void)memcpy(&context->buffer[j], data, (i = 64-j)); + SHA1Transform(context->state, context->buffer); + for ( ; i + 63 < len; i += 64) + SHA1Transform(context->state, (u_int8_t *)&data[i]); + j = 0; + } else { + i = 0; + } + (void)memcpy(&context->buffer[j], &data[i], len - i); +} + + +/* + * Add padding and return the message digest. + */ +static void +SHA1Pad(SHA1_CTX *context) +{ + u_int8_t finalcount[8]; + u_int i; + + for (i = 0; i < 8; i++) { + finalcount[i] = (u_int8_t)((context->count >> + ((7 - (i & 7)) * 8)) & 255); /* Endian independent */ + } + SHA1Update(context, (u_int8_t *)"\200", 1); + while ((context->count & 504) != 448) + SHA1Update(context, (u_int8_t *)"\0", 1); + SHA1Update(context, finalcount, 8); /* Should cause a SHA1Transform() */ +} + +static void +SHA1Final(u_int8_t digest[SHA1_DIGEST_LENGTH], SHA1_CTX *context) +{ + u_int i; + + SHA1Pad(context); + if (digest) { + for (i = 0; i < SHA1_DIGEST_LENGTH; i++) { + digest[i] = (u_int8_t) + ((context->state[i>>2] >> ((3-(i & 3)) * 8) ) & 255); + } + memset(context, 0, sizeof(*context)); + } +} + +/** + * Compute the SHA-1 hash of the given data as specified by the 'data' and + * 'len' arguments, and place the result -- 160 bits (20 bytes) -- into the + * specified output buffer 'buf'. + * + * @param data Pointer to the input data that shall be hashed. + * @param len Length of the input data (in bytes). + * @param buf Buffer which will hold the resulting hash (must be at + * least 20 bytes in size). + * @return Pointer to the output buffer where the hash is stored. + */ +u8 *sha1(const u8 *data, unsigned long len, u8 *buf) +{ + SHA1_CTX ctx; + + SHA1Init(&ctx); + SHA1Update(&ctx, data, len); + SHA1Final(buf, &ctx); + + return buf; +} diff --git a/src/lib/tpm/tspi.c b/src/lib/tpm/tspi.c index 0d9c6aa..bd3025b 100644 --- a/src/lib/tpm/tspi.c +++ b/src/lib/tpm/tspi.c @@ -19,14 +19,13 @@ #include <reset.h> #include <tpm/tss.h> -#define TPM_PCR_DIGEST_LENGTH 20 #include <tpm/tspi.h> static inline void _debug_init_pcrs(void) { uint32_t result; int pcr_index; - uint8_t digest[TPM_PCR_DIGEST_LENGTH]; + uint8_t digest[SHA1_DIGEST_LENGTH]; for (pcr_index = 0; pcr_index < 24; ++pcr_index) { int digest_offset; @@ -43,11 +42,11 @@ static inline void _debug_init_pcrs(void) printk(BIOS_SPEW, "TPM: PCR %i value is ", pcr_index); for (digest_offset = 0; - digest_offset < TPM_PCR_DIGEST_LENGTH; + digest_offset < SHA1_DIGEST_LENGTH; ++digest_offset) { printk(BIOS_SPEW, "%02x%c", digest[digest_offset], - digest_offset < TPM_PCR_DIGEST_LENGTH - 1 ? + digest_offset < SHA1_DIGEST_LENGTH - 1 ? ':' : '\n'); } } @@ -125,3 +124,44 @@ void init_tpm(int s3resume) hard_reset(); } } + +void measure_thing(const uint8_t * data, size_t size, int pcr, + const char *thing_name) +{ + uint8_t digest[SHA1_DIGEST_LENGTH]; + + sha1(data, size, digest); + + printk(BIOS_DEBUG, "TPM: Digest for \"%s\": ", + thing_name); + for(size = 0; size < SHA1_DIGEST_LENGTH; ++size) { + printk(BIOS_SPEW, "%02x%c", + digest[size], + size < SHA1_DIGEST_LENGTH - 1 ? + ':' : '\n'); + } + + if (tlcl_extend(pcr, digest, digest) == TPM_SUCCESS) { + printk(BIOS_DEBUG, "TPM: PCR[%i] after extension: ", pcr); + + for(size = 0; size < SHA1_DIGEST_LENGTH; ++size) { + printk(BIOS_SPEW, "%02x%c", + digest[size], + size < SHA1_DIGEST_LENGTH - 1 ? + ':' : '\n'); + } + } +} + +void measure_prog(struct prog *program, int pcr, const char *prog_name) { + const uint8_t * start; + size_t size; + + start = prog_start(program); + size = prog_size(program); + + printk(BIOS_DEBUG, "TPM: Measuring program \"%s\" at %p (%lx bytes)\n", + prog_name, start, size); + + return measure_thing(start, size, pcr, prog_name); +}

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coreboot-gerrit March 2016