coreboot-gerrit March 2016

coreboot-gerrit@coreboot.org

1 participants
1119 discussions

Patch set updated for coreboot: mediatek/mt8173: Add mt6311 driver
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14121 -gerrit commit 6c03a9fbee4911c3e219364dea41f1a979e7035a Author: henryc.chen <henryc.chen(a)mediatek.com> Date: Wed Mar 2 15:49:52 2016 +0800 mediatek/mt8173: Add mt6311 driver Add secondary PMIC for external buck control on Oak rev3/4 BRANCH=none BUG=none TEST=verified on Oak rev4/rev5 Change-Id: I24c18a1cf71fc57deacedcbeb6a100b131c28077 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 7f7f8ceac795d8193194a6918a73c4b391009025 Original-Change-Id: I312d8281d2c09d8bc43f092edef3e405d51ee7d0 Original-Signed-off-by: henryc.chen <henryc.chen(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/332341 Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- src/soc/mediatek/mt8173/Makefile.inc | 1 + src/soc/mediatek/mt8173/include/soc/mt6311.h | 52 +++++++++++ src/soc/mediatek/mt8173/mt6311.c | 131 +++++++++++++++++++++++++++ 3 files changed, 184 insertions(+) diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc old mode 100644 new mode 100755 index e18e6fe..6ba533a --- a/src/soc/mediatek/mt8173/Makefile.inc +++ b/src/soc/mediatek/mt8173/Makefile.inc @@ -66,6 +66,7 @@ ramstage-y += soc.c mtcmos.c ramstage-y += timer.c ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += pmic_wrap.c mt6391.c i2c.c +ramstage-y += mt6311.c ramstage-y += gpio.c ramstage-y += wdt.c ramstage-y += pll.c diff --git a/src/soc/mediatek/mt8173/include/soc/mt6311.h b/src/soc/mediatek/mt8173/include/soc/mt6311.h new file mode 100644 index 0000000..3b0b79a --- /dev/null +++ b/src/soc/mediatek/mt8173/include/soc/mt6311.h @@ -0,0 +1,52 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __SOC_MEDIATEK_MT8173_MT6311_H__ +#define __SOC_MEDIATEK_MT8173_MT6311_H__ + +void mt6311_probe(uint8_t i2c_num); + +enum { + MT6311_CID = 0x0, + MT6311_SWCID = 0x1, + MT6311_GPIO_MODE = 0x04, + MT6311_TOP_CON = 0x0A, + MT6311_TOP_RST_CON = 0x15, + MT6311_TOP_INT_CON = 0x18, + MT6311_STRUP_CON5 = 0x1F, + MT6311_EFUSE_DOUT_56_63 = 0x40, + MT6311_EFUSE_DOUT_64_71 = 0x41, + MT6311_BUCK_ALL_CON23 = 0x69, + MT6311_STRUP_ANA_CON1 = 0x6D, + MT6311_STRUP_ANA_CON2 = 0x6E, + MT6311_VDVFS1_ANA_CON10 = 0x84, + MT6311_VDVFS11_CON7 = 0x88, + MT6311_VDVFS11_CON9 = 0x8A, + MT6311_VDVFS11_CON10 = 0x8B, + MT6311_VDVFS11_CON11 = 0x8C, + MT6311_VDVFS11_CON12 = 0x8D, + MT6311_VDVFS11_CON13 = 0x8E, + MT6311_VDVFS11_CON14 = 0x8F, + MT6311_VDVFS11_CON19 = 0x94, + MT6311_LDO_CON3 = 0xCF, +}; + +enum { + MT6311_E1_CID_CODE = 0x0110, + MT6311_E2_CID_CODE = 0x0120, + MT6311_E3_CID_CODE = 0x0130, +}; + +#endif diff --git a/src/soc/mediatek/mt8173/mt6311.c b/src/soc/mediatek/mt8173/mt6311.c new file mode 100644 index 0000000..8390dfd --- /dev/null +++ b/src/soc/mediatek/mt8173/mt6311.c @@ -0,0 +1,131 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <device/i2c.h> +#include <soc/mt6311.h> + +enum { + MT6311_SLAVE_ADDR = 0x6B, +}; + +static u32 get_mt6311_chip_id(uint8_t i2c_num) +{ + unsigned char id[2] = {0}; + + i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_CID, + &id[0], 0xFF, 0); + i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_SWCID, + &id[1], 0xFF, 0); + + return (u32)(id[0] << 8 | id[1]); +} + +static void mt6311_hw_init(uint8_t i2c_num) +{ + int ret = 0; + unsigned char var[3] = {0}; + + + /* + * Phase Shedding Trim Software Setting + * The phase 2 of MT6311 will enter PWM mode if the threshold is + * reached. + * The threshold is set according to EFUSE value. + */ + ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_EFUSE_DOUT_56_63, &var[0], + 0x3, 1); + ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_EFUSE_DOUT_56_63, &var[1], + 0x1, 7); + ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_EFUSE_DOUT_64_71, &var[2], + 0x1, 0); + + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS1_ANA_CON10, + var[0] | var[1] << 2 | var[2] << 3, 0xf, 0); + + /* I2C_CONFIG; pushpull setting, Opendrain is '0' */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_TOP_INT_CON, + 0x1, 0x1, 2); + /* RG_WDTRSTB_EN; CC, initial WDRSTB setting. */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_TOP_RST_CON, + 0x1, 0x1, 5); + /* initial INT function */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_GPIO_MODE, + 0x1, 0x7, 3); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_STRUP_CON5, + 0, 1 << 2 | 1 << 1 | 1 << 0, 0); + + /* Vo max is 1.15V */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_STRUP_ANA_CON1, 0x3, 0x3, 5); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_BUCK_ALL_CON23, 0x1, 0x1, 0); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_STRUP_ANA_CON2, 0x3, 0x3, 0); + /* Suspend HW control from SPM */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_TOP_CON, 0x1, 0x1, 0); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON7, 0x1, 0x1, 0); + /* default VDVFS power on */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON9, 0x1, 0x1, 0); + /* for DVFS slew rate rising=0.67us */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON10, 0x1, 0x7f, 0); + /* for DVFS slew rate, falling 2.0us */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON11, 0x5, 0x7f, 0); + /* default VDVFS11_VOSEL 1.0V, SW control */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON12, 0x40, 0x7f, 0); + /* default VDVFS11_VOSEL_ON 1.0V, HW control */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON13, 0x40, 0x7f, 0); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON14, 0x40, 0x7f, 0); + /* for DVFS sof change, falling 50us */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON19, 0x3, 0x3, 0); + /* for DVFS sof change, falling only */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON19, 0x1, 0x3, 4); + /* OFF LDO */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_LDO_CON3, 0, 0x1, 0); + + if (ret) + printk(BIOS_ERR, "ERROR: %s failed\n", __func__); +} + +void mt6311_probe(uint8_t i2c_num) +{ + u32 val = 0; + + /* Check device ID is MT6311 */ + val = get_mt6311_chip_id(i2c_num); + printk(BIOS_INFO, "%s: device ID = %#x\n", __func__, val); + + if (val < MT6311_E1_CID_CODE) { + printk(BIOS_ERR, "ERROR: unknown MT6311 device_id\n"); + return; + } + + mt6311_hw_init(i2c_num); +}

1 0

Patch set updated for coreboot: mediatek/mt8173: Add da9212 driver
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14122 -gerrit commit d43eb18317311d510429707251f11048a785d73f Author: henryc.chen <henryc.chen(a)mediatek.com> Date: Wed Mar 2 15:51:44 2016 +0800 mediatek/mt8173: Add da9212 driver Add secondary PMIC for external buck control on Oak rev0/1/2/5 BRANCH=none BUG=none TEST=verified on Oak rev4/rev5 Change-Id: Ia000b0c7d61e8396856656247f9627e33b21b19b Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 241508e7d781fac8ee085ee81962043dd654c52d Original-Change-Id: I6c75e2462363a5523bf1ebb03af7a36740293624 Original-Signed-off-by: henryc.chen <henryc.chen(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/332342 Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- src/soc/mediatek/mt8173/Makefile.inc | 1 + src/soc/mediatek/mt8173/da9212.c | 96 ++++++++++++++++++++++++++++ src/soc/mediatek/mt8173/include/soc/da9212.h | 85 ++++++++++++++++++++++++ 3 files changed, 182 insertions(+) diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc old mode 100755 new mode 100644 index 6ba533a..217cbc3 --- a/src/soc/mediatek/mt8173/Makefile.inc +++ b/src/soc/mediatek/mt8173/Makefile.inc @@ -67,6 +67,7 @@ ramstage-y += timer.c ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += pmic_wrap.c mt6391.c i2c.c ramstage-y += mt6311.c +ramstage-y += da9212.c ramstage-y += gpio.c ramstage-y += wdt.c ramstage-y += pll.c diff --git a/src/soc/mediatek/mt8173/da9212.c b/src/soc/mediatek/mt8173/da9212.c new file mode 100644 index 0000000..8161667 --- /dev/null +++ b/src/soc/mediatek/mt8173/da9212.c @@ -0,0 +1,96 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <device/i2c.h> +#include <soc/da9212.h> + +enum { + DA9212_SLAVE_ADDR = 0x68, +}; + +static void da9212_hw_init(uint8_t i2c_num, unsigned char variant_id) +{ + int ret = 0; + int buck_mode = DA9212_BUCK_MODE_AUTO; + + if (variant_id == DA9212_VARIANT_ID_AB) + buck_mode = DA9212_BUCK_MODE_PWM; + + /* page select to 0 */ + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_PAGE_CON, DA9212_REG_PAGE0, + DA9212_REG_PAGE_MASK, DA9212_REG_PAGE_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKA_CONT, DA9212_BUCK_GPI_GPIO1, + DA9212_BUCK_GPI_MASK, DA9212_BUCK_GPI_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKB_CONT, DA9212_BUCK_GPI_OFF, + DA9212_BUCK_GPI_OFF, DA9212_BUCK_GPI_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKA_CONT, DA9212_VBUCK_SEL_A, + DA9212_VBUCK_SEL_MASK, DA9212_VBUCK_SEL_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKB_CONT, DA9212_VBUCK_SEL_A, + DA9212_VBUCK_SEL_MASK, DA9212_VBUCK_SEL_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKA_CONF, buck_mode, + DA9212_BUCK_MODE_MASK, DA9212_BUCK_MODE_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKB_CONF, buck_mode, + DA9212_BUCK_MODE_MASK, DA9212_BUCK_MODE_SHIFT); + + if (ret) + printk(BIOS_ERR, "ERROR: %s failed\n", __func__); + +} + +void da9212_probe(uint8_t i2c_num) +{ + int ret = 0; + unsigned char device_id = 0; + unsigned char variant_id = 0; + + + /* select to page 4, clear REVERT at first time */ + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_PAGE_CON, DA9212_REG_PAGE4, + 0xF, DA9212_REG_PAGE_SHIFT); + + ret |= i2c_read_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_DEVICE_ID, &device_id, + 0xFF, 0); + + ret |= i2c_read_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_VARIANT_ID, &variant_id, + 0xFF, 0); + + printk(BIOS_INFO, "%s: device ID = %#x, variant ID = %#x\n", __func__, + device_id, variant_id); + + /* Check device ID is DA9212 */ + if (device_id != DA9212_ID || ret) { + printk(BIOS_ERR, "ERROR: unknown DA9212 device_id\n"); + return; + } + + da9212_hw_init(i2c_num, variant_id); +} diff --git a/src/soc/mediatek/mt8173/include/soc/da9212.h b/src/soc/mediatek/mt8173/include/soc/da9212.h new file mode 100644 index 0000000..388958d --- /dev/null +++ b/src/soc/mediatek/mt8173/include/soc/da9212.h @@ -0,0 +1,85 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __SOC_DA9212_H_ +#define __SOC_DA9212_H_ + +void da9212_probe(uint8_t i2c_num); + +enum { + /* Page selection */ + DA9212_REG_PAGE_CON = 0x0, + + /* Regulator Registers */ + DA9212_REG_BUCKA_CONT = 0x5D, + DA9212_REG_BUCKB_CONT = 0x5E, + DA9212_REG_BUCKA_CONF = 0xD1, + DA9212_REG_BUCKB_CONF = 0xD2, +}; + +/* DA9212_REG_PAGE_CON (addr=0x0) */ +enum { + DA9212_REG_PAGE_SHIFT = 0, + DA9212_REG_PAGE_MASK = 0xf +}; + +enum { + DA9212_REG_PAGE0 = 0, + DA9212_REG_PAGE2 = 2, + DA9212_REG_PAGE4 = 4, + DA9212_PAGE_WRITE_MODE = 0x0, + DA9212_REPEAT_WRITE_MODE = 0x40, + DA9212_PAGE_REVERT = 0x80 +}; + +/* DA9212_REG_BUCKA/B_CONT (addr=0x5D/0x5E) */ +enum { + DA9212_BUCK_EN_SHIFT = 0, + DA9212_BUCK_OFF = 0x0, + DA9212_BUCK_ON = 0x1, + DA9212_BUCK_GPI_SHIFT = 1, + DA9212_BUCK_GPI_MASK = 0x3, + DA9212_BUCK_GPI_OFF = 0x0, + DA9212_BUCK_GPI_GPIO0 = 0x1, + DA9212_BUCK_GPI_GPIO1 = 0x2, + DA9212_BUCK_GPI_GPIO4 = 0x3, + DA9212_VBUCK_SEL_SHIFT = 4, + DA9212_VBUCK_SEL_MASK = 0x1, + DA9212_VBUCK_SEL_A = 0x0, + DA9212_VBUCK_SEL_B = 0x1, +}; + +/* DA9212_REG_BUCKA/B_CONF (addr=0xD1/0xD2) */ +enum { + DA9212_BUCK_MODE_SHIFT = 0, + DA9212_BUCK_MODE_MASK = 0x3, + DA9212_BUCK_MODE_MANUAL = 0x0, + DA9212_BUCK_MODE_PFM = 0x1, + DA9212_BUCK_MODE_PWM = 0x2, + DA9212_BUCK_MODE_AUTO = 0x3, +}; + +/* DA9212_REG_CONFIG_E (addr=0x147) */ +enum { + /* DEVICE IDs */ + DA9212_REG_DEVICE_ID = 0x1, + DA9212_ID = 0x22, + DA9213_ID = 0x23, + DA9212_REG_VARIANT_ID = 0x2, + DA9212_VARIANT_ID_AB = 0x10, + DA9212_VARIANT_ID_AC = 0x20 +}; + +#endif

1 0

Patch set updated for coreboot: google/oak: Move external buck initialization to coreboot
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14123 -gerrit commit e25cea96bf7ff085d3bb8077d5b96f3fc010789b Author: henryc.chen <henryc.chen(a)mediatek.com> Date: Fri Mar 11 14:55:30 2016 +0800 google/oak: Move external buck initialization to coreboot Remove the code which is passing parameters to ARMTF and move external buck initilizaton from ARMTF to coreboot. BRANCH=none BUG=none TEST=verified on Oak rev4/rev5 Change-Id: I4f4b30acbee9b42a202b326f2fe4517cb4b9d83c Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 37bec54b4d8a3bce38878e292e4821da3959026a Original-Change-Id: Ib81709812a064f6daf13c9b4d6525f1858c81393 Original-Signed-off-by: henryc.chen <henryc.chen(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/332343 Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- src/mainboard/google/oak/mainboard.c | 70 +++++++++--------------------------- 1 file changed, 17 insertions(+), 53 deletions(-) diff --git a/src/mainboard/google/oak/mainboard.c b/src/mainboard/google/oak/mainboard.c index 192f4b3..4208730 100644 --- a/src/mainboard/google/oak/mainboard.c +++ b/src/mainboard/google/oak/mainboard.c @@ -22,8 +22,9 @@ #include <elog.h> #include <gpio.h> -#include <soc/bl31_plat_params.h> +#include <soc/da9212.h> #include <soc/i2c.h> +#include <soc/mt6311.h> #include <soc/mt6391.h> #include <soc/mtcmos.h> #include <soc/pinmux.h> @@ -31,67 +32,30 @@ #include <soc/usb.h> #include <vendorcode/google/chromeos/chromeos.h> -static void register_da9212_to_bl31(void) -{ -#if IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) - static struct bl31_da9212_param param_da9212 = { - .h = { - .type = PARAM_CLUSTER1_DA9212, - }, - .i2c_bus = 1, - .ic_en = { - .type = PARAM_GPIO_MT6391, - .polarity = PARAM_GPIO_ACTIVE_HIGH, - .index = MT6391_KP_ROW3, - }, - .en_a = { - .type = PARAM_GPIO_MT6391, - .polarity = PARAM_GPIO_ACTIVE_HIGH, - .index = MT6391_KP_ROW4, - }, - .en_b = { - .type = PARAM_GPIO_NONE, - }, - }; - if (board_id() == 2) { - param_da9212.ic_en.type = PARAM_GPIO_SOC; - param_da9212.ic_en.index = PAD_UCTS2; - } - register_bl31_param(&param_da9212.h); - - /* Init i2c bus Timing register for da9212 */ - mtk_i2c_bus_init(param_da9212.i2c_bus); -#endif -} +enum { + CODEC_I2C_BUS = 0, + EXT_BUCK_I2C_BUS = 1, +}; -static void register_mt6311_to_bl31(void) +static void configure_ext_buck(void) { -#if IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) - static struct bl31_mt6311_param param_mt6311 = { - .h = { - .type = PARAM_CLUSTER1_MT6311, - }, - .i2c_bus = 1, - }; - register_bl31_param(&param_mt6311.h); - - /* Init i2c bus Timing register for mt6311 */ - mtk_i2c_bus_init(param_mt6311.i2c_bus); -#endif -} + mtk_i2c_bus_init(EXT_BUCK_I2C_BUS); -static void configure_bl31(void) -{ switch (board_id()) { case 3: case 4: /* rev-3 and rev-4 use mt6311 as external buck */ - register_mt6311_to_bl31(); + gpio_output(PAD_EINT15, 1); + udelay(500); + mt6311_probe(EXT_BUCK_I2C_BUS); break; case 2: default: /* rev-2 and rev-5 use da9212 as external buck */ - register_da9212_to_bl31(); + mt6391_gpio_output(MT6391_KP_ROW3, 1); /* DA9212_IC_EN */ + mt6391_gpio_output(MT6391_KP_ROW4, 1); /* DA9212_EN_A */ + udelay(500); /* add 500us delay for powering on da9212 */ + da9212_probe(EXT_BUCK_I2C_BUS); break; } } @@ -125,7 +89,7 @@ static void configure_audio(void) mt6391_gpio_output(MT6391_KP_COL5, 1); /* Init i2c bus Timing register for audio codecs */ - mtk_i2c_bus_init(0); + mtk_i2c_bus_init(CODEC_I2C_BUS); /* set I2S clock to 48KHz */ mt_pll_set_aud_div(48 * KHz); @@ -197,7 +161,7 @@ static void mainboard_init(device_t dev) configure_backlight(); configure_usb(); configure_usb_hub(); - configure_bl31(); + configure_ext_buck(); elog_init(); elog_add_boot_reason();

1 0

Patch set updated for coreboot: mediatek/mt8173: Remove bl31 board parameters passing mechanism
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14124 -gerrit commit 56e310346fd7d9a6b05af8070c5c9cb97392d3eb Author: Jimmy Huang <jimmy.huang(a)mediatek.com> Date: Sat Mar 5 10:25:05 2016 +0800 mediatek/mt8173: Remove bl31 board parameters passing mechanism As the DA9212 and MT6311 external buck can be controlled by hardware since rev-5 board, we don't need to pass any board specific parameter to ARM TF. BRANCH=none BUG=none TEST=build pass Change-Id: I43eebe25ab14d3dd84e8bb4286e2bb55c8c3c063 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 9c4dfe61c69042e464b384e2e0edbc55eda23a74 Original-Change-Id: I541357fee6afb1ff2d771bcb073f7c9a9db52f00 Original-Signed-off-by: Jimmy Huang <jimmy.huang(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/332344 Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- src/soc/mediatek/mt8173/Makefile.inc | 3 +-- src/soc/mediatek/mt8173/bl31_plat_params.c | 11 +--------- .../mediatek/mt8173/include/soc/bl31_plat_params.h | 24 ---------------------- 3 files changed, 2 insertions(+), 36 deletions(-) diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc index 217cbc3..82d74e3 100644 --- a/src/soc/mediatek/mt8173/Makefile.inc +++ b/src/soc/mediatek/mt8173/Makefile.inc @@ -77,8 +77,7 @@ ramstage-y += usb.c ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c -BL31_MAKEARGS += PLAT=mt8173 MEDIATEK_MEM_CONFIG=SRAM_192K MEDIATEK_DA9212=1 \ - MEDIATEK_MT6311=1 +BL31_MAKEARGS += PLAT=mt8173 ################################################################################ diff --git a/src/soc/mediatek/mt8173/bl31_plat_params.c b/src/soc/mediatek/mt8173/bl31_plat_params.c index 025c202..fc211ef 100644 --- a/src/soc/mediatek/mt8173/bl31_plat_params.c +++ b/src/soc/mediatek/mt8173/bl31_plat_params.c @@ -14,17 +14,8 @@ */ #include <arm_tf.h> #include <assert.h> -#include <soc/bl31_plat_params.h> - -static struct bl31_plat_param *plat_params; - -void register_bl31_param(struct bl31_plat_param *param) -{ - param->next = (void *)plat_params; - plat_params = param; -} void *soc_get_bl31_plat_params(bl31_params_t *bl31_params) { - return (void *)plat_params; + return (void *)NULL; } diff --git a/src/soc/mediatek/mt8173/include/soc/bl31_plat_params.h b/src/soc/mediatek/mt8173/include/soc/bl31_plat_params.h deleted file mode 100644 index c1ea885..0000000 --- a/src/soc/mediatek/mt8173/include/soc/bl31_plat_params.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2015 MediaTek Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __BL31_PLAT_PARAMS_H__ -#define __BL31_PLAT_PARAMS_H__ - -#if IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) -#include <arm-trusted-firmware/plat/mediatek/mt8173/include/plat_params.h> - -void register_bl31_param(struct bl31_plat_param *param); -#endif - -#endif /* __BL31_PLAT_PARAMS_H__ */

1 0

New patch to review for coreboot: mediatek/mt8173: Remove bl31 board parameters passing mechanism
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14124 -gerrit commit 6b2d7a2ca1a9e7976fa9d2ef5982ce6f96423171 Author: Jimmy Huang <jimmy.huang(a)mediatek.com> Date: Sat Mar 5 10:25:05 2016 +0800 mediatek/mt8173: Remove bl31 board parameters passing mechanism As the DA9212 and MT6311 external buck can be controlled by hardware since rev-5 board, we don't need to pass any board specific parameter to ARM TF. BRANCH=none BUG=none TEST=build pass Change-Id: I43eebe25ab14d3dd84e8bb4286e2bb55c8c3c063 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 9c4dfe61c69042e464b384e2e0edbc55eda23a74 Original-Change-Id: I541357fee6afb1ff2d771bcb073f7c9a9db52f00 Original-Signed-off-by: Jimmy Huang <jimmy.huang(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/332344 Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- src/soc/mediatek/mt8173/Makefile.inc | 3 +-- src/soc/mediatek/mt8173/bl31_plat_params.c | 11 +--------- .../mediatek/mt8173/include/soc/bl31_plat_params.h | 24 ---------------------- 3 files changed, 2 insertions(+), 36 deletions(-) diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc index 217cbc3..82d74e3 100644 --- a/src/soc/mediatek/mt8173/Makefile.inc +++ b/src/soc/mediatek/mt8173/Makefile.inc @@ -77,8 +77,7 @@ ramstage-y += usb.c ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c -BL31_MAKEARGS += PLAT=mt8173 MEDIATEK_MEM_CONFIG=SRAM_192K MEDIATEK_DA9212=1 \ - MEDIATEK_MT6311=1 +BL31_MAKEARGS += PLAT=mt8173 ################################################################################ diff --git a/src/soc/mediatek/mt8173/bl31_plat_params.c b/src/soc/mediatek/mt8173/bl31_plat_params.c index 025c202..fc211ef 100644 --- a/src/soc/mediatek/mt8173/bl31_plat_params.c +++ b/src/soc/mediatek/mt8173/bl31_plat_params.c @@ -14,17 +14,8 @@ */ #include <arm_tf.h> #include <assert.h> -#include <soc/bl31_plat_params.h> - -static struct bl31_plat_param *plat_params; - -void register_bl31_param(struct bl31_plat_param *param) -{ - param->next = (void *)plat_params; - plat_params = param; -} void *soc_get_bl31_plat_params(bl31_params_t *bl31_params) { - return (void *)plat_params; + return (void *)NULL; } diff --git a/src/soc/mediatek/mt8173/include/soc/bl31_plat_params.h b/src/soc/mediatek/mt8173/include/soc/bl31_plat_params.h deleted file mode 100644 index c1ea885..0000000 --- a/src/soc/mediatek/mt8173/include/soc/bl31_plat_params.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2015 MediaTek Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __BL31_PLAT_PARAMS_H__ -#define __BL31_PLAT_PARAMS_H__ - -#if IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) -#include <arm-trusted-firmware/plat/mediatek/mt8173/include/plat_params.h> - -void register_bl31_param(struct bl31_plat_param *param); -#endif - -#endif /* __BL31_PLAT_PARAMS_H__ */

1 0

New patch to review for coreboot: google/oak: Move external buck initialization to coreboot
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14123 -gerrit commit 664acdefb9ce34d5de3d00ec61adaf87524ef9d0 Author: henryc.chen <henryc.chen(a)mediatek.com> Date: Fri Mar 11 14:55:30 2016 +0800 google/oak: Move external buck initialization to coreboot Remove the code which is passing parameters to ARMTF and move external buck initilizaton from ARMTF to coreboot. BRANCH=none BUG=none TEST=verified on Oak rev4/rev5 Change-Id: I4f4b30acbee9b42a202b326f2fe4517cb4b9d83c Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 37bec54b4d8a3bce38878e292e4821da3959026a Original-Change-Id: Ib81709812a064f6daf13c9b4d6525f1858c81393 Original-Signed-off-by: henryc.chen <henryc.chen(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/332343 Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- src/mainboard/google/oak/mainboard.c | 70 +++++++++--------------------------- 1 file changed, 17 insertions(+), 53 deletions(-) diff --git a/src/mainboard/google/oak/mainboard.c b/src/mainboard/google/oak/mainboard.c index 192f4b3..4208730 100644 --- a/src/mainboard/google/oak/mainboard.c +++ b/src/mainboard/google/oak/mainboard.c @@ -22,8 +22,9 @@ #include <elog.h> #include <gpio.h> -#include <soc/bl31_plat_params.h> +#include <soc/da9212.h> #include <soc/i2c.h> +#include <soc/mt6311.h> #include <soc/mt6391.h> #include <soc/mtcmos.h> #include <soc/pinmux.h> @@ -31,67 +32,30 @@ #include <soc/usb.h> #include <vendorcode/google/chromeos/chromeos.h> -static void register_da9212_to_bl31(void) -{ -#if IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) - static struct bl31_da9212_param param_da9212 = { - .h = { - .type = PARAM_CLUSTER1_DA9212, - }, - .i2c_bus = 1, - .ic_en = { - .type = PARAM_GPIO_MT6391, - .polarity = PARAM_GPIO_ACTIVE_HIGH, - .index = MT6391_KP_ROW3, - }, - .en_a = { - .type = PARAM_GPIO_MT6391, - .polarity = PARAM_GPIO_ACTIVE_HIGH, - .index = MT6391_KP_ROW4, - }, - .en_b = { - .type = PARAM_GPIO_NONE, - }, - }; - if (board_id() == 2) { - param_da9212.ic_en.type = PARAM_GPIO_SOC; - param_da9212.ic_en.index = PAD_UCTS2; - } - register_bl31_param(&param_da9212.h); - - /* Init i2c bus Timing register for da9212 */ - mtk_i2c_bus_init(param_da9212.i2c_bus); -#endif -} +enum { + CODEC_I2C_BUS = 0, + EXT_BUCK_I2C_BUS = 1, +}; -static void register_mt6311_to_bl31(void) +static void configure_ext_buck(void) { -#if IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) - static struct bl31_mt6311_param param_mt6311 = { - .h = { - .type = PARAM_CLUSTER1_MT6311, - }, - .i2c_bus = 1, - }; - register_bl31_param(&param_mt6311.h); - - /* Init i2c bus Timing register for mt6311 */ - mtk_i2c_bus_init(param_mt6311.i2c_bus); -#endif -} + mtk_i2c_bus_init(EXT_BUCK_I2C_BUS); -static void configure_bl31(void) -{ switch (board_id()) { case 3: case 4: /* rev-3 and rev-4 use mt6311 as external buck */ - register_mt6311_to_bl31(); + gpio_output(PAD_EINT15, 1); + udelay(500); + mt6311_probe(EXT_BUCK_I2C_BUS); break; case 2: default: /* rev-2 and rev-5 use da9212 as external buck */ - register_da9212_to_bl31(); + mt6391_gpio_output(MT6391_KP_ROW3, 1); /* DA9212_IC_EN */ + mt6391_gpio_output(MT6391_KP_ROW4, 1); /* DA9212_EN_A */ + udelay(500); /* add 500us delay for powering on da9212 */ + da9212_probe(EXT_BUCK_I2C_BUS); break; } } @@ -125,7 +89,7 @@ static void configure_audio(void) mt6391_gpio_output(MT6391_KP_COL5, 1); /* Init i2c bus Timing register for audio codecs */ - mtk_i2c_bus_init(0); + mtk_i2c_bus_init(CODEC_I2C_BUS); /* set I2S clock to 48KHz */ mt_pll_set_aud_div(48 * KHz); @@ -197,7 +161,7 @@ static void mainboard_init(device_t dev) configure_backlight(); configure_usb(); configure_usb_hub(); - configure_bl31(); + configure_ext_buck(); elog_init(); elog_add_boot_reason();

1 0

New patch to review for coreboot: mediatek/mt8173: Add da9212 driver
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14122 -gerrit commit be3610303d273102f70f0c9f4a64d7a9e2e97d75 Author: henryc.chen <henryc.chen(a)mediatek.com> Date: Wed Mar 2 15:51:44 2016 +0800 mediatek/mt8173: Add da9212 driver Add secondary PMIC for external buck control on Oak rev0/1/2/5 BRANCH=none BUG=none TEST=verified on Oak rev4/rev5 Change-Id: Ia000b0c7d61e8396856656247f9627e33b21b19b Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 241508e7d781fac8ee085ee81962043dd654c52d Original-Change-Id: I6c75e2462363a5523bf1ebb03af7a36740293624 Original-Signed-off-by: henryc.chen <henryc.chen(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/332342 Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- src/soc/mediatek/mt8173/Makefile.inc | 1 + src/soc/mediatek/mt8173/da9212.c | 100 +++++++++++++++++++++++++++ src/soc/mediatek/mt8173/include/soc/da9212.h | 89 ++++++++++++++++++++++++ 3 files changed, 190 insertions(+) diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc old mode 100755 new mode 100644 index 6ba533a..217cbc3 --- a/src/soc/mediatek/mt8173/Makefile.inc +++ b/src/soc/mediatek/mt8173/Makefile.inc @@ -67,6 +67,7 @@ ramstage-y += timer.c ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += pmic_wrap.c mt6391.c i2c.c ramstage-y += mt6311.c +ramstage-y += da9212.c ramstage-y += gpio.c ramstage-y += wdt.c ramstage-y += pll.c diff --git a/src/soc/mediatek/mt8173/da9212.c b/src/soc/mediatek/mt8173/da9212.c new file mode 100644 index 0000000..7953d17 --- /dev/null +++ b/src/soc/mediatek/mt8173/da9212.c @@ -0,0 +1,100 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <console/console.h> +#include <device/i2c.h> +#include <soc/da9212.h> + +enum { + DA9212_SLAVE_ADDR = 0x68, +}; + +static void da9212_hw_init(uint8_t i2c_num, unsigned char variant_id) +{ + int ret = 0; + int buck_mode = DA9212_BUCK_MODE_AUTO; + + if (variant_id == DA9212_VARIANT_ID_AB) + buck_mode = DA9212_BUCK_MODE_PWM; + + /* page select to 0 */ + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_PAGE_CON, DA9212_REG_PAGE0, + DA9212_REG_PAGE_MASK, DA9212_REG_PAGE_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKA_CONT, DA9212_BUCK_GPI_GPIO1, + DA9212_BUCK_GPI_MASK, DA9212_BUCK_GPI_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKB_CONT, DA9212_BUCK_GPI_OFF, + DA9212_BUCK_GPI_OFF, DA9212_BUCK_GPI_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKA_CONT, DA9212_VBUCK_SEL_A, + DA9212_VBUCK_SEL_MASK, DA9212_VBUCK_SEL_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKB_CONT, DA9212_VBUCK_SEL_A, + DA9212_VBUCK_SEL_MASK, DA9212_VBUCK_SEL_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKA_CONF, buck_mode, + DA9212_BUCK_MODE_MASK, DA9212_BUCK_MODE_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKB_CONF, buck_mode, + DA9212_BUCK_MODE_MASK, DA9212_BUCK_MODE_SHIFT); + + if (ret) + printk(BIOS_ERR, "ERROR: %s failed\n", __func__); + +} + +void da9212_probe(uint8_t i2c_num) +{ + int ret = 0; + unsigned char device_id = 0; + unsigned char variant_id = 0; + + + /* select to page 4, clear REVERT at first time */ + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_PAGE_CON, DA9212_REG_PAGE4, + 0xF, DA9212_REG_PAGE_SHIFT); + + ret |= i2c_read_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_DEVICE_ID, &device_id, + 0xFF, 0); + + ret |= i2c_read_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_VARIANT_ID, &variant_id, + 0xFF, 0); + + printk(BIOS_INFO, "%s: device ID = %#x, variant ID = %#x\n", __func__, + device_id, variant_id); + + /* Check device ID is DA9212 */ + if (device_id != DA9212_ID || ret) { + printk(BIOS_ERR, "ERROR: unknown DA9212 device_id\n"); + return; + } + + da9212_hw_init(i2c_num, variant_id); +} diff --git a/src/soc/mediatek/mt8173/include/soc/da9212.h b/src/soc/mediatek/mt8173/include/soc/da9212.h new file mode 100644 index 0000000..359615c --- /dev/null +++ b/src/soc/mediatek/mt8173/include/soc/da9212.h @@ -0,0 +1,89 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __SOC_DA9212_H_ +#define __SOC_DA9212_H_ + +void da9212_probe(uint8_t i2c_num); + +enum { + /* Page selection */ + DA9212_REG_PAGE_CON = 0x0, + + /* Regulator Registers */ + DA9212_REG_BUCKA_CONT = 0x5D, + DA9212_REG_BUCKB_CONT = 0x5E, + DA9212_REG_BUCKA_CONF = 0xD1, + DA9212_REG_BUCKB_CONF = 0xD2, +}; + +/* DA9212_REG_PAGE_CON (addr=0x0) */ +enum { + DA9212_REG_PAGE_SHIFT = 0, + DA9212_REG_PAGE_MASK = 0xf +}; + +enum { + DA9212_REG_PAGE0 = 0, + DA9212_REG_PAGE2 = 2, + DA9212_REG_PAGE4 = 4, + DA9212_PAGE_WRITE_MODE = 0x0, + DA9212_REPEAT_WRITE_MODE = 0x40, + DA9212_PAGE_REVERT = 0x80 +}; + +/* DA9212_REG_BUCKA/B_CONT (addr=0x5D/0x5E) */ +enum { + DA9212_BUCK_EN_SHIFT = 0, + DA9212_BUCK_OFF = 0x0, + DA9212_BUCK_ON = 0x1, + DA9212_BUCK_GPI_SHIFT = 1, + DA9212_BUCK_GPI_MASK = 0x3, + DA9212_BUCK_GPI_OFF = 0x0, + DA9212_BUCK_GPI_GPIO0 = 0x1, + DA9212_BUCK_GPI_GPIO1 = 0x2, + DA9212_BUCK_GPI_GPIO4 = 0x3, + DA9212_VBUCK_SEL_SHIFT = 4, + DA9212_VBUCK_SEL_MASK = 0x1, + DA9212_VBUCK_SEL_A = 0x0, + DA9212_VBUCK_SEL_B = 0x1, +}; + +/* DA9212_REG_BUCKA/B_CONF (addr=0xD1/0xD2) */ +enum { + DA9212_BUCK_MODE_SHIFT = 0, + DA9212_BUCK_MODE_MASK = 0x3, + DA9212_BUCK_MODE_MANUAL = 0x0, + DA9212_BUCK_MODE_PFM = 0x1, + DA9212_BUCK_MODE_PWM = 0x2, + DA9212_BUCK_MODE_AUTO = 0x3, +}; + +/* DA9212_REG_CONFIG_E (addr=0x147) */ +enum { + /* DEVICE IDs */ + DA9212_REG_DEVICE_ID = 0x1, + DA9212_ID = 0x22, + DA9213_ID = 0x23, + DA9212_REG_VARIANT_ID = 0x2, + DA9212_VARIANT_ID_AB = 0x10, + DA9212_VARIANT_ID_AC = 0x20 +}; + +#endif

1 0

New patch to review for coreboot: mediatek/mt8173: Add mt6311 driver
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14121 -gerrit commit f6e2ad223a10734d7e5d6f7fa015cf6b88553033 Author: henryc.chen <henryc.chen(a)mediatek.com> Date: Wed Mar 2 15:49:52 2016 +0800 mediatek/mt8173: Add mt6311 driver Add secondary PMIC for external buck control on Oak rev3/4 BRANCH=none BUG=none TEST=verified on Oak rev4/rev5 Change-Id: I24c18a1cf71fc57deacedcbeb6a100b131c28077 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 7f7f8ceac795d8193194a6918a73c4b391009025 Original-Change-Id: I312d8281d2c09d8bc43f092edef3e405d51ee7d0 Original-Signed-off-by: henryc.chen <henryc.chen(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/332341 Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- src/soc/mediatek/mt8173/Makefile.inc | 1 + src/soc/mediatek/mt8173/include/soc/mt6311.h | 56 +++++++++++ src/soc/mediatek/mt8173/mt6311.c | 135 +++++++++++++++++++++++++++ 3 files changed, 192 insertions(+) diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc old mode 100644 new mode 100755 index e18e6fe..6ba533a --- a/src/soc/mediatek/mt8173/Makefile.inc +++ b/src/soc/mediatek/mt8173/Makefile.inc @@ -66,6 +66,7 @@ ramstage-y += soc.c mtcmos.c ramstage-y += timer.c ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += pmic_wrap.c mt6391.c i2c.c +ramstage-y += mt6311.c ramstage-y += gpio.c ramstage-y += wdt.c ramstage-y += pll.c diff --git a/src/soc/mediatek/mt8173/include/soc/mt6311.h b/src/soc/mediatek/mt8173/include/soc/mt6311.h new file mode 100644 index 0000000..28d204d --- /dev/null +++ b/src/soc/mediatek/mt8173/include/soc/mt6311.h @@ -0,0 +1,56 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __SOC_MEDIATEK_MT8173_MT6311_H__ +#define __SOC_MEDIATEK_MT8173_MT6311_H__ + +void mt6311_probe(uint8_t i2c_num); + +enum { + MT6311_CID = 0x0, + MT6311_SWCID = 0x1, + MT6311_GPIO_MODE = 0x04, + MT6311_TOP_CON = 0x0A, + MT6311_TOP_RST_CON = 0x15, + MT6311_TOP_INT_CON = 0x18, + MT6311_STRUP_CON5 = 0x1F, + MT6311_EFUSE_DOUT_56_63 = 0x40, + MT6311_EFUSE_DOUT_64_71 = 0x41, + MT6311_BUCK_ALL_CON23 = 0x69, + MT6311_STRUP_ANA_CON1 = 0x6D, + MT6311_STRUP_ANA_CON2 = 0x6E, + MT6311_VDVFS1_ANA_CON10 = 0x84, + MT6311_VDVFS11_CON7 = 0x88, + MT6311_VDVFS11_CON9 = 0x8A, + MT6311_VDVFS11_CON10 = 0x8B, + MT6311_VDVFS11_CON11 = 0x8C, + MT6311_VDVFS11_CON12 = 0x8D, + MT6311_VDVFS11_CON13 = 0x8E, + MT6311_VDVFS11_CON14 = 0x8F, + MT6311_VDVFS11_CON19 = 0x94, + MT6311_LDO_CON3 = 0xCF, +}; + +enum { + MT6311_E1_CID_CODE = 0x0110, + MT6311_E2_CID_CODE = 0x0120, + MT6311_E3_CID_CODE = 0x0130, +}; + +#endif diff --git a/src/soc/mediatek/mt8173/mt6311.c b/src/soc/mediatek/mt8173/mt6311.c new file mode 100644 index 0000000..260e236 --- /dev/null +++ b/src/soc/mediatek/mt8173/mt6311.c @@ -0,0 +1,135 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <console/console.h> +#include <device/i2c.h> +#include <soc/mt6311.h> + +enum { + MT6311_SLAVE_ADDR = 0x6B, +}; + +static u32 get_mt6311_chip_id(uint8_t i2c_num) +{ + unsigned char id[2] = {0}; + + i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_CID, + &id[0], 0xFF, 0); + i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_SWCID, + &id[1], 0xFF, 0); + + return (u32)(id[0] << 8 | id[1]); +} + +static void mt6311_hw_init(uint8_t i2c_num) +{ + int ret = 0; + unsigned char var[3] = {0}; + + + /* + * Phase Shedding Trim Software Setting + * The phase 2 of MT6311 will enter PWM mode if the threshold is + * reached. + * The threshold is set according to EFUSE value. + */ + ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_EFUSE_DOUT_56_63, &var[0], + 0x3, 1); + ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_EFUSE_DOUT_56_63, &var[1], + 0x1, 7); + ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_EFUSE_DOUT_64_71, &var[2], + 0x1, 0); + + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS1_ANA_CON10, + var[0] | var[1] << 2 | var[2] << 3, 0xf, 0); + + /* I2C_CONFIG; pushpull setting, Opendrain is '0' */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_TOP_INT_CON, + 0x1, 0x1, 2); + /* RG_WDTRSTB_EN; CC, initial WDRSTB setting. */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_TOP_RST_CON, + 0x1, 0x1, 5); + /* initial INT function */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_GPIO_MODE, + 0x1, 0x7, 3); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_STRUP_CON5, + 0, 1 << 2 | 1 << 1 | 1 << 0, 0); + + /* Vo max is 1.15V */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_STRUP_ANA_CON1, 0x3, 0x3, 5); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_BUCK_ALL_CON23, 0x1, 0x1, 0); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_STRUP_ANA_CON2, 0x3, 0x3, 0); + /* Suspend HW control from SPM */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_TOP_CON, 0x1, 0x1, 0); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON7, 0x1, 0x1, 0); + /* default VDVFS power on */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON9, 0x1, 0x1, 0); + /* for DVFS slew rate rising=0.67us */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON10, 0x1, 0x7f, 0); + /* for DVFS slew rate, falling 2.0us */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON11, 0x5, 0x7f, 0); + /* default VDVFS11_VOSEL 1.0V, SW control */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON12, 0x40, 0x7f, 0); + /* default VDVFS11_VOSEL_ON 1.0V, HW control */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON13, 0x40, 0x7f, 0); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON14, 0x40, 0x7f, 0); + /* for DVFS sof change, falling 50us */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON19, 0x3, 0x3, 0); + /* for DVFS sof change, falling only */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON19, 0x1, 0x3, 4); + /* OFF LDO */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_LDO_CON3, 0, 0x1, 0); + + if (ret) + printk(BIOS_ERR, "ERROR: %s failed\n", __func__); +} + +void mt6311_probe(uint8_t i2c_num) +{ + u32 val = 0; + + /* Check device ID is MT6311 */ + val = get_mt6311_chip_id(i2c_num); + printk(BIOS_INFO, "%s: device ID = %#x\n", __func__, val); + + if (val < MT6311_E1_CID_CODE) { + printk(BIOS_ERR, "ERROR: unknown MT6311 device_id\n"); + return; + } + + mt6311_hw_init(i2c_num); +}

1 0

Patch set updated for coreboot: mediatek/mt8173: Enable ARM trusted firmware integration
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13968 -gerrit commit 8d00d25e6aec561100c0295d070bcc32efc4ce4f Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Tue Mar 8 21:42:00 2016 +0100 mediatek/mt8173: Enable ARM trusted firmware integration In Chromium OS downstream this was done together with adding the support for ATF, but unfortunately ATF upstream isn't ready yet. This commit is a reminder to enable things once ATF caught up. Change-Id: Id0d6908d906a1e54cdda4f232d572d996d9c556f Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/soc/mediatek/mt8173/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/mediatek/mt8173/Kconfig b/src/soc/mediatek/mt8173/Kconfig index 91a8d4f..ec3481e 100644 --- a/src/soc/mediatek/mt8173/Kconfig +++ b/src/soc/mediatek/mt8173/Kconfig @@ -6,6 +6,7 @@ config SOC_MEDIATEK_MT8173 select ARCH_RAMSTAGE_ARMV8_64 select ARCH_ROMSTAGE_ARMV8_64 select ARCH_VERSTAGE_ARMV8_64 + select ARM64_USE_ARM_TRUSTED_FIRMWARE select BOOTBLOCK_CONSOLE select HAVE_UART_SPECIAL select SPI_ATOMIC_SEQUENCING if SPI_FLASH

1 0

New patch to review for coreboot: intel/skylake: Enable PROCHOT
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14120 -gerrit commit 8e08f261a5e86b8f006d804c08bfb3511b383c26 Author: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com> Date: Tue Mar 8 12:34:06 2016 -0800 intel/skylake: Enable PROCHOT This patch would enable PROCHOT feature in skylake. Asserting PROCHOT line would throttle the GPU/CPU. BUG=chrome-os-partner:51142 BRANCH=glados TEST=manually tested on lars. asserting PROCTHOT by EC reduces FSP in fish-tank from approx 40 to 20. (50 fish setting), also CPU freq. drops to from 1600000 to 400000 Change-Id: I8fc0c015ea2c26d20bbbfc619f720f231d540feb Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 1b88b1f183df9c7362d7e58acb0a1fa0b076d56e Original-Change-Id: Ida8636efc3d8da56ebd3931144d31ab1b88fe806 Original-Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/331690 Original-Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> Original-(cherry picked from commit d091a999c3827179182b62a1274a9b3581f7f006) Original-Reviewed-on: https://chromium-review.googlesource.com/333073 Original-Commit-Ready: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Original-Tested-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> --- src/soc/intel/skylake/cpu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index d154f0e..38c5b52 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -252,6 +252,12 @@ static void configure_misc(void) msr.lo = 1 << 4; msr.hi = 0; wrmsr(IA32_PACKAGE_THERM_INTERRUPT, msr); + + /* Enable PROCHOT */ + msr = rdmsr(MSR_POWER_CTL); + msr.lo |= (1 << 0); /* Enable Bi-directional PROCHOT as an input*/ + msr.lo |= (1 << 23); /* Lock it */ + wrmsr(MSR_POWER_CTL, msr); } static void enable_lapic_tpr(void)

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2016