coreboot-gerrit March 2016

coreboot-gerrit@coreboot.org

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1119 discussions

New patch to review for coreboot: MAINTAINERS: Add maintainers for power8 architecture
by Martin Roth 17 Mar '16

17 Mar '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14126 -gerrit commit be9e528b9d07f9963addc2cecb09001a23dcd62c Author: Martin Roth <martinroth(a)google.com> Date: Thu Mar 17 12:00:25 2016 -0600 MAINTAINERS: Add maintainers for power8 architecture Change-Id: I0eedda5f31c2809db7871b81ceb3045b782f9df1 Signed-off-by: Martin Roth <martinroth(a)google.com> --- MAINTAINERS | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index ad98d23..ee6bf91 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -126,6 +126,14 @@ F: src/arch/riscv/ F: src/soc/ucb/ F: src/mainboard/emulation/qemu-riscv/ +POWER8 ARCHITECTURE +M: Ronald Minnich <rminnich(a)gmail.com> +M: Timothy Pearson <tpearson(a)raptorengineeringinc.com> +S: Maintained +F: src/arch/power8/ +F: src/cpu/qemu-power8/ +F: src/mainboard/emulation/qemu-power8/ + LENOVO EC M: Alexander Couzens <lynxis(a)fe80.eu> S: Maintained

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New patch to review for coreboot: MMA : changing BOOT_STUB to COREBOOT region and few more things
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14125 -gerrit commit 6c84f1a37149ae37c8c9959ef8c50ee31c7a39e8 Author: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com> Date: Mon Feb 22 16:50:31 2016 -0800 MMA : changing BOOT_STUB to COREBOOT region and few more things (1) Added following new function. cbfs_locate_file_in_region - to locate (and mmap) a file in a flash region This function is used to look for MMA blobs in "COREBOOT" cbfs region (2) mma_setup_test.sh would write to "COREBOOT" region. (3) changes in mma_automated_test.sh. Few MMA tests need system to be COLD rebooted before test can start. mma_automated_test.sh would do COLD reboot after each test, and so i would sync the filesystem before doing COLD reboot. BRANCH=none BUG=chrome-os-partner:43731 TEST=Build and Boot kunimitsu (FAB4). Able to locate MMA files in CBFS Not tested on Glados. Change-Id: I8338a46d8591d16183e51917782f052fa78c4167 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 1e418dfffd8a7fe590f9db771d2f0b01a44afbb4 Original-Change-Id: I402f84f5c46720710704dfd32b9319c73c412e47 Original-Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/331682 Original-Commit-Ready: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Original-Tested-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> --- src/soc/intel/common/mma.c | 41 +++++++++++++++++++++++++++++++++++------ util/mma/mma_automated_test.sh | 14 +++++++++++++- util/mma/mma_setup_test.sh | 4 ++-- 3 files changed, 50 insertions(+), 9 deletions(-) diff --git a/src/soc/intel/common/mma.c b/src/soc/intel/common/mma.c index 3829361..b044b00 100644 --- a/src/soc/intel/common/mma.c +++ b/src/soc/intel/common/mma.c @@ -22,10 +22,12 @@ #include "mma.h" #include <soc/romstage.h> #include <string.h> +#include <fmap.h> #define MMA_TEST_METADATA_FILENAME "mma_test_metadata.bin" #define MMA_TEST_NAME_TAG "MMA_TEST_NAME" #define MMA_TEST_PARAM_TAG "MMA_TEST_PARAM" +#define MMA_CBFS_REGION "COREBOOT" #define TEST_NAME_MAX_SIZE 30 #define TEST_PARAM_MAX_SIZE 100 #define FSP_MMA_RESULTS_GUID { 0x8f4e928, 0xf5f, 0x46d4, \ @@ -112,6 +114,30 @@ static int label_value(const char *haystack, size_t haystack_sz, return 0; } +static void *cbfs_locate_file_in_region(const char *region_name, const char *file_name, + uint32_t file_type, uint32_t *file_size) +{ + struct region_device rdev; + struct cbfsf fh; + + if (file_size != NULL) + *file_size = 0; + + if (fmap_locate_area_as_rdev(region_name, &rdev) == 0) { + if (cbfs_locate(&fh, &rdev, file_name, &file_type) == 0) { + if (file_size != NULL) + *file_size = region_device_sz(&fh.data); + return rdev_mmap_full(&fh.data); + } else + printk(BIOS_DEBUG, "%s file not found in %s region\n", + file_name, region_name); + } else + printk(BIOS_DEBUG,"%s region not found while looking for %s\n", region_name, + file_name); + + return NULL; +} + void setup_mma(MEMORY_INIT_UPD *memory_params) { void *mma_test_metadata, *mma_test_content, *mma_test_param; @@ -127,8 +153,9 @@ void setup_mma(MEMORY_INIT_UPD *memory_params) memory_params->MmaTestConfigPtr = 0; memory_params->MmaTestConfigSize = 0; - mma_test_metadata = cbfs_boot_map_with_leak(MMA_TEST_METADATA_FILENAME, - CBFS_TYPE_MMA , &mma_test_metadata_file_len); + mma_test_metadata = cbfs_locate_file_in_region(MMA_CBFS_REGION, + MMA_TEST_METADATA_FILENAME, CBFS_TYPE_MMA, + &mma_test_metadata_file_len); if (!mma_test_metadata) { printk(BIOS_DEBUG, "MMA setup failed: Failed to read %s\n", @@ -154,16 +181,18 @@ void setup_mma(MEMORY_INIT_UPD *memory_params) printk(BIOS_DEBUG, "Got MMA_TEST_NAME=%s MMA_TEST_PARAM=%s\n", test_filename, test_param_filename); - mma_test_content = cbfs_boot_map_with_leak(test_filename, - CBFS_TYPE_EFI , &mma_test_content_file_len); + mma_test_content = cbfs_locate_file_in_region(MMA_CBFS_REGION, + test_filename, CBFS_TYPE_EFI, + &mma_test_content_file_len); if (!mma_test_content) { printk(BIOS_DEBUG, "MMA setup failed: Failed to read %s.\n", test_filename); return; } - mma_test_param = cbfs_boot_map_with_leak(test_param_filename, - CBFS_TYPE_MMA , &mma_test_param_file_len); + mma_test_param = cbfs_locate_file_in_region(MMA_CBFS_REGION, + test_param_filename, CBFS_TYPE_MMA, + &mma_test_param_file_len); if (!mma_test_param) { printk(BIOS_DEBUG, "MMA setup failed: Failed to read %s.\n", test_param_filename); diff --git a/util/mma/mma_automated_test.sh b/util/mma/mma_automated_test.sh index edca4f1..08e2bc2 100755 --- a/util/mma/mma_automated_test.sh +++ b/util/mma/mma_automated_test.sh @@ -68,6 +68,10 @@ get_mma_autotest_params() { } main() { + # sleep 30 sec, before we start. This would give some time if we want + # to stop automation. + sleep 30s + mkdir -p "${MMA_LOCAL_DATA_STORAGE}" # Exit is there are no tests [ -e "${MMA_AUTOMATED_TEST_CONFIG}" ] || exit 0 @@ -91,7 +95,15 @@ main() { get_mma_autotest_params ${MMA_SETUP_TEST_TOOL} set ${MMA_TEST_NAME} ${MMA_TEST_PARAM} - reboot + # sync the filesystem, hoping this would minimize + # the chances of fs corruption + sync + sleep 2s + sync + sleep 2s + sync + sleep 2s + ectool reboot_ec } main "$@" diff --git a/util/mma/mma_setup_test.sh b/util/mma/mma_setup_test.sh index ecbedf8..7eb3c7c 100755 --- a/util/mma/mma_setup_test.sh +++ b/util/mma/mma_setup_test.sh @@ -90,7 +90,7 @@ show_usage() { write_flash() { printf "Writing back flash contents "${flashrom_temp_image}"\n" - flashrom -p host -w "${flashrom_temp_image}" -i BOOT_STUB --fast-verify || \ + flashrom -p host -w "${flashrom_temp_image}" --fast-verify || \ { printf "failed to read flash\n" ; exit -1; @@ -180,7 +180,7 @@ main() { remove_file_if_exists "${flashrom_temp_image}" printf "Reading flash contents to "${flashrom_temp_image}"\n" - flashrom -p host -r "${flashrom_temp_image}" -i BOOT_STUB || \ + flashrom -p host -r "${flashrom_temp_image}" || \ { printf "failed to read flash\n" ; exit -1;

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Patch set updated for coreboot: coreboot-utils : adding tools to support (semi) automation test of mma
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12928 -gerrit commit 6a74dbb83498953dab6da0733e44baa05064880b Author: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com> Date: Wed Nov 18 15:02:19 2015 -0800 coreboot-utils : adding tools to support (semi) automation test of mma mma_automated_test.sh takes a config file (/usr/local/mma/tests) as input and executes all tests mentioned in the config file. format of the config file is one or more lines mentioned below. <MMA test name> <MMA test param> <#count> e.g. consider following config file. Margin1D.efi Margin1DRxVrefConfig.bin 4 RMT.efi RMTConfig.bin 1 MarginMapper.efi ScoreTxVref-TxDqDelayConfigCh1.bin 2 Margin2D.efi Margin2D_Cmd_Ch0_D1_R0_Config.bin 3 This will execute Margin1D.efi MMA test 4 times with Margin1DRxVrefConfig.bin param and results will be stored in DUT under /usr/local/mma/results_<date-time-stamp> with Margin1D_Margin1DRxVrefConfig_1.bin to Margin1D_Margin1DRxVrefConfig_4.bin name. Subsequently all tests will be executed and results will be stored. /etc/init/mma.conf invokes mma_automated_test.sh when DUT starts. And if valid test config is preset at /usr/local/mma/tests, mma_automated_test.sh will continue executing the tests. Each time DUT will be rebooted and next test in sequence will be executed. Overall follow these steps to start MMA. (1) create /usr/local/mma/tests file with the syntax mentioned above. (2) either reboot the DUT (mma.conf will be called at each boot time, which would run the mma_automated_test.sh) or execute "start mma" command (to save a reboot cycle.) (3) all test results can be found under /usr/local/mma/results_<date-time-stamp> where <date-time-stamp> is YY_MM_DD_HH_mm format (YEAR_MONTH_DAY_HOUR_MINUTE) when you started the mma tests. BRANCH=none BUG=chrome-os-partner:43731 TEST=Build and Boot kunimitsu (FAB3). MMA automation tests executes and results get saved. Not tested on Glados. Change-Id: I6805fdb95b7ff919f9c8e967b748e4893a3f9889 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 68c0a531ba3fc335b92b17002e75412195b778c4 Original-Change-Id: I92db7ca47e1e3e581c3fbb413f11e2c3e6d19b6b Original-Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com> Original-Signed-off-by: Icarus Sparry <icarus.w.sparry(a)intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/313180 Original-Commit-Ready: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Original-Tested-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> --- util/mma/mma.conf | 11 +++++ util/mma/mma_automated_test.sh | 97 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+) diff --git a/util/mma/mma.conf b/util/mma/mma.conf new file mode 100644 index 0000000..29c1f22 --- /dev/null +++ b/util/mma/mma.conf @@ -0,0 +1,11 @@ +# Copyright (c) 2015 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description "Run the mma automation tests" +author "chromium-os-dev(a)chromium.org" + +start on started boot-services +script + bash mma_automated_test.sh +end script diff --git a/util/mma/mma_automated_test.sh b/util/mma/mma_automated_test.sh new file mode 100755 index 0000000..edca4f1 --- /dev/null +++ b/util/mma/mma_automated_test.sh @@ -0,0 +1,97 @@ +#!/bin/bash + +# +# This file is part of the coreboot project. +# +# Copyright (C) 2015 Intel Corporation. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FIMMA_TEST_NAMEESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc. +# + +MMA_LOCAL_DATA_STORAGE=/usr/local/mma +# +# format of MMA_AUTOMATED_TEST_CONFIG file is as below +# with 1 or more repeted lines with same format +# +# <testname> <testparam> <#times to run this test> +# +# e.g. +# RMT.efi RMTConfig.bin 2 +# Margin1D.efi Margin1DCmdAllConfig.bin 1 +# +# +MMA_AUTOMATED_TEST_CONFIG="${MMA_LOCAL_DATA_STORAGE}"/tests +MMA_AUTOMATED_TEST_COUNT="${MMA_LOCAL_DATA_STORAGE}"/count +MMA_SETUP_TEST_TOOL=mma_setup_test.sh +MMA_GET_RESULT_TOOL=mma_get_result.sh +MMA_TEST_RESULTS_PATH="${MMA_LOCAL_DATA_STORAGE}/results$(date +_%y_%m_%d_%H_%M)" +# Clear MMA_TEST_NUMBER just in case it is set in environment +MMA_TEST_NUMBER= + +# Set a number of global params based on test number +# MMA_TEST_NUMBER - test number, stored in MMA_AUTOMATED_TEST_COUNT +# MMA_TEST_NAME - test name +# MMA_TEST_PARAM - test parameter +# MMA_TEST_COUNT - test count, number of times to run the test +# MMA_TEST_RESULT_NAME - filename for result +get_mma_autotest_params() { + typeset -i i=${MMA_TEST_NUMBER} + exec 9< "${MMA_AUTOMATED_TEST_CONFIG}" + while read -u9 MMA_TEST_NAME MMA_TEST_PARAM MMA_TEST_COUNT + do + case "${MMA_TEST_NAME}" in + ("#"*|"") continue;; # Allow blank lines and comments + esac + : $(( i -= MMA_TEST_COUNT )) + if (( i <= 0 )) ; then + printf -v MMA_TEST_RESULT_NAME \ + "${MMA_TEST_NAME%.efi}_${MMA_TEST_PARAM%.bin}_%d.bin" \ + $((MMA_TEST_COUNT+i)) + return + fi + done + ${MMA_SETUP_TEST_TOOL} reset + rm "${MMA_AUTOMATED_TEST_COUNT}" + mv "${MMA_AUTOMATED_TEST_CONFIG}" "${MMA_TEST_RESULTS_PATH}" + exit 0 +} + +main() { + # Exit is there are no tests + [ -e "${MMA_AUTOMATED_TEST_CONFIG}" ] || exit 0 + + if [ -e "${MMA_AUTOMATED_TEST_COUNT}" ] ; then + . "${MMA_AUTOMATED_TEST_COUNT}" + fi + + mkdir -p "${MMA_TEST_RESULTS_PATH}" + + if [ "${MMA_TEST_NUMBER}" ] ; then + get_mma_autotest_params + ${MMA_GET_RESULT_TOOL} \ + "${MMA_TEST_RESULTS_PATH}"/"${MMA_TEST_RESULT_NAME}" + fi + + : $(( MMA_TEST_NUMBER += 1 )) + printf "MMA_TEST_NUMBER=${MMA_TEST_NUMBER}\n" \ + > "${MMA_AUTOMATED_TEST_COUNT}" + printf "MMA_TEST_RESULTS_PATH=%s" "${MMA_TEST_RESULTS_PATH}" \ + >> "${MMA_AUTOMATED_TEST_COUNT}" + get_mma_autotest_params + ${MMA_SETUP_TEST_TOOL} set ${MMA_TEST_NAME} ${MMA_TEST_PARAM} + + reboot +} + +main "$@"

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Patch merged into coreboot/master: build system: Allow overriding the path to the futility binary
by gerrit＠coreboot.org 17 Mar '16

17 Mar '16

the following patch was just integrated into master: commit 32154d7b1211faab3d37eab0b00154a7f190eb23 Author: Patrick Georgi <pgeorgi(a)google.com> Date: Tue Mar 15 23:14:08 2016 +0100 build system: Allow overriding the path to the futility binary Change-Id: I84e68e8407149780769c3e6a1148c175e42d1025 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-on: https://review.coreboot.org/14100 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/14100 for details. -gerrit

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Patch set updated for coreboot: mediatek/mt8173: Enable ARM trusted firmware integration
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13968 -gerrit commit b0e0d9b4ef12af64f1f2dec5100303ebe4523a30 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Tue Mar 8 21:42:00 2016 +0100 mediatek/mt8173: Enable ARM trusted firmware integration In Chromium OS downstream this was done together with adding the support for ATF, but unfortunately ATF upstream isn't ready yet. This commit is a reminder to enable things once ATF caught up. Change-Id: Id0d6908d906a1e54cdda4f232d572d996d9c556f Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/soc/mediatek/mt8173/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/mediatek/mt8173/Kconfig b/src/soc/mediatek/mt8173/Kconfig index 91a8d4f..ec3481e 100644 --- a/src/soc/mediatek/mt8173/Kconfig +++ b/src/soc/mediatek/mt8173/Kconfig @@ -6,6 +6,7 @@ config SOC_MEDIATEK_MT8173 select ARCH_RAMSTAGE_ARMV8_64 select ARCH_ROMSTAGE_ARMV8_64 select ARCH_VERSTAGE_ARMV8_64 + select ARM64_USE_ARM_TRUSTED_FIRMWARE select BOOTBLOCK_CONSOLE select HAVE_UART_SPECIAL select SPI_ATOMIC_SEQUENCING if SPI_FLASH

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Patch set updated for coreboot: mediatek/mt8173: Add mt6311 driver
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14121 -gerrit commit f38cc87f36952410a3dfb1ec5de5894fc9a5eca6 Author: henryc.chen <henryc.chen(a)mediatek.com> Date: Wed Mar 2 15:49:52 2016 +0800 mediatek/mt8173: Add mt6311 driver Add secondary PMIC for external buck control on Oak rev3/4 BRANCH=none BUG=none TEST=verified on Oak rev4/rev5 Change-Id: I24c18a1cf71fc57deacedcbeb6a100b131c28077 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 7f7f8ceac795d8193194a6918a73c4b391009025 Original-Change-Id: I312d8281d2c09d8bc43f092edef3e405d51ee7d0 Original-Signed-off-by: henryc.chen <henryc.chen(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/332341 Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- src/soc/mediatek/mt8173/Makefile.inc | 1 + src/soc/mediatek/mt8173/include/soc/mt6311.h | 52 +++++++++++ src/soc/mediatek/mt8173/mt6311.c | 131 +++++++++++++++++++++++++++ 3 files changed, 184 insertions(+) diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc index e18e6fe..6ba533a 100644 --- a/src/soc/mediatek/mt8173/Makefile.inc +++ b/src/soc/mediatek/mt8173/Makefile.inc @@ -66,6 +66,7 @@ ramstage-y += soc.c mtcmos.c ramstage-y += timer.c ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += pmic_wrap.c mt6391.c i2c.c +ramstage-y += mt6311.c ramstage-y += gpio.c ramstage-y += wdt.c ramstage-y += pll.c diff --git a/src/soc/mediatek/mt8173/include/soc/mt6311.h b/src/soc/mediatek/mt8173/include/soc/mt6311.h new file mode 100644 index 0000000..3b0b79a --- /dev/null +++ b/src/soc/mediatek/mt8173/include/soc/mt6311.h @@ -0,0 +1,52 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __SOC_MEDIATEK_MT8173_MT6311_H__ +#define __SOC_MEDIATEK_MT8173_MT6311_H__ + +void mt6311_probe(uint8_t i2c_num); + +enum { + MT6311_CID = 0x0, + MT6311_SWCID = 0x1, + MT6311_GPIO_MODE = 0x04, + MT6311_TOP_CON = 0x0A, + MT6311_TOP_RST_CON = 0x15, + MT6311_TOP_INT_CON = 0x18, + MT6311_STRUP_CON5 = 0x1F, + MT6311_EFUSE_DOUT_56_63 = 0x40, + MT6311_EFUSE_DOUT_64_71 = 0x41, + MT6311_BUCK_ALL_CON23 = 0x69, + MT6311_STRUP_ANA_CON1 = 0x6D, + MT6311_STRUP_ANA_CON2 = 0x6E, + MT6311_VDVFS1_ANA_CON10 = 0x84, + MT6311_VDVFS11_CON7 = 0x88, + MT6311_VDVFS11_CON9 = 0x8A, + MT6311_VDVFS11_CON10 = 0x8B, + MT6311_VDVFS11_CON11 = 0x8C, + MT6311_VDVFS11_CON12 = 0x8D, + MT6311_VDVFS11_CON13 = 0x8E, + MT6311_VDVFS11_CON14 = 0x8F, + MT6311_VDVFS11_CON19 = 0x94, + MT6311_LDO_CON3 = 0xCF, +}; + +enum { + MT6311_E1_CID_CODE = 0x0110, + MT6311_E2_CID_CODE = 0x0120, + MT6311_E3_CID_CODE = 0x0130, +}; + +#endif diff --git a/src/soc/mediatek/mt8173/mt6311.c b/src/soc/mediatek/mt8173/mt6311.c new file mode 100644 index 0000000..8390dfd --- /dev/null +++ b/src/soc/mediatek/mt8173/mt6311.c @@ -0,0 +1,131 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <device/i2c.h> +#include <soc/mt6311.h> + +enum { + MT6311_SLAVE_ADDR = 0x6B, +}; + +static u32 get_mt6311_chip_id(uint8_t i2c_num) +{ + unsigned char id[2] = {0}; + + i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_CID, + &id[0], 0xFF, 0); + i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_SWCID, + &id[1], 0xFF, 0); + + return (u32)(id[0] << 8 | id[1]); +} + +static void mt6311_hw_init(uint8_t i2c_num) +{ + int ret = 0; + unsigned char var[3] = {0}; + + + /* + * Phase Shedding Trim Software Setting + * The phase 2 of MT6311 will enter PWM mode if the threshold is + * reached. + * The threshold is set according to EFUSE value. + */ + ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_EFUSE_DOUT_56_63, &var[0], + 0x3, 1); + ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_EFUSE_DOUT_56_63, &var[1], + 0x1, 7); + ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_EFUSE_DOUT_64_71, &var[2], + 0x1, 0); + + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS1_ANA_CON10, + var[0] | var[1] << 2 | var[2] << 3, 0xf, 0); + + /* I2C_CONFIG; pushpull setting, Opendrain is '0' */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_TOP_INT_CON, + 0x1, 0x1, 2); + /* RG_WDTRSTB_EN; CC, initial WDRSTB setting. */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_TOP_RST_CON, + 0x1, 0x1, 5); + /* initial INT function */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_GPIO_MODE, + 0x1, 0x7, 3); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_STRUP_CON5, + 0, 1 << 2 | 1 << 1 | 1 << 0, 0); + + /* Vo max is 1.15V */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_STRUP_ANA_CON1, 0x3, 0x3, 5); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_BUCK_ALL_CON23, 0x1, 0x1, 0); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_STRUP_ANA_CON2, 0x3, 0x3, 0); + /* Suspend HW control from SPM */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_TOP_CON, 0x1, 0x1, 0); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON7, 0x1, 0x1, 0); + /* default VDVFS power on */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON9, 0x1, 0x1, 0); + /* for DVFS slew rate rising=0.67us */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON10, 0x1, 0x7f, 0); + /* for DVFS slew rate, falling 2.0us */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON11, 0x5, 0x7f, 0); + /* default VDVFS11_VOSEL 1.0V, SW control */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON12, 0x40, 0x7f, 0); + /* default VDVFS11_VOSEL_ON 1.0V, HW control */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON13, 0x40, 0x7f, 0); + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON14, 0x40, 0x7f, 0); + /* for DVFS sof change, falling 50us */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON19, 0x3, 0x3, 0); + /* for DVFS sof change, falling only */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_VDVFS11_CON19, 0x1, 0x3, 4); + /* OFF LDO */ + ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, + MT6311_LDO_CON3, 0, 0x1, 0); + + if (ret) + printk(BIOS_ERR, "ERROR: %s failed\n", __func__); +} + +void mt6311_probe(uint8_t i2c_num) +{ + u32 val = 0; + + /* Check device ID is MT6311 */ + val = get_mt6311_chip_id(i2c_num); + printk(BIOS_INFO, "%s: device ID = %#x\n", __func__, val); + + if (val < MT6311_E1_CID_CODE) { + printk(BIOS_ERR, "ERROR: unknown MT6311 device_id\n"); + return; + } + + mt6311_hw_init(i2c_num); +}

1 0

Patch set updated for coreboot: mediatek/mt8173: Add da9212 driver
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14122 -gerrit commit 5e90fda781b29140ace7a4a62db4b79471b25bc0 Author: henryc.chen <henryc.chen(a)mediatek.com> Date: Wed Mar 2 15:51:44 2016 +0800 mediatek/mt8173: Add da9212 driver Add secondary PMIC for external buck control on Oak rev0/1/2/5 BRANCH=none BUG=none TEST=verified on Oak rev4/rev5 Change-Id: Ia000b0c7d61e8396856656247f9627e33b21b19b Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 241508e7d781fac8ee085ee81962043dd654c52d Original-Change-Id: I6c75e2462363a5523bf1ebb03af7a36740293624 Original-Signed-off-by: henryc.chen <henryc.chen(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/332342 Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- src/soc/mediatek/mt8173/Makefile.inc | 1 + src/soc/mediatek/mt8173/da9212.c | 96 ++++++++++++++++++++++++++++ src/soc/mediatek/mt8173/include/soc/da9212.h | 85 ++++++++++++++++++++++++ 3 files changed, 182 insertions(+) diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc index 6ba533a..217cbc3 100644 --- a/src/soc/mediatek/mt8173/Makefile.inc +++ b/src/soc/mediatek/mt8173/Makefile.inc @@ -67,6 +67,7 @@ ramstage-y += timer.c ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += pmic_wrap.c mt6391.c i2c.c ramstage-y += mt6311.c +ramstage-y += da9212.c ramstage-y += gpio.c ramstage-y += wdt.c ramstage-y += pll.c diff --git a/src/soc/mediatek/mt8173/da9212.c b/src/soc/mediatek/mt8173/da9212.c new file mode 100644 index 0000000..8161667 --- /dev/null +++ b/src/soc/mediatek/mt8173/da9212.c @@ -0,0 +1,96 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <device/i2c.h> +#include <soc/da9212.h> + +enum { + DA9212_SLAVE_ADDR = 0x68, +}; + +static void da9212_hw_init(uint8_t i2c_num, unsigned char variant_id) +{ + int ret = 0; + int buck_mode = DA9212_BUCK_MODE_AUTO; + + if (variant_id == DA9212_VARIANT_ID_AB) + buck_mode = DA9212_BUCK_MODE_PWM; + + /* page select to 0 */ + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_PAGE_CON, DA9212_REG_PAGE0, + DA9212_REG_PAGE_MASK, DA9212_REG_PAGE_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKA_CONT, DA9212_BUCK_GPI_GPIO1, + DA9212_BUCK_GPI_MASK, DA9212_BUCK_GPI_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKB_CONT, DA9212_BUCK_GPI_OFF, + DA9212_BUCK_GPI_OFF, DA9212_BUCK_GPI_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKA_CONT, DA9212_VBUCK_SEL_A, + DA9212_VBUCK_SEL_MASK, DA9212_VBUCK_SEL_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKB_CONT, DA9212_VBUCK_SEL_A, + DA9212_VBUCK_SEL_MASK, DA9212_VBUCK_SEL_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKA_CONF, buck_mode, + DA9212_BUCK_MODE_MASK, DA9212_BUCK_MODE_SHIFT); + + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_BUCKB_CONF, buck_mode, + DA9212_BUCK_MODE_MASK, DA9212_BUCK_MODE_SHIFT); + + if (ret) + printk(BIOS_ERR, "ERROR: %s failed\n", __func__); + +} + +void da9212_probe(uint8_t i2c_num) +{ + int ret = 0; + unsigned char device_id = 0; + unsigned char variant_id = 0; + + + /* select to page 4, clear REVERT at first time */ + ret |= i2c_write_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_PAGE_CON, DA9212_REG_PAGE4, + 0xF, DA9212_REG_PAGE_SHIFT); + + ret |= i2c_read_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_DEVICE_ID, &device_id, + 0xFF, 0); + + ret |= i2c_read_field(i2c_num, DA9212_SLAVE_ADDR, + DA9212_REG_VARIANT_ID, &variant_id, + 0xFF, 0); + + printk(BIOS_INFO, "%s: device ID = %#x, variant ID = %#x\n", __func__, + device_id, variant_id); + + /* Check device ID is DA9212 */ + if (device_id != DA9212_ID || ret) { + printk(BIOS_ERR, "ERROR: unknown DA9212 device_id\n"); + return; + } + + da9212_hw_init(i2c_num, variant_id); +} diff --git a/src/soc/mediatek/mt8173/include/soc/da9212.h b/src/soc/mediatek/mt8173/include/soc/da9212.h new file mode 100644 index 0000000..388958d --- /dev/null +++ b/src/soc/mediatek/mt8173/include/soc/da9212.h @@ -0,0 +1,85 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __SOC_DA9212_H_ +#define __SOC_DA9212_H_ + +void da9212_probe(uint8_t i2c_num); + +enum { + /* Page selection */ + DA9212_REG_PAGE_CON = 0x0, + + /* Regulator Registers */ + DA9212_REG_BUCKA_CONT = 0x5D, + DA9212_REG_BUCKB_CONT = 0x5E, + DA9212_REG_BUCKA_CONF = 0xD1, + DA9212_REG_BUCKB_CONF = 0xD2, +}; + +/* DA9212_REG_PAGE_CON (addr=0x0) */ +enum { + DA9212_REG_PAGE_SHIFT = 0, + DA9212_REG_PAGE_MASK = 0xf +}; + +enum { + DA9212_REG_PAGE0 = 0, + DA9212_REG_PAGE2 = 2, + DA9212_REG_PAGE4 = 4, + DA9212_PAGE_WRITE_MODE = 0x0, + DA9212_REPEAT_WRITE_MODE = 0x40, + DA9212_PAGE_REVERT = 0x80 +}; + +/* DA9212_REG_BUCKA/B_CONT (addr=0x5D/0x5E) */ +enum { + DA9212_BUCK_EN_SHIFT = 0, + DA9212_BUCK_OFF = 0x0, + DA9212_BUCK_ON = 0x1, + DA9212_BUCK_GPI_SHIFT = 1, + DA9212_BUCK_GPI_MASK = 0x3, + DA9212_BUCK_GPI_OFF = 0x0, + DA9212_BUCK_GPI_GPIO0 = 0x1, + DA9212_BUCK_GPI_GPIO1 = 0x2, + DA9212_BUCK_GPI_GPIO4 = 0x3, + DA9212_VBUCK_SEL_SHIFT = 4, + DA9212_VBUCK_SEL_MASK = 0x1, + DA9212_VBUCK_SEL_A = 0x0, + DA9212_VBUCK_SEL_B = 0x1, +}; + +/* DA9212_REG_BUCKA/B_CONF (addr=0xD1/0xD2) */ +enum { + DA9212_BUCK_MODE_SHIFT = 0, + DA9212_BUCK_MODE_MASK = 0x3, + DA9212_BUCK_MODE_MANUAL = 0x0, + DA9212_BUCK_MODE_PFM = 0x1, + DA9212_BUCK_MODE_PWM = 0x2, + DA9212_BUCK_MODE_AUTO = 0x3, +}; + +/* DA9212_REG_CONFIG_E (addr=0x147) */ +enum { + /* DEVICE IDs */ + DA9212_REG_DEVICE_ID = 0x1, + DA9212_ID = 0x22, + DA9213_ID = 0x23, + DA9212_REG_VARIANT_ID = 0x2, + DA9212_VARIANT_ID_AB = 0x10, + DA9212_VARIANT_ID_AC = 0x20 +}; + +#endif

1 0

Patch set updated for coreboot: google/oak: Move external buck initialization to coreboot
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14123 -gerrit commit 4fcc27ea2c3e277b3a9a66bec1cc00afd4fa4791 Author: henryc.chen <henryc.chen(a)mediatek.com> Date: Fri Mar 11 14:55:30 2016 +0800 google/oak: Move external buck initialization to coreboot Remove the code which is passing parameters to ARMTF and move external buck initilizaton from ARMTF to coreboot. BRANCH=none BUG=none TEST=verified on Oak rev4/rev5 Change-Id: I4f4b30acbee9b42a202b326f2fe4517cb4b9d83c Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 37bec54b4d8a3bce38878e292e4821da3959026a Original-Change-Id: Ib81709812a064f6daf13c9b4d6525f1858c81393 Original-Signed-off-by: henryc.chen <henryc.chen(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/332343 Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- src/mainboard/google/oak/mainboard.c | 70 +++++++++--------------------------- 1 file changed, 17 insertions(+), 53 deletions(-) diff --git a/src/mainboard/google/oak/mainboard.c b/src/mainboard/google/oak/mainboard.c index 192f4b3..4208730 100644 --- a/src/mainboard/google/oak/mainboard.c +++ b/src/mainboard/google/oak/mainboard.c @@ -22,8 +22,9 @@ #include <elog.h> #include <gpio.h> -#include <soc/bl31_plat_params.h> +#include <soc/da9212.h> #include <soc/i2c.h> +#include <soc/mt6311.h> #include <soc/mt6391.h> #include <soc/mtcmos.h> #include <soc/pinmux.h> @@ -31,67 +32,30 @@ #include <soc/usb.h> #include <vendorcode/google/chromeos/chromeos.h> -static void register_da9212_to_bl31(void) -{ -#if IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) - static struct bl31_da9212_param param_da9212 = { - .h = { - .type = PARAM_CLUSTER1_DA9212, - }, - .i2c_bus = 1, - .ic_en = { - .type = PARAM_GPIO_MT6391, - .polarity = PARAM_GPIO_ACTIVE_HIGH, - .index = MT6391_KP_ROW3, - }, - .en_a = { - .type = PARAM_GPIO_MT6391, - .polarity = PARAM_GPIO_ACTIVE_HIGH, - .index = MT6391_KP_ROW4, - }, - .en_b = { - .type = PARAM_GPIO_NONE, - }, - }; - if (board_id() == 2) { - param_da9212.ic_en.type = PARAM_GPIO_SOC; - param_da9212.ic_en.index = PAD_UCTS2; - } - register_bl31_param(&param_da9212.h); - - /* Init i2c bus Timing register for da9212 */ - mtk_i2c_bus_init(param_da9212.i2c_bus); -#endif -} +enum { + CODEC_I2C_BUS = 0, + EXT_BUCK_I2C_BUS = 1, +}; -static void register_mt6311_to_bl31(void) +static void configure_ext_buck(void) { -#if IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) - static struct bl31_mt6311_param param_mt6311 = { - .h = { - .type = PARAM_CLUSTER1_MT6311, - }, - .i2c_bus = 1, - }; - register_bl31_param(&param_mt6311.h); - - /* Init i2c bus Timing register for mt6311 */ - mtk_i2c_bus_init(param_mt6311.i2c_bus); -#endif -} + mtk_i2c_bus_init(EXT_BUCK_I2C_BUS); -static void configure_bl31(void) -{ switch (board_id()) { case 3: case 4: /* rev-3 and rev-4 use mt6311 as external buck */ - register_mt6311_to_bl31(); + gpio_output(PAD_EINT15, 1); + udelay(500); + mt6311_probe(EXT_BUCK_I2C_BUS); break; case 2: default: /* rev-2 and rev-5 use da9212 as external buck */ - register_da9212_to_bl31(); + mt6391_gpio_output(MT6391_KP_ROW3, 1); /* DA9212_IC_EN */ + mt6391_gpio_output(MT6391_KP_ROW4, 1); /* DA9212_EN_A */ + udelay(500); /* add 500us delay for powering on da9212 */ + da9212_probe(EXT_BUCK_I2C_BUS); break; } } @@ -125,7 +89,7 @@ static void configure_audio(void) mt6391_gpio_output(MT6391_KP_COL5, 1); /* Init i2c bus Timing register for audio codecs */ - mtk_i2c_bus_init(0); + mtk_i2c_bus_init(CODEC_I2C_BUS); /* set I2S clock to 48KHz */ mt_pll_set_aud_div(48 * KHz); @@ -197,7 +161,7 @@ static void mainboard_init(device_t dev) configure_backlight(); configure_usb(); configure_usb_hub(); - configure_bl31(); + configure_ext_buck(); elog_init(); elog_add_boot_reason();

1 0

Patch set updated for coreboot: mediatek/mt8173: Remove bl31 board parameters passing mechanism
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14124 -gerrit commit 5c84d451038705e00ff6557bd755f51204d45d0d Author: Jimmy Huang <jimmy.huang(a)mediatek.com> Date: Sat Mar 5 10:25:05 2016 +0800 mediatek/mt8173: Remove bl31 board parameters passing mechanism As the DA9212 and MT6311 external buck can be controlled by hardware since rev-5 board, we don't need to pass any board specific parameter to ARM TF. BRANCH=none BUG=none TEST=build pass Change-Id: I43eebe25ab14d3dd84e8bb4286e2bb55c8c3c063 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 9c4dfe61c69042e464b384e2e0edbc55eda23a74 Original-Change-Id: I541357fee6afb1ff2d771bcb073f7c9a9db52f00 Original-Signed-off-by: Jimmy Huang <jimmy.huang(a)mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/332344 Original-Commit-Ready: Yidi Lin <yidi.lin(a)mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin(a)mediatek.com> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- src/soc/mediatek/mt8173/Makefile.inc | 3 +-- src/soc/mediatek/mt8173/bl31_plat_params.c | 11 +--------- .../mediatek/mt8173/include/soc/bl31_plat_params.h | 24 ---------------------- 3 files changed, 2 insertions(+), 36 deletions(-) diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc index 217cbc3..82d74e3 100644 --- a/src/soc/mediatek/mt8173/Makefile.inc +++ b/src/soc/mediatek/mt8173/Makefile.inc @@ -77,8 +77,7 @@ ramstage-y += usb.c ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c -BL31_MAKEARGS += PLAT=mt8173 MEDIATEK_MEM_CONFIG=SRAM_192K MEDIATEK_DA9212=1 \ - MEDIATEK_MT6311=1 +BL31_MAKEARGS += PLAT=mt8173 ################################################################################ diff --git a/src/soc/mediatek/mt8173/bl31_plat_params.c b/src/soc/mediatek/mt8173/bl31_plat_params.c index 025c202..fc211ef 100644 --- a/src/soc/mediatek/mt8173/bl31_plat_params.c +++ b/src/soc/mediatek/mt8173/bl31_plat_params.c @@ -14,17 +14,8 @@ */ #include <arm_tf.h> #include <assert.h> -#include <soc/bl31_plat_params.h> - -static struct bl31_plat_param *plat_params; - -void register_bl31_param(struct bl31_plat_param *param) -{ - param->next = (void *)plat_params; - plat_params = param; -} void *soc_get_bl31_plat_params(bl31_params_t *bl31_params) { - return (void *)plat_params; + return (void *)NULL; } diff --git a/src/soc/mediatek/mt8173/include/soc/bl31_plat_params.h b/src/soc/mediatek/mt8173/include/soc/bl31_plat_params.h deleted file mode 100644 index c1ea885..0000000 --- a/src/soc/mediatek/mt8173/include/soc/bl31_plat_params.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2015 MediaTek Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __BL31_PLAT_PARAMS_H__ -#define __BL31_PLAT_PARAMS_H__ - -#if IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) -#include <arm-trusted-firmware/plat/mediatek/mt8173/include/plat_params.h> - -void register_bl31_param(struct bl31_plat_param *param); -#endif - -#endif /* __BL31_PLAT_PARAMS_H__ */

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Patch set updated for coreboot: mediatek/mt8173: Enable ARM trusted firmware integration
by Patrick Georgi 17 Mar '16

17 Mar '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13968 -gerrit commit d130ed7618259315f8dbd340bf5ebe08645391ee Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Tue Mar 8 21:42:00 2016 +0100 mediatek/mt8173: Enable ARM trusted firmware integration In Chromium OS downstream this was done together with adding the support for ATF, but unfortunately ATF upstream isn't ready yet. This commit is a reminder to enable things once ATF caught up. Change-Id: Id0d6908d906a1e54cdda4f232d572d996d9c556f Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/soc/mediatek/mt8173/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/mediatek/mt8173/Kconfig b/src/soc/mediatek/mt8173/Kconfig index 91a8d4f..ec3481e 100644 --- a/src/soc/mediatek/mt8173/Kconfig +++ b/src/soc/mediatek/mt8173/Kconfig @@ -6,6 +6,7 @@ config SOC_MEDIATEK_MT8173 select ARCH_RAMSTAGE_ARMV8_64 select ARCH_ROMSTAGE_ARMV8_64 select ARCH_VERSTAGE_ARMV8_64 + select ARM64_USE_ARM_TRUSTED_FIRMWARE select BOOTBLOCK_CONSOLE select HAVE_UART_SPECIAL select SPI_ATOMIC_SEQUENCING if SPI_FLASH

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coreboot-gerrit March 2016