Ben Gardner (gardner.ben(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14162
-gerrit
commit 35da7a780d458b54b8326bb77cb40853e15bb7be
Author: Ben Gardner <gardner.ben(a)gmail.com>
Date: Wed Mar 23 10:11:24 2016 -0500
intel/fsp_baytrail: Use read32() and write32() in i2c.c
i2c.c uses "*(volatile unsigned int *)" constructs where it could use
read32() and write32().
Switch to using read32() and write32().
The remaining instances in wait_tx_fifo() and wait_rx_fifo() are fixed in
https://review.coreboot.org/#/c/14160/
I also fixed a few minor white space issues.
Change-Id: I587551272ac171ef1f42c7eb26daf877dc56646b
Signed-off-by: Ben Gardner <gardner.ben(a)gmail.com>
---
src/soc/intel/fsp_baytrail/i2c.c | 47 ++++++++++++++++++++--------------------
1 file changed, 24 insertions(+), 23 deletions(-)
diff --git a/src/soc/intel/fsp_baytrail/i2c.c b/src/soc/intel/fsp_baytrail/i2c.c
index c6c8f65..5a0d59d 100644
--- a/src/soc/intel/fsp_baytrail/i2c.c
+++ b/src/soc/intel/fsp_baytrail/i2c.c
@@ -23,7 +23,8 @@
/* Wait for the transmit FIFO till there is at least one slot empty.
* FIFO stall due to transmit abort will be checked and resolved
*/
-static int wait_tx_fifo(char *base_adr) {
+static int wait_tx_fifo(char *base_adr)
+{
int i;
if (read32(base_adr + I2C_ABORT_SOURCE) & 0x1ffff) {
@@ -35,7 +36,7 @@ static int wait_tx_fifo(char *base_adr) {
/* Wait here for a free slot in TX-FIFO */
i = I2C_TIMEOUT_US;
- while ((!(*((volatile unsigned int *)(base_adr + I2C_STATUS)) & I2C_TFNF))) {
+ while (!(read32(base_adr + I2C_STATUS) & I2C_TFNF)) {
udelay(1);
if (!--i)
return I2C_ERR_TIMEOUT;
@@ -47,7 +48,8 @@ static int wait_tx_fifo(char *base_adr) {
/* Wait for the receive FIFO till there is at least one valid entry to read.
* FIFO stall due to transmit abort will be checked and resolved
*/
-static int wait_rx_fifo(char *base_adr) {
+static int wait_rx_fifo(char *base_adr)
+{
int i;
if (read32(base_adr + I2C_ABORT_SOURCE) & 0x1ffff) {
/* Reading back I2C_CLR_TX_ABRT resets abort lock on TX FIFO */
@@ -58,7 +60,7 @@ static int wait_rx_fifo(char *base_adr) {
/* Wait here for a received entry in RX-FIFO */
i = I2C_TIMEOUT_US;
- while ((!(*((volatile unsigned int *)(base_adr + I2C_STATUS)) & I2C_RFNE))) {
+ while (!(read32(base_adr + I2C_STATUS) & I2C_RFNE)) {
udelay(1);
if (!--i)
return I2C_ERR_TIMEOUT;
@@ -74,20 +76,19 @@ static int wait_rx_fifo(char *base_adr) {
static int wait_for_idle(char *base_adr)
{
int i;
- volatile int status;
+ int status;
/* For IDLE, increase timeout by ten times */
i = I2C_TIMEOUT_US * 10;
- status = *((volatile unsigned int *)(base_adr + I2C_STATUS));
+ status = read32(base_adr + I2C_STATUS);
while (((status & I2C_MST_ACTIVITY) || (!(status & I2C_TFE)))) {
- status = *((volatile unsigned int *)(base_adr + I2C_STATUS));
+ status = read32(base_adr + I2C_STATUS);
udelay(1);
if (!--i)
return I2C_ERR_TIMEOUT;
}
return I2C_SUCCESS;
-
}
/** \brief Enables I2C-controller, sets up BAR and timing parameters
@@ -101,6 +102,7 @@ int i2c_init(unsigned bus)
I2C3_MEM_BASE, I2C4_MEM_BASE, I2C5_MEM_BASE,
I2C6_MEM_BASE};
char *base_ptr;
+
/* Ensure the desired device is valid */
if (bus >= ARRAY_SIZE(base_adr)) {
printk(BIOS_ERR, "I2C: Only I2C controllers 0...6 are available.\n");
@@ -126,20 +128,19 @@ int i2c_init(unsigned bus)
(pci_read_config32(dev, PCI_COMMAND) | 0x2));
/* Set up some settings of I2C controller */
- *((unsigned int *)(base_ptr + I2C_CTRL)) = (I2C_RESTART_EN |
- (I2C_STANDARD_MODE << 1) |
- I2C_MASTER_ENABLE);
+ write32(base_ptr + I2C_CTRL,
+ I2C_RESTART_EN | (I2C_STANDARD_MODE << 1) | I2C_MASTER_ENABLE);
/* Adjust frequency for standard mode to 100 kHz */
/* The counter value can be computed by N=100MHz/2/I2C_CLK */
/* Thus, for 100 kHz I2C_CLK, N is 0x1F4 */
- *((unsigned int *)(base_ptr + I2C_SS_SCL_HCNT)) = 0x1f4;
- *((unsigned int *)(base_ptr + I2C_SS_SCL_LCNT)) = 0x1f4;
+ write32(base_ptr + I2C_SS_SCL_HCNT, 0x1f4);
+ write32(base_ptr + I2C_SS_SCL_LCNT, 0x1f4);
/* For 400 kHz, the counter value is 0x7d */
- *((unsigned int *)(base_ptr + I2C_FS_SCL_HCNT)) = 0x7d;
- *((unsigned int *)(base_ptr + I2C_FS_SCL_LCNT)) = 0x7d;
+ write32(base_ptr + I2C_FS_SCL_HCNT, 0x7d);
+ write32(base_ptr + I2C_FS_SCL_LCNT, 0x7d);
/* Enable the I2C controller for operation */
- *((unsigned int *)(base_ptr + I2C_ENABLE)) = 0x1;
+ write32(base_ptr + I2C_ENABLE, 0x1);
printk(BIOS_INFO, "I2C: Controller %d enabled.\n", bus);
return I2C_SUCCESS;
@@ -177,20 +178,20 @@ int i2c_read(unsigned bus, unsigned chip, unsigned addr,
if (stat != I2C_SUCCESS)
return stat;
/* Now we can program the desired slave address and start transfer */
- *((unsigned int *)(base_ptr + I2C_TARGET_ADR)) = (chip & 0xff);
+ write32(base_ptr + I2C_TARGET_ADR, chip & 0xff);
/* Send address inside slave to read from */
- *((unsigned int *)(base_ptr + I2C_DATA_CMD)) = (addr & 0xff);
+ write32(base_ptr + I2C_DATA_CMD, addr & 0xff);
/* For the next byte we need a repeated start condition */
val = I2C_RW_CMD | I2C_RESTART;
/* Now we can read desired amount of data over I2C */
for (i = 0; i < len; i++) {
/* A read is initiated by writing dummy data to the DATA-register */
- *((unsigned int *)(base_ptr + I2C_DATA_CMD)) = val;
+ write32(base_ptr + I2C_DATA_CMD, val);
stat = wait_rx_fifo(base_ptr);
if (stat)
return stat;
- buf[i] = (*((unsigned int *)(base_ptr + I2C_DATA_CMD))) & 0xff;
+ buf[i] = read32(base_ptr + I2C_DATA_CMD) & 0xff;
val = I2C_RW_CMD;
if (i == (len - 2)) {
/* For the last byte we need a stop condition to be generated */
@@ -232,10 +233,10 @@ int i2c_write(unsigned bus, unsigned chip, unsigned addr,
return stat;
}
/* Program slave address to use for this transfer */
- *((unsigned int *)(base_ptr + I2C_TARGET_ADR)) = (chip & 0xff);
+ write32(base_ptr + I2C_TARGET_ADR, chip & 0xff);
/* Send address inside slave to write data to */
- *((unsigned int *)(base_ptr + I2C_DATA_CMD)) = (addr & 0xff);
+ write32(base_ptr + I2C_DATA_CMD, addr & 0xff);
for (i = 0; i < len; i++) {
val = (unsigned int)(buf[i] & 0xff); /* Take only 8 bits */
@@ -247,7 +248,7 @@ int i2c_write(unsigned bus, unsigned chip, unsigned addr,
if (stat) {
return stat;
}
- *((unsigned int *)(base_ptr + I2C_DATA_CMD)) = val;
+ write32(base_ptr + I2C_DATA_CMD, val);
}
return I2C_SUCCESS;
}
Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14145
-gerrit
commit 67ff5220474aabd5d8981cf407a7edb74e5b2d99
Author: Martin Roth <martinroth(a)google.com>
Date: Sun Mar 20 12:03:20 2016 -0600
buildgcc: Fix help text formatting
Add a newline after the supported version text.
Move $TARGETDIR left so that longer paths print better.
Change-Id: If520e1b8657a526dee27763aee62cb78777d020d
Signed-off-by: Martin Roth <martinroth(a)google.com>
---
util/crossgcc/buildgcc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index f88c09c..2e7505b 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -326,9 +326,9 @@ myhelp()
printf " [--nocolor] don't print color codes in output\n"
printf " [--urls] print the urls for all packages\n"
printf " [-j|--jobs <num>] run <num> jobs in parallel in make\n"
- printf " [-s]--supported <tool> print supported version of a tool"
+ printf " [-s]--supported <tool> print supported version of a tool\n"
printf " [-d|--directory <target dir>] target directory to install cross compiler to\n"
- printf " (defaults to $TARGETDIR)\n\n"
+ printf " (defaults to $TARGETDIR)\n\n"
printf " [-D|--destdir <dest dir>] destination directory to install cross compiler to\n"
printf " (for RPM builds, default unset)\n"
printf " [-P|--package <package>] Build a specific package: GCC, CLANG, IASL, GDB\n"
the following patch was just integrated into master:
commit f1d807c5c603e9a77cf3ddd54e4aa3ceebcc3ae9
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Mon Mar 21 02:14:50 2016 -0500
nb/amd/mct_ddr3: Remove spurious Addl_Index variable in dqsTrainMaxRdLatency_SW_Fam15()
Change-Id: Ic3f636983cf6ba2796ee56e2a25b56513a4343c1
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/14148
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See https://review.coreboot.org/14148 for details.
-gerrit
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14163
-gerrit
commit d1691390f1853406da4ac30686b426baf1d27c3f
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Wed Mar 23 21:44:43 2016 +0100
crossgcc: Enable multiple targets for a platform
This is required on powerpc64 to build both little endian and big endian
libgcc.
Change-Id: I295c8ee5e8131d4108e98d1bfd53abb8bd8982b2
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
---
util/crossgcc/buildgcc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index 245211d..49dcf24 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -450,7 +450,7 @@ build_GCC() {
--disable-libssp --disable-bootstrap --disable-nls \
--disable-libquadmath --without-headers \
--disable-threads \
- --enable-interwork --enable-multilib \
+ --enable-interwork --enable-multilib --enable-targets=all \
--disable-libatomic --disable-libcc1 --disable-decimal-float \
${GCC_OPTIONS} --enable-languages="${LANGUAGES}" \
--with-system-zlib \
the following patch was just integrated into master:
commit 263522db97b5b16d2408fa11c5c158f88539bc8c
Author: Paul Kocialkowski <contact(a)paulk.fr>
Date: Tue Sep 22 22:16:33 2015 +0200
armv7: Word-sized/half-word-sized memory operations for 32/16 bit read/write
As a follow up to Change-Id: I1fb3fc139e0a813acf9d70f14386a9603c9f9ede,
use as builtin compiler hint instead of inline assembly to allow the
compiler to generate more efficient code.
Change-Id: I690514ac6d8988a6494ad3a77690709d932802b0
Signed-off-by: Paul Kocialkowski <contact(a)paulk.fr>
Signed-off-by: Patrick Georgi <pgeorgi(a)google.com>
Reviewed-on: https://review.coreboot.org/12083
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
Reviewed-by: Julius Werner <jwerner(a)chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See https://review.coreboot.org/12083 for details.
-gerrit